From nobody Tue Jun 23 21:14:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A3705C4332F for ; Fri, 25 Feb 2022 14:54:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231464AbiBYOzY (ORCPT ); Fri, 25 Feb 2022 09:55:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43454 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238622AbiBYOzK (ORCPT ); Fri, 25 Feb 2022 09:55:10 -0500 Received: from mail-qk1-x732.google.com (mail-qk1-x732.google.com [IPv6:2607:f8b0:4864:20::732]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A2FB22558A; Fri, 25 Feb 2022 06:54:37 -0800 (PST) Received: by mail-qk1-x732.google.com with SMTP id t21so4650376qkg.6; Fri, 25 Feb 2022 06:54:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gwYHMhbRHXQxrol3Z4onOOebIeXrEkEaF8cW1M7ix2U=; b=ZER9dqeve3GLpay7/CeKXOHvRdxd93sDJdphtL21FC+B6K6WJp6rNACTQcU+GbsI4t psKHa0gSnah0AxamhlomcPSyWhXvgNBJx5Ov2n0gZ0EQJccwuAg8aBiaQCDEqTS2TYu1 8xJzWTDSlPaHtP1pAm/m83wknHob1hbJMDrX0NdHofMSn1GKsJ0IbiOXr4DXfBFv4WpQ 0syJTQljhm8Lt6E4cfR8d9sGYmO76mbLi98cYOLSc4htvG19pBm/3JEJC9u8w9jRk0r0 SqwpvisiVAWYdkiKq3fZz6cg/rdtG0NYGlQVKpNTz94HjV6oVcJ6GjJGDkRj8iuadVJh QBhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gwYHMhbRHXQxrol3Z4onOOebIeXrEkEaF8cW1M7ix2U=; b=W3tw1Boqg3fjXuXOjQfdFZE3zXy6ES8KaBjBpNNRlfSiyg5cIAvQIHzqluNuAiHRmX fGXq7ihlI4Uu2Bv/I6IhytVdPzGEtJI4zsR2Vss8fEZ1F0u/a03Z9u/HdUdT0fr3uZ3O MHP+Q3AZIX47UBMyKQXzdxISpfzoyTEFAW/BKGp82GAWi0lkt5xfu28sWOMuxvrVP8XY Q/xy8tovQdVVsHjkFg3cifk9qAVCzAYCJN/RM2FGpJx4dIyGSKxGgjPgmkeBdM6LXzrW srbtsOpuo2Pfb94LgM7Q+5YKw4yk8Lz1gU0uDKiKNh9SWOUH+zS5SQ9bSFshsXjQlYla b25g== X-Gm-Message-State: AOAM532Fbj5uiMgkJIpYcPqZT9+hZa+D41p5qBxL+zo2iq3+18AZkRSt 7rcmcuEMXP40DmLtPlEVZLo= X-Google-Smtp-Source: ABdhPJwee8UY1BnbzYFvaxa8NG4VwTthJ6UyhjOsZwLH2qycERTg1bJl7POhSx3GuOb0jru6PA+/jw== X-Received: by 2002:ae9:e114:0:b0:609:b256:ee5 with SMTP id g20-20020ae9e114000000b00609b2560ee5mr5028795qkm.93.1645800876714; Fri, 25 Feb 2022 06:54:36 -0800 (PST) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id d202-20020a3768d3000000b005f18706845dsm1318292qkc.73.2022.02.25.06.54.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Feb 2022 06:54:36 -0800 (PST) From: Peter Geis To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: Peter Geis , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/8] dt-bindings: soc: grf: add rk3566-pipe-grf compatible Date: Fri, 25 Feb 2022 09:54:24 -0500 Message-Id: <20220225145432.422130-2-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225145432.422130-1-pgwipeout@gmail.com> References: <20220225145432.422130-1-pgwipeout@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The rk3566 requires special handling for the dwc3-otg clock in order for the port to function correctly. Add a binding for the rk3566-pipe-grf so we can handle setup with the grf driver. Signed-off-by: Peter Geis --- Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Docu= mentation/devicetree/bindings/soc/rockchip/grf.yaml index 5079e9d24af6..75a2b8bb25fb 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml @@ -15,6 +15,7 @@ properties: - items: - enum: - rockchip,rk3288-sgrf + - rockchip,rk3566-pipe-grf - rockchip,rk3568-pipe-grf - rockchip,rk3568-pipe-phy-grf - rockchip,rk3568-usb2phy-grf --=20 2.25.1 From nobody Tue Jun 23 21:14:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6CFB5C433F5 for ; Fri, 25 Feb 2022 14:54:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241981AbiBYOz2 (ORCPT ); Fri, 25 Feb 2022 09:55:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234901AbiBYOzK (ORCPT ); Fri, 25 Feb 2022 09:55:10 -0500 Received: from mail-qt1-x834.google.com (mail-qt1-x834.google.com [IPv6:2607:f8b0:4864:20::834]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D4C3225592; Fri, 25 Feb 2022 06:54:38 -0800 (PST) Received: by mail-qt1-x834.google.com with SMTP id q10so2601376qtw.4; Fri, 25 Feb 2022 06:54:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Y4cNWerRUjMHmiNUNzXBZ2mcrLA/Vini3LuGLiQPleI=; b=PgAb9Vvnd5VqlaSdbhbbFlCyY+VsHxaTb1cP3kGo+tTyJEzkdzxqIDlzpIjw0LxkOP jxQBmBAchI8onMnqvU45qs8To31xUP/Mx/UgdBsK5YU1ZXRDYvKGjR7O+7M5Rgk02l4r QUM/BdtfgwylJE5VGtpa292BB5fWiLWi79x6jaMizhhHReJ/HdlKQPZ4IXhNwMaUr8jA kMKxB8Tk/DUPsaX8ga0GuL3s2UkhESHM9anKsf6loE29gKDqSUe12KEMNjzPYQRp6e44 ha2zlE/c9PWNAr0zdllfa4BzLnWntkWfbHlwCRKpqomzgi2FHStpJR1NghxuUdw9I3Bx 0c7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Y4cNWerRUjMHmiNUNzXBZ2mcrLA/Vini3LuGLiQPleI=; b=XTBcqc9A+45cMmha9MG7/hEmPH3fpIWoBVlJP1Wc1qKzqpZyK90w+xJgpRcd14EQ6N VBE470FZYc2qvf0QHRcricsKZhNEpncBgX1GB7538EOxYgDDJ784d8pWgwaeo4qokjWz 5D81x/DGuYOxGuWLzR5cmfrgZ0xDXBU+JRvwPKQOQFfL9ISr9WSoJAfgfJchuk+B222U 2LgbfT7qE378B9uAlXkPnOnDy1Cq9xv5+U6qMfMJ0R8EW0nhDE3KrqZQuxe2I06t2isF olz7wq+XWL7Le1oLMuD3btVM/EIPkuVPC03tI5X1OO457zOFWStgcNFaTb5O9ahu5SdI 5E3g== X-Gm-Message-State: AOAM530yoJLB7qc9fSE83A6dQLeI0qxZ6Z1ylldSqG2+seXDz9WR8qdx wvw57G7ghgJpoSE5mVIxMDk= X-Google-Smtp-Source: ABdhPJwDmobbs+ADlqr7QCTKzhyLo+hHpMkIwplNNKdf8nURBCXqkP1dSLivP770Grqrgf6Ba9iSIw== X-Received: by 2002:ac8:4e46:0:b0:2cb:28cc:2157 with SMTP id e6-20020ac84e46000000b002cb28cc2157mr7131031qtw.167.1645800877716; Fri, 25 Feb 2022 06:54:37 -0800 (PST) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id d202-20020a3768d3000000b005f18706845dsm1318292qkc.73.2022.02.25.06.54.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Feb 2022 06:54:37 -0800 (PST) From: Peter Geis To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: Peter Geis , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/8] dt-bindings: usb: dwc3: add description for rk3568 Date: Fri, 25 Feb 2022 09:54:25 -0500 Message-Id: <20220225145432.422130-3-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225145432.422130-1-pgwipeout@gmail.com> References: <20220225145432.422130-1-pgwipeout@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The rk3568 dwc3 controllers are backwards compatible with the rk3399. Add the device tree description for it. Signed-off-by: Peter Geis --- Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml b/Doc= umentation/devicetree/bindings/usb/rockchip,dwc3.yaml index 04077f2d7faf..e3044e81cc72 100644 --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml @@ -30,6 +30,7 @@ select: enum: - rockchip,rk3328-dwc3 - rockchip,rk3399-dwc3 + - rockchip,rk3568-dwc3 required: - compatible =20 @@ -39,6 +40,7 @@ properties: - enum: - rockchip,rk3328-dwc3 - rockchip,rk3399-dwc3 + - rockchip,rk3568-dwc3 - const: snps,dwc3 =20 reg: @@ -75,7 +77,10 @@ properties: maxItems: 1 =20 reset-names: - const: usb3-otg + items: + - enum: + - usb3-otg + - usb3-host =20 unevaluatedProperties: false =20 --=20 2.25.1 From nobody Tue Jun 23 21:14:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 300C1C433F5 for ; Fri, 25 Feb 2022 14:55:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241961AbiBYOzb (ORCPT ); Fri, 25 Feb 2022 09:55:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43578 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238595AbiBYOzM (ORCPT ); Fri, 25 Feb 2022 09:55:12 -0500 Received: from mail-qv1-xf29.google.com (mail-qv1-xf29.google.com [IPv6:2607:f8b0:4864:20::f29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 92303227590 for ; Fri, 25 Feb 2022 06:54:39 -0800 (PST) Received: by mail-qv1-xf29.google.com with SMTP id v18so6801122qvh.11 for ; Fri, 25 Feb 2022 06:54:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZtUJySmbIWUCXkZt6OYhMWHmPcZgwTz+ISBAU3SmGDQ=; b=XBeJBV/AW6aVcAIEUmMxOHtmJJN7cXdlOyt9jA1A+SxQhFAomT394g2penNl+l7GbZ PpPBvEeiwnLHMlif2iBNjv9DS5xXf89R++JUB9W/GWyFgQmJe9HHL5/5oXQ2ZEcNODeL zxvcRwUWGtQlhpu7nx+Gn62ZpV0GU+3XcJTPUYqsxdM1igSMmHWIS8ot0rD8QW0V0x8E TtYT0843fMm0a55pRiVBotTg2R+5GvDnRAjR+GB0OVP/5g2KUHuHibAcxH9mOw3XOyBg YQ3J4aeSNGohJwzflt6MidXQdlW3MZXTxUKgvefm6Oxead2rar6rAiGCDvdpDeXCoJqr +B6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZtUJySmbIWUCXkZt6OYhMWHmPcZgwTz+ISBAU3SmGDQ=; b=sTH9a0TgDCJk0WD2aCS6dsg6y3GD4UnCyP7QMYVkIEtgwU25UnQ28fwifFqAqmULaU W1tklyrJ6JFlboGAaG4UzVz0YcfU9kAAF/bZKlIuAMO/AgonuiFKcrzqTpXL24pEScV3 RQEOCCLuEX4h4C/18gaqts7mPR1fxrKJSZp+JrBneFpQaC1K2DAO5+FSbEbkTwo5jEbe GWWLBT2+7YIDwGkInHgj1b+SPLB7zz5rlGvzlqCJnQPqOcASjijpDOeNEK1kWM3xxTRN 1qHv7STitTI7BwAYjgQ34jmIpSsRBZ8y8QWYjHUVq6N8XLdr34gDOWNBaT3XFUOkSzB4 BFaw== X-Gm-Message-State: AOAM530tIyepWoOBS4/aONJgJUdAwnvllk4l8vBw2HNFEHL+Y09zVd7P z26+eYMteetow5jtODhKCig= X-Google-Smtp-Source: ABdhPJzdjq6wQF+dln+duSIHpHfuXWwvm/2iQsbrmZi+C7AS5r4pVyrCpU26OtRm5/Tmk3Cdwx6ovA== X-Received: by 2002:ad4:5cca:0:b0:42c:3a47:5bc with SMTP id iu10-20020ad45cca000000b0042c3a4705bcmr6205281qvb.69.1645800878646; Fri, 25 Feb 2022 06:54:38 -0800 (PST) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id d202-20020a3768d3000000b005f18706845dsm1318292qkc.73.2022.02.25.06.54.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Feb 2022 06:54:38 -0800 (PST) From: Peter Geis To: Heiko Stuebner Cc: Peter Geis , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 3/8] soc: rockchip: set dwc3 clock for rk3566 Date: Fri, 25 Feb 2022 09:54:26 -0500 Message-Id: <20220225145432.422130-4-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225145432.422130-1-pgwipeout@gmail.com> References: <20220225145432.422130-1-pgwipeout@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The rk3566 dwc3 otg port clock is unavailable at boot, as it defaults to the combophy as the clock source. As combophy0 doesn't exist on rk3566, we need to set the clock source to the usb2 phy instead. Add handling to the grf driver to handle this on boot. Signed-off-by: Peter Geis --- drivers/soc/rockchip/grf.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c index 494cf2b5bf7b..384461b70684 100644 --- a/drivers/soc/rockchip/grf.c +++ b/drivers/soc/rockchip/grf.c @@ -108,6 +108,20 @@ static const struct rockchip_grf_info rk3399_grf __ini= tconst =3D { .num_values =3D ARRAY_SIZE(rk3399_defaults), }; =20 +#define RK3566_GRF_USB3OTG0_CON1 0x0104 + +static const struct rockchip_grf_value rk3566_defaults[] __initconst =3D { + { "usb3otg port switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(0, 1, 12= ) }, + { "usb3otg clock switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 7= ) }, + { "usb3otg disable usb3", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 0= ) }, +}; + +static const struct rockchip_grf_info rk3566_pipegrf __initconst =3D { + .values =3D rk3566_defaults, + .num_values =3D ARRAY_SIZE(rk3566_defaults), +}; + + static const struct of_device_id rockchip_grf_dt_match[] __initconst =3D { { .compatible =3D "rockchip,rk3036-grf", @@ -130,6 +144,9 @@ static const struct of_device_id rockchip_grf_dt_match[= ] __initconst =3D { }, { .compatible =3D "rockchip,rk3399-grf", .data =3D (void *)&rk3399_grf, + }, { + .compatible =3D "rockchip,rk3566-pipe-grf", + .data =3D (void *)&rk3566_pipegrf, }, { /* sentinel */ }, }; --=20 2.25.1 From nobody Tue Jun 23 21:14:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88E74C433EF for ; Fri, 25 Feb 2022 14:55:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242025AbiBYOzi (ORCPT ); Fri, 25 Feb 2022 09:55:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43662 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239280AbiBYOzN (ORCPT ); Fri, 25 Feb 2022 09:55:13 -0500 Received: from mail-qk1-x735.google.com (mail-qk1-x735.google.com [IPv6:2607:f8b0:4864:20::735]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E0E6922558A; Fri, 25 Feb 2022 06:54:40 -0800 (PST) Received: by mail-qk1-x735.google.com with SMTP id bm39so4697897qkb.0; Fri, 25 Feb 2022 06:54:40 -0800 (PST) DKIM-Signature: v=1; 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Fri, 25 Feb 2022 06:54:39 -0800 (PST) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id d202-20020a3768d3000000b005f18706845dsm1318292qkc.73.2022.02.25.06.54.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Feb 2022 06:54:39 -0800 (PST) From: Peter Geis To: Felipe Balbi , Greg Kroah-Hartman Cc: Bin Yang , Heiko Stuebner , Peter Geis , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 4/8] usb: dwc3: core: do not use 3.0 clock when operating in 2.0 mode Date: Fri, 25 Feb 2022 09:54:27 -0500 Message-Id: <20220225145432.422130-5-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225145432.422130-1-pgwipeout@gmail.com> References: <20220225145432.422130-1-pgwipeout@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Bin Yang In the 3.0 device core, if the core is programmed to operate in 2.0 only, then setting the GUCTL1.DEV_FORCE_20_CLK_FOR_30_CLK makes the internal 2.0(utmi/ulpi) clock to be routed as the 3.0 (pipe) clock. Enabling this feature allows the pipe3 clock to be not-running when forcibly operating in 2.0 device mode. Signed-off-by: Bin Yang Signed-off-by: Peter Geis --- drivers/usb/dwc3/core.c | 4 ++++ drivers/usb/dwc3/core.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 18adddfba3da..032d40794fae 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1167,6 +1167,10 @@ static int dwc3_core_init(struct dwc3 *dwc) if (dwc->parkmode_disable_ss_quirk) reg |=3D DWC3_GUCTL1_PARKMODE_DISABLE_SS; =20 + if (dwc->maximum_speed =3D=3D USB_SPEED_HIGH || + dwc->maximum_speed =3D=3D USB_SPEED_FULL) + reg |=3D DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK; + dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); } =20 diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index eb9c1efced05..ea3ca04406bb 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -259,6 +259,7 @@ /* Global User Control 1 Register */ #define DWC3_GUCTL1_DEV_DECOUPLE_L1L2_EVT BIT(31) #define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28) +#define DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK BIT(26) #define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW BIT(24) #define DWC3_GUCTL1_PARKMODE_DISABLE_SS BIT(17) =20 --=20 2.25.1 From nobody Tue Jun 23 21:14:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA4BFC433F5 for ; Fri, 25 Feb 2022 14:55:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241970AbiBYOzf (ORCPT ); Fri, 25 Feb 2022 09:55:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43578 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241700AbiBYOzN (ORCPT ); Fri, 25 Feb 2022 09:55:13 -0500 Received: from mail-qk1-x735.google.com (mail-qk1-x735.google.com [IPv6:2607:f8b0:4864:20::735]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D8C7225592; Fri, 25 Feb 2022 06:54:41 -0800 (PST) Received: by mail-qk1-x735.google.com with SMTP id n185so4660080qke.5; Fri, 25 Feb 2022 06:54:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ART3VPTUZNh7t0v6KbRBSIgrQKQirMcxNBZ8VtKI13E=; b=JN4l4vqHFQn2xmpeWdDL8cBi2bcL/CO0OBjadfrloabBkBoq2Lrr5WiXGj1bkOq05b Q1rnwO+kcyDVeZB4Mrnfr/EH8tGTniLwBV67ca8rRS3c3IShRYML6alXCScbBjRDCSHc uYKLRdqCbmlkgRR9QXb2C+qqRCfVfs2r0AyvFPgMfatm6cUYtkllJOjaVSZsV0LELxv6 eIioSjVYeSq/kcmfxqO/YzfJh1tbtoThTcQA5pnJwIF83Znup0B/loRA145U0ex5TQSH U8V4wHzkgjmPC21g+fCn7ep/zkeyAoqsrqFd4oSXwvPZ95YgRf9ZHfZcHkdan1Jy5YeJ layw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ART3VPTUZNh7t0v6KbRBSIgrQKQirMcxNBZ8VtKI13E=; b=qGpD1hoP61htaforXeJsya2uezzhsLpG9T1pznyLESbb/BJKTjtsLJPAuP/Akr2T5g XMuiAj3a1sxk/1XTbwMJFbjcFC3qUjtfMQrzYxjeHM5qOJNcWoSSVPKL4tTkIVq9Qlfs AW7BiFJzvw5GYyyqgayRH/GIxbbuMggpBkiniO4mXzf+nEc5DvtcpAVL7Ztg6CsPBb1c SnRxXD8h657ndeErPQGNHYoP33FVpjxadtJgm+IgaVnvNVZJS5MNnqoBr5J2NBeBgDme x1EV36ekieG1oEXetPAKC6SB2zGiBVSnDpg2RN/b/PhL3FkemKdl2wLiUxFHgiVocx3X IHRA== X-Gm-Message-State: AOAM533T17PfBew4cNqrdY2aSkmOKHfwOJ8gqx8TfiNDLh3mVvmeBMyE BX5QJvmASkcy5VcIEFQExQg= X-Google-Smtp-Source: ABdhPJwNUKZeDezV9CEn8o8sUWC3HeQsS+FCZoNvXDfs5k9n5B5Xs8ZeYSVCKDv9LFgDmilOTwuEzg== X-Received: by 2002:a37:a795:0:b0:475:ce3f:ac76 with SMTP id q143-20020a37a795000000b00475ce3fac76mr5014946qke.193.1645800880760; Fri, 25 Feb 2022 06:54:40 -0800 (PST) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id d202-20020a3768d3000000b005f18706845dsm1318292qkc.73.2022.02.25.06.54.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Feb 2022 06:54:40 -0800 (PST) From: Peter Geis To: Felipe Balbi , Greg Kroah-Hartman Cc: Peter Geis , Heiko Stuebner , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 5/8] usb: dwc3: reorder dwc-of-simple compatibles Date: Fri, 25 Feb 2022 09:54:28 -0500 Message-Id: <20220225145432.422130-6-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225145432.422130-1-pgwipeout@gmail.com> References: <20220225145432.422130-1-pgwipeout@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The dwc3-of-simple driver is getting rather disorganized with the new inclusions. Reorder the dwc3-of-simple compatibles to be alphabetical. Signed-off-by: Peter Geis --- drivers/usb/dwc3/dwc3-of-simple.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-s= imple.c index 71fd620c5161..9dc6295df6b1 100644 --- a/drivers/usb/dwc3/dwc3-of-simple.c +++ b/drivers/usb/dwc3/dwc3-of-simple.c @@ -171,12 +171,12 @@ static const struct dev_pm_ops dwc3_of_simple_dev_pm_= ops =3D { }; =20 static const struct of_device_id of_dwc3_simple_match[] =3D { - { .compatible =3D "rockchip,rk3399-dwc3" }, - { .compatible =3D "cavium,octeon-7130-usb-uctl" }, - { .compatible =3D "sprd,sc9860-dwc3" }, { .compatible =3D "allwinner,sun50i-h6-dwc3" }, + { .compatible =3D "cavium,octeon-7130-usb-uctl" }, { .compatible =3D "hisilicon,hi3670-dwc3" }, { .compatible =3D "intel,keembay-dwc3" }, + { .compatible =3D "rockchip,rk3399-dwc3" }, + { .compatible =3D "sprd,sc9860-dwc3" }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, of_dwc3_simple_match); --=20 2.25.1 From nobody Tue Jun 23 21:14:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0361C433EF for ; Fri, 25 Feb 2022 14:55:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242030AbiBYOzk (ORCPT ); Fri, 25 Feb 2022 09:55:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241899AbiBYOzO (ORCPT ); Fri, 25 Feb 2022 09:55:14 -0500 Received: from mail-qk1-x72a.google.com (mail-qk1-x72a.google.com [IPv6:2607:f8b0:4864:20::72a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8B6882272CB; Fri, 25 Feb 2022 06:54:42 -0800 (PST) Received: by mail-qk1-x72a.google.com with SMTP id t21so4650586qkg.6; Fri, 25 Feb 2022 06:54:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1aWUdNaxxdpw+lffSMBxQcG6QoqOdlZ2+Rp8zHx4iWQ=; b=CDm78T/7/AOeFBNhZ/Hsw/eFKprN/6WQC1KibaLR1X/6Xa+qSiMF2CebribEDB0grp 68EPufCJj+DgWCEknXnwUwPQLa4q6JEVqXI70BaI/bf1dXhAWAK1z707JLmWprxe7nmo Gakgea52/WJ2+8AvgQt/FBNF8Fm7J5N0bGA7oGKsxuMgHJHGegvzedoXHXz5Z379tacq nM+9rHWpUNigxtY7K0/20QQTmWwvYaPSRQu2q1kY+ZAonZMKWIPFyuxL/zL1Lll4IJ35 qmr6WwMC97V9KOvnR7eQkjCre7m4e06RQxD1PwOymh6AKiL70U4ma6grvazPYUaRt3CP kL3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1aWUdNaxxdpw+lffSMBxQcG6QoqOdlZ2+Rp8zHx4iWQ=; b=N3ucis/P3oYcLfZxZpmvIY01RCUFy+IbDfqbhq1tVu8ZFdko4YJs3D7/H0t26EvIkC b/ZCHM8A4gDvei7+XjgW2saL/KMkqAKHAEF1ZgjFKXyCt0/01RsPgdPG4WQTl6qwNGrA IhO8nNwvE66tI+tzhbZf9JWLoji4UPtospCwqR1zBlGQhgPHdDRFTZbImEoeORkQoXE7 P3X3CUhq7ae7HQRJy3iiJ2HqPb8q3dx5ZTbyAwcK4YCy/rXVArhslUDBaWLOqbbFpG8Y InxER5/JiWALpCiOsQ7/9uu6vSonR3+HBdQxjfjytO/22JSC/nHvT0P7SHNQpvQQU30z Xs7w== X-Gm-Message-State: AOAM531Sk4fX6VxzpcFWiC7VEG7aGlSWiVP5HFjih+ZVoavpKKgAvtww iOmTxOMroAwZSHUiM6QhzbY55TiQAcNxbA== X-Google-Smtp-Source: ABdhPJziU1O59hbevx/Nku3KuwwaXRY947GTXPKwNBjuKzU7SSBO7D/jEigjVZPZz+pHreartIQY+Q== X-Received: by 2002:a37:9a94:0:b0:606:8349:e9e8 with SMTP id c142-20020a379a94000000b006068349e9e8mr4966818qke.66.1645800881655; Fri, 25 Feb 2022 06:54:41 -0800 (PST) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id d202-20020a3768d3000000b005f18706845dsm1318292qkc.73.2022.02.25.06.54.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Feb 2022 06:54:41 -0800 (PST) From: Peter Geis To: Felipe Balbi , Greg Kroah-Hartman Cc: Peter Geis , Heiko Stuebner , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 6/8] usb: dwc3: add rk3568 dwc3 support Date: Fri, 25 Feb 2022 09:54:29 -0500 Message-Id: <20220225145432.422130-7-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225145432.422130-1-pgwipeout@gmail.com> References: <20220225145432.422130-1-pgwipeout@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The rk3568 dwc3 controller is backwards compatible with the rk3399 dwc3 controller. Add support for it to the dwc3-of-simple driver. Signed-off-by: Peter Geis --- drivers/usb/dwc3/dwc3-of-simple.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-s= imple.c index 9dc6295df6b1..1d52a261af55 100644 --- a/drivers/usb/dwc3/dwc3-of-simple.c +++ b/drivers/usb/dwc3/dwc3-of-simple.c @@ -49,7 +49,8 @@ static int dwc3_of_simple_probe(struct platform_device *p= dev) * Some controllers need to toggle the usb3-otg reset before trying to * initialize the PHY, otherwise the PHY times out. */ - if (of_device_is_compatible(np, "rockchip,rk3399-dwc3")) + if (of_device_is_compatible(np, "rockchip,rk3399-dwc3") | + of_device_is_compatible(np, "rockchip,rk3568-dwc3")) simple->need_reset =3D true; =20 simple->resets =3D of_reset_control_array_get(np, false, true, @@ -176,6 +177,7 @@ static const struct of_device_id of_dwc3_simple_match[]= =3D { { .compatible =3D "hisilicon,hi3670-dwc3" }, { .compatible =3D "intel,keembay-dwc3" }, { .compatible =3D "rockchip,rk3399-dwc3" }, + { .compatible =3D "rockchip,rk3568-dwc3" }, { .compatible =3D "sprd,sc9860-dwc3" }, { /* Sentinel */ } }; --=20 2.25.1 From nobody Tue Jun 23 21:14:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B322C433F5 for ; Fri, 25 Feb 2022 14:55:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232617AbiBYOzn (ORCPT ); Fri, 25 Feb 2022 09:55:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241929AbiBYOzQ (ORCPT ); Fri, 25 Feb 2022 09:55:16 -0500 Received: from mail-qk1-x72e.google.com (mail-qk1-x72e.google.com [IPv6:2607:f8b0:4864:20::72e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5F59225592; Fri, 25 Feb 2022 06:54:43 -0800 (PST) Received: by mail-qk1-x72e.google.com with SMTP id n185so4660223qke.5; Fri, 25 Feb 2022 06:54:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FDPZIGzI4cmIbStBPaiMVgNNivHkF1oB77ycCAz44T0=; b=lHos+wKMhO2GGZXv06casobH1M6tdgEvgpIa/W+kMaLXIKX1Lj9+QztiSN5AE99d6l kvHgRongm05kW61U1RUls1pHopKDP5+fPbUhQynkxyiAyrmkLz9MBTvM+fCUNp5DRxiO 0yxPn3dZGhI8Px+Cn0DUTPvakP0gvVrXg1KKPb1MYKuBrQ/iMX8zuo/MjCzErJGVLnWM k6T4dX4F1LmYL51991172KG8nJgiBE0mCBgNeVyzk4Lkf79fPWWAh34J4MpAmVTn2WG1 WZY4WmY6bd8MJEmIsYzqRb3E6UUgfSqQjzhW2U6L2exM/pNFhOhW99pWr4aKtmrUtVwI kO1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FDPZIGzI4cmIbStBPaiMVgNNivHkF1oB77ycCAz44T0=; b=jmGtdLRtTccKgyjsxT048Qflex3p9KOByHwpFvzEdfnsTRyT3oZp3mLGRagsH1I+/P eYpc7VUw1f7SbODs7/0PuccLZKAcq9gvIOeWTj29bXmbL/46Hwl1tPDfq7DGqV3IcZoQ GAAKmy62DZ9W/LNX50/ojil2c8MmpXrQBI3hWK222TM/vU5yfRByTjJRJug47se8LY5v PbGSnec8jx6PHdauo6FynBTbdYJfJ7zcbk9UmCIaPGxRU2owozMeKFm7zrZdS6p9Ez+H nl1/SY7aprCJobK/QoWiob+ce2VTivOi6AFnE/YdsMLqOTm+Uxj8MlklToVS+0mGGvyJ w3dg== X-Gm-Message-State: AOAM532NCrzt7VHyr0ftjiomjkuE+JI0gNcHLNCk5i3mW8bdge1YJ2ZT 1ZUOM3WW3LUUGGEqVgEKWdg= X-Google-Smtp-Source: ABdhPJzujfBHDw9T2hERwmvAmrgqi200Z/2YpnW3e39OAIW8u87BGP/Y0zpsyzoYH5ex1+hgeZD7oQ== X-Received: by 2002:a05:620a:35c:b0:648:e0da:8a64 with SMTP id t28-20020a05620a035c00b00648e0da8a64mr4893427qkm.73.1645800882815; Fri, 25 Feb 2022 06:54:42 -0800 (PST) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id d202-20020a3768d3000000b005f18706845dsm1318292qkc.73.2022.02.25.06.54.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Feb 2022 06:54:42 -0800 (PST) From: Peter Geis To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: Peter Geis , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 7/8] arm64: dts: rockchip: add rk356x dwc3 usb3 nodes Date: Fri, 25 Feb 2022 09:54:30 -0500 Message-Id: <20220225145432.422130-8-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225145432.422130-1-pgwipeout@gmail.com> References: <20220225145432.422130-1-pgwipeout@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the dwc3 device nodes to the rk356x device trees. The rk3566 has one usb2 capable dwc3 otg controller and one usb3 capable dwc3 host controller. The rk3568 has one usb3 capable dwc3 otg controller and one usb3 capable dwc3 host controller. Signed-off-by: Peter Geis --- arch/arm64/boot/dts/rockchip/rk3566.dtsi | 12 +++++++ arch/arm64/boot/dts/rockchip/rk3568.dtsi | 9 +++++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 45 +++++++++++++++++++++++- 3 files changed, 65 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi b/arch/arm64/boot/dts= /rockchip/rk3566.dtsi index 3839eef5e4f7..8e8b52f58f44 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi @@ -6,6 +6,10 @@ / { compatible =3D "rockchip,rk3566"; }; =20 +&pipegrf { + compatible =3D "rockchip,rk3566-pipe-grf", "syscon"; +}; + &power { power-domain@RK3568_PD_PIPE { reg =3D ; @@ -18,3 +22,11 @@ power-domain@RK3568_PD_PIPE { #power-domain-cells =3D <0>; }; }; + +&usbdrd30 { + phys =3D <&usb2phy0_otg>; + phy-names =3D "usb2-phy"; + extcon =3D <&usb2phy0>; + maximum-speed =3D "high-speed"; + snps,dis_u2_susphy_quirk; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts= /rockchip/rk3568.dtsi index 5b0f528d6818..77c044cbaaad 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -99,6 +99,10 @@ opp-1992000000 { }; }; =20 +&pipegrf { + compatible =3D "rockchip,rk3568-pipe-grf", "syscon"; +}; + &power { power-domain@RK3568_PD_PIPE { reg =3D ; @@ -114,3 +118,8 @@ power-domain@RK3568_PD_PIPE { #power-domain-cells =3D <0>; }; }; + +&usbdrd30 { + phys =3D <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; + phy-names =3D "usb2-phy", "usb3-phy"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts= /rockchip/rk356x.dtsi index 84d5d607e693..4fae5b3b326e 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -230,6 +230,50 @@ scmi_shmem: sram@0 { }; }; =20 + usbdrd30: usbdrd@fcc00000 { + compatible =3D "rockchip,rk3568-dwc3", "snps,dwc3"; + reg =3D <0x0 0xfcc00000 0x0 0x400000>; + interrupts =3D ; + clocks =3D <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>, + <&cru ACLK_USB3OTG0>, <&cru PCLK_PIPE>; + clock-names =3D "ref_clk", "suspend_clk", + "bus_clk", "grf_clk"; + dr_mode =3D "host"; + phy_type =3D "utmi_wide"; + power-domains =3D <&power RK3568_PD_PIPE>; + resets =3D <&cru SRST_USB3OTG0>; + reset-names =3D "usb3-otg"; + snps,dis_enblslpm_quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,xhci-trb-ent-quirk; + status =3D "disabled"; + }; + + usbhost30: usbhost@fd000000 { + compatible =3D "rockchip,rk3568-dwc3", "snps,dwc3"; + reg =3D <0x0 0xfd000000 0x0 0x400000>; + interrupts =3D ; + clocks =3D <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>, + <&cru ACLK_USB3OTG1>, <&cru PCLK_PIPE>; + clock-names =3D "ref_clk", "suspend_clk", + "bus_clk", "grf_clk"; + dr_mode =3D "host"; + phys =3D <&usb2phy0_host>, <&combphy1 PHY_TYPE_USB3>; + phy-names =3D "usb2-phy", "usb3-phy"; + phy_type =3D "utmi_wide"; + power-domains =3D <&power RK3568_PD_PIPE>; + resets =3D <&cru SRST_USB3OTG1>; + reset-names =3D "usb3-host"; + snps,dis_enblslpm_quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis_u2_susphy_quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + status =3D "disabled"; + }; + gic: interrupt-controller@fd400000 { compatible =3D "arm,gic-v3"; reg =3D <0x0 0xfd400000 0 0x10000>, /* GICD */ @@ -297,7 +341,6 @@ pmu_io_domains: io-domains { }; =20 pipegrf: syscon@fdc50000 { - compatible =3D "rockchip,rk3568-pipe-grf", "syscon"; reg =3D <0x0 0xfdc50000 0x0 0x1000>; }; =20 --=20 2.25.1 From nobody Tue Jun 23 21:14:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CA5CC433F5 for ; Fri, 25 Feb 2022 14:55:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241966AbiBYOzx (ORCPT ); Fri, 25 Feb 2022 09:55:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43916 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241932AbiBYOzQ (ORCPT ); Fri, 25 Feb 2022 09:55:16 -0500 Received: from mail-qk1-x72b.google.com (mail-qk1-x72b.google.com [IPv6:2607:f8b0:4864:20::72b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B12842325C2; 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Fri, 25 Feb 2022 06:54:43 -0800 (PST) Received: from master-x64.sparksnet ([2601:153:980:85b1::10]) by smtp.gmail.com with ESMTPSA id d202-20020a3768d3000000b005f18706845dsm1318292qkc.73.2022.02.25.06.54.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Feb 2022 06:54:43 -0800 (PST) From: Peter Geis To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: Peter Geis , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 8/8] arm64: dts: rockchip: enable dwc3 on quartz64-a Date: Fri, 25 Feb 2022 09:54:31 -0500 Message-Id: <20220225145432.422130-9-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225145432.422130-1-pgwipeout@gmail.com> References: <20220225145432.422130-1-pgwipeout@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The quartz64 model a has support for both the dwc3 otg port and the dwc3 host port. Add the otg power supply and dwc3 nodes to the device tree to enable support for these. Signed-off-by: Peter Geis --- .../boot/dts/rockchip/rk3566-quartz64-a.dts | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm6= 4/boot/dts/rockchip/rk3566-quartz64-a.dts index dd7f4b9b686b..a911fa1ef955 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -151,6 +151,16 @@ vcc5v0_usb20_host: vcc5v0_usb20_host { vin-supply =3D <&vcc5v0_usb>; }; =20 + vcc5v0_usb20_otg: vcc5v0_usb20_otg { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; + regulator-name =3D "vcc5v0_usb20_otg"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&dcdc_boost>; + }; + vcc3v3_sd: vcc3v3_sd { compatible =3D "regulator-fixed"; enable-active-low; @@ -187,6 +197,10 @@ vcc_wl: vcc_wl { }; }; =20 +&combphy1 { + status =3D "okay"; +}; + &cpu0 { cpu-supply =3D <&vdd_cpu>; }; @@ -672,6 +686,20 @@ &usb_host1_ohci { status =3D "okay"; }; =20 +&usb2phy0 { + status =3D "okay"; +}; + +&usb2phy0_host { + phy-supply =3D <&vcc5v0_usb20_host>; + status =3D "okay"; +}; + +&usb2phy0_otg { + phy-supply =3D <&vcc5v0_usb20_otg>; + status =3D "okay"; +}; + &usb2phy1 { status =3D "okay"; }; @@ -685,3 +713,12 @@ &usb2phy1_otg { phy-supply =3D <&vcc5v0_usb20_host>; status =3D "okay"; }; + +&usbdrd30 { + status =3D "okay"; +}; + +/* usb3 controller is muxed with sata1 */ +&usbhost30 { + status =3D "okay"; +}; --=20 2.25.1