From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0879C433F5 for ; Wed, 23 Feb 2022 13:44:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241053AbiBWNok (ORCPT ); Wed, 23 Feb 2022 08:44:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42300 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237859AbiBWNoe (ORCPT ); Wed, 23 Feb 2022 08:44:34 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E41DAC07E for ; Wed, 23 Feb 2022 05:44:06 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 798DA223EA; Wed, 23 Feb 2022 14:44:04 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623844; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XUUSc2V4sIKBECIOWlD0ga0xPNRCtlhoYSXXlDd1Uzs=; b=LQrrOnWhGU/8t3g7Ob4+4IO1KWvxaYAGDGI1j8w4L/A64grqbsFDoBvt8sqAfwDStOFPmh /nDmhBRyGBXno3tJIcVAfcubBZC/pt1sGHYczi7VvY/MaDonusSue0S1eSLaQD63/6ia+G Bx71qRHwLzMsinx5gqk3ezr0zUwyyig= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 01/32] mtd: spi-nor: atmel: unify function names Date: Wed, 23 Feb 2022 14:43:27 +0100 Message-Id: <20220223134358.1914798-2-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/atmel.c | 81 +++++++++++++++++++------------------ 1 file changed, 42 insertions(+), 39 deletions(-) diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index d6d889ce8876..656dd80a0be7 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -16,12 +16,12 @@ * is to unlock the whole flash array on startup. Therefore, we have to su= pport * exactly this operation. */ -static int atmel_at25fs_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) +static int at25fs_nor_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) { return -EOPNOTSUPP; } =20 -static int atmel_at25fs_unlock(struct spi_nor *nor, loff_t ofs, uint64_t l= en) +static int at25fs_nor_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) { int ret; =20 @@ -37,28 +37,28 @@ static int atmel_at25fs_unlock(struct spi_nor *nor, lof= f_t ofs, uint64_t len) return ret; } =20 -static int atmel_at25fs_is_locked(struct spi_nor *nor, loff_t ofs, uint64_= t len) +static int at25fs_nor_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t = len) { return -EOPNOTSUPP; } =20 -static const struct spi_nor_locking_ops atmel_at25fs_locking_ops =3D { - .lock =3D atmel_at25fs_lock, - .unlock =3D atmel_at25fs_unlock, - .is_locked =3D atmel_at25fs_is_locked, +static const struct spi_nor_locking_ops at25fs_nor_locking_ops =3D { + .lock =3D at25fs_nor_lock, + .unlock =3D at25fs_nor_unlock, + .is_locked =3D at25fs_nor_is_locked, }; =20 -static void atmel_at25fs_late_init(struct spi_nor *nor) +static void at25fs_nor_late_init(struct spi_nor *nor) { - nor->params->locking_ops =3D &atmel_at25fs_locking_ops; + nor->params->locking_ops =3D &at25fs_nor_locking_ops; } =20 -static const struct spi_nor_fixups atmel_at25fs_fixups =3D { - .late_init =3D atmel_at25fs_late_init, +static const struct spi_nor_fixups at25fs_nor_fixups =3D { + .late_init =3D at25fs_nor_late_init, }; =20 /** - * atmel_set_global_protection - Do a Global Protect or Unprotect command + * atmel_nor_set_global_protection - Do a Global Protect or Unprotect comm= and * @nor: pointer to 'struct spi_nor' * @ofs: offset in bytes * @len: len in bytes @@ -66,8 +66,8 @@ static const struct spi_nor_fixups atmel_at25fs_fixups = =3D { * * Return: 0 on success, -error otherwise. */ -static int atmel_set_global_protection(struct spi_nor *nor, loff_t ofs, - uint64_t len, bool is_protect) +static int atmel_nor_set_global_protection(struct spi_nor *nor, loff_t ofs, + uint64_t len, bool is_protect) { int ret; u8 sr; @@ -116,17 +116,20 @@ static int atmel_set_global_protection(struct spi_nor= *nor, loff_t ofs, return spi_nor_write_sr(nor, nor->bouncebuf, 1); } =20 -static int atmel_global_protect(struct spi_nor *nor, loff_t ofs, uint64_t = len) +static int atmel_nor_global_protect(struct spi_nor *nor, loff_t ofs, + uint64_t len) { - return atmel_set_global_protection(nor, ofs, len, true); + return atmel_nor_set_global_protection(nor, ofs, len, true); } =20 -static int atmel_global_unprotect(struct spi_nor *nor, loff_t ofs, uint64_= t len) +static int atmel_nor_global_unprotect(struct spi_nor *nor, loff_t ofs, + uint64_t len) { - return atmel_set_global_protection(nor, ofs, len, false); + return atmel_nor_set_global_protection(nor, ofs, len, false); } =20 -static int atmel_is_global_protected(struct spi_nor *nor, loff_t ofs, uint= 64_t len) +static int atmel_nor_is_global_protected(struct spi_nor *nor, loff_t ofs, + uint64_t len) { int ret; =20 @@ -140,47 +143,47 @@ static int atmel_is_global_protected(struct spi_nor *= nor, loff_t ofs, uint64_t l return ((nor->bouncebuf[0] & ATMEL_SR_GLOBAL_PROTECT_MASK) =3D=3D ATMEL_S= R_GLOBAL_PROTECT_MASK); } =20 -static const struct spi_nor_locking_ops atmel_global_protection_ops =3D { - .lock =3D atmel_global_protect, - .unlock =3D atmel_global_unprotect, - .is_locked =3D atmel_is_global_protected, +static const struct spi_nor_locking_ops atmel_nor_global_protection_ops = =3D { + .lock =3D atmel_nor_global_protect, + .unlock =3D atmel_nor_global_unprotect, + .is_locked =3D atmel_nor_is_global_protected, }; =20 -static void atmel_global_protection_late_init(struct spi_nor *nor) +static void atmel_nor_global_protection_late_init(struct spi_nor *nor) { - nor->params->locking_ops =3D &atmel_global_protection_ops; + nor->params->locking_ops =3D &atmel_nor_global_protection_ops; } =20 -static const struct spi_nor_fixups atmel_global_protection_fixups =3D { - .late_init =3D atmel_global_protection_late_init, +static const struct spi_nor_fixups atmel_nor_global_protection_fixups =3D { + .late_init =3D atmel_nor_global_protection_late_init, }; =20 -static const struct flash_info atmel_parts[] =3D { +static const struct flash_info atmel_nor_parts[] =3D { /* Atmel -- some are (confusingly) marketed as "DataFlash" */ { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4) FLAGS(SPI_NOR_HAS_LOCK) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_at25fs_fixups }, + .fixups =3D &at25fs_nor_fixups }, { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8) FLAGS(SPI_NOR_HAS_LOCK) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_at25fs_fixups }, + .fixups =3D &at25fs_nor_fixups }, { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at25df321", INFO(0x1f4700, 0, 64 * 1024, 64) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at25sl321", INFO(0x1f4216, 0, 64 * 1024, 64) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8) @@ -188,21 +191,21 @@ static const struct flash_info atmel_parts[] =3D { { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at45db081d", INFO(0x1f2500, 0, 64 * 1024, 16) NO_SFDP_FLAGS(SECT_4K) }, }; =20 const struct spi_nor_manufacturer spi_nor_atmel =3D { .name =3D "atmel", - .parts =3D atmel_parts, - .nparts =3D ARRAY_SIZE(atmel_parts), + .parts =3D atmel_nor_parts, + .nparts =3D ARRAY_SIZE(atmel_nor_parts), }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3179CC433EF for ; Wed, 23 Feb 2022 13:44:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241058AbiBWNop (ORCPT ); Wed, 23 Feb 2022 08:44:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42302 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236640AbiBWNoe (ORCPT ); Wed, 23 Feb 2022 08:44:34 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3897EAC078 for ; Wed, 23 Feb 2022 05:44:07 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 31862223ED; Wed, 23 Feb 2022 14:44:05 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623845; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6KySmYB6O5LVk/V3X9X0DNWVLALSZlfHUWvYbZ+/N7A=; b=HRQgNsUQjs9wRioxW1AcZuNZ9MT6OWzyAWcgSNqzow14P0pccrHZKCS6XIlgLp6Dxbpafp 4qZS6mQUAM9K+g9iaSnP6msLV0HruykWfNLHlKSLgXkW486vHnvTHvcoHDd+Q3FmpiKsTa JGUOLxcSaNzqgWOyOE8Xin29xK6S74A= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 02/32] mtd: spi-nor: catalyst: unify function names Date: Wed, 23 Feb 2022 14:43:28 +0100 Message-Id: <20220223134358.1914798-3-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/catalyst.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/catalyst.c b/drivers/mtd/spi-nor/catalyst.c index ae4d67e01bb3..6d310815fb12 100644 --- a/drivers/mtd/spi-nor/catalyst.c +++ b/drivers/mtd/spi-nor/catalyst.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info catalyst_parts[] =3D { +static const struct flash_info catalyst_nor_parts[] =3D { /* Catalyst / On Semiconductor -- non-JEDEC */ { "cat25c11", CAT25_INFO(16, 8, 16, 1) }, { "cat25c03", CAT25_INFO(32, 8, 16, 2) }, @@ -19,6 +19,6 @@ static const struct flash_info catalyst_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_catalyst =3D { .name =3D "catalyst", - .parts =3D catalyst_parts, - .nparts =3D ARRAY_SIZE(catalyst_parts), + .parts =3D catalyst_nor_parts, + .nparts =3D ARRAY_SIZE(catalyst_nor_parts), }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E16F6C433FE for ; Wed, 23 Feb 2022 13:44:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239871AbiBWNos (ORCPT ); Wed, 23 Feb 2022 08:44:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42314 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240776AbiBWNof (ORCPT ); Wed, 23 Feb 2022 08:44:35 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7164AC901 for ; Wed, 23 Feb 2022 05:44:07 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id C703A223EF; Wed, 23 Feb 2022 14:44:05 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623845; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=v8kj4z85YfDGYN2RrUp3+LkianQys9bzXdTacdc1Pnc=; b=AxsuG8vXO9+h5o+EyNbLQvDDVbifVrpxYWBmO4JuUcu83pLI42vriNP8abeqE1Ih7Up2Pk VPrqFnxR5JE6nI7Y+agHg8dLtKbuoCS45CKYW+Aadd4naEBNO+kqMFuTcvljxu86ic6XNz TgzQXAMaMYAdElA6IixeV0FFloAMM+I= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 03/32] mtd: spi-nor: eon: unify function names Date: Wed, 23 Feb 2022 14:43:29 +0100 Message-Id: <20220223134358.1914798-4-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/eon.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/eon.c b/drivers/mtd/spi-nor/eon.c index 4f3ee6331f37..8c1c57530281 100644 --- a/drivers/mtd/spi-nor/eon.c +++ b/drivers/mtd/spi-nor/eon.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info eon_parts[] =3D { +static const struct flash_info eon_nor_parts[] =3D { /* EON -- en25xxx */ { "en25f32", INFO(0x1c3116, 0, 64 * 1024, 64) NO_SFDP_FLAGS(SECT_4K) }, @@ -32,6 +32,6 @@ static const struct flash_info eon_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_eon =3D { .name =3D "eon", - .parts =3D eon_parts, - .nparts =3D ARRAY_SIZE(eon_parts), + .parts =3D eon_nor_parts, + .nparts =3D ARRAY_SIZE(eon_nor_parts), }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D243C433F5 for ; Wed, 23 Feb 2022 13:44:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241079AbiBWNov (ORCPT ); Wed, 23 Feb 2022 08:44:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42312 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238969AbiBWNof (ORCPT ); Wed, 23 Feb 2022 08:44:35 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB72EAC07D for ; Wed, 23 Feb 2022 05:44:07 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 1D374223F0; Wed, 23 Feb 2022 14:44:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623846; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=012orf1gW76hymkl0C3TlOpBllNWtHPFjOMTZe1Ouug=; b=BcY9r8jZGx0J9qCscmqZ+oViqpmbwFn3tpf0h/jD29aw5s0Hj+gM8CS7+AiqTv9Hxldh8J QclrqqsIo6BADNH8X7/UiP9RyU7JSvVrw33RWlmTouv3l84bW2UzfcK1CAtrCdzyCFCP4V SkmRJOZef9oAiGFG4qPiQ8sbn4rc0O4= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 04/32] mtd: spi-nor: esmt: unify function names Date: Wed, 23 Feb 2022 14:43:30 +0100 Message-Id: <20220223134358.1914798-5-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/esmt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/esmt.c b/drivers/mtd/spi-nor/esmt.c index ace1da221566..79e2408f4998 100644 --- a/drivers/mtd/spi-nor/esmt.c +++ b/drivers/mtd/spi-nor/esmt.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info esmt_parts[] =3D { +static const struct flash_info esmt_nor_parts[] =3D { /* ESMT */ { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) @@ -23,6 +23,6 @@ static const struct flash_info esmt_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_esmt =3D { .name =3D "esmt", - .parts =3D esmt_parts, - .nparts =3D ARRAY_SIZE(esmt_parts), + .parts =3D esmt_nor_parts, + .nparts =3D ARRAY_SIZE(esmt_nor_parts), }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49C9CC433EF for ; Wed, 23 Feb 2022 13:44:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239074AbiBWNo4 (ORCPT ); Wed, 23 Feb 2022 08:44:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241029AbiBWNog (ORCPT ); Wed, 23 Feb 2022 08:44:36 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 63EBBAC902 for ; Wed, 23 Feb 2022 05:44:08 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 58880223F6; Wed, 23 Feb 2022 14:44:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623846; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=n2zFeBW08LKPxKUdmwNwuWbORM/DAXB9DRKqA5JCYYI=; b=SyafD9sDpoONl3FwW5aP/wKWvOkXq+vmEzxW/tM15zPWAmk7B+C+OYISYXNusQEwjIseyc 7Ru0XpKpYdjysqbcCkbXTrO+14UN2VASGpYgtKrCAOfesFP4TJ14XxHS0Q0l9P56xNagBy +yBMNYtv3JspTtC9u6yi0fzpHA7RroQ= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 05/32] mtd: spi-nor: everspin: unify function names Date: Wed, 23 Feb 2022 14:43:31 +0100 Message-Id: <20220223134358.1914798-6-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/everspin.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/everspin.c b/drivers/mtd/spi-nor/everspin.c index f6c6fb36a428..84a07c2e0536 100644 --- a/drivers/mtd/spi-nor/everspin.c +++ b/drivers/mtd/spi-nor/everspin.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info everspin_parts[] =3D { +static const struct flash_info everspin_nor_parts[] =3D { /* Everspin */ { "mr25h128", CAT25_INFO(16 * 1024, 1, 256, 2) }, { "mr25h256", CAT25_INFO(32 * 1024, 1, 256, 2) }, @@ -18,6 +18,6 @@ static const struct flash_info everspin_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_everspin =3D { .name =3D "everspin", - .parts =3D everspin_parts, - .nparts =3D ARRAY_SIZE(everspin_parts), + .parts =3D everspin_nor_parts, + .nparts =3D ARRAY_SIZE(everspin_nor_parts), }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B234C433EF for ; Wed, 23 Feb 2022 13:44:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241073AbiBWNo7 (ORCPT ); Wed, 23 Feb 2022 08:44:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42342 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241031AbiBWNog (ORCPT ); Wed, 23 Feb 2022 08:44:36 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A7BDAC903 for ; Wed, 23 Feb 2022 05:44:08 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 0B3D4223F7; Wed, 23 Feb 2022 14:44:07 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623847; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=k/hqMmrzoRoWJwWZtaVFPrkzeSIrjpsXVnI5pXFm2mI=; b=rWHU3XMSc9yDw4CaREp4+r+PVuUFKynLVjbDw+k5HlZxM3X+Dhe728CMAX9eA4f9ZMxwlZ WabQzo+evyBYcRTXXieO2x/Y7G9vR+B8GOO2ARO94c19lUNfVAceQoydBkEtEksgLJYFVP HzKmWuYHKL+7JpJ8eowB4ujfj0u/6H0= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 06/32] mtd: spi-nor: fujitsu: unify function names Date: Wed, 23 Feb 2022 14:43:32 +0100 Message-Id: <20220223134358.1914798-7-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/fujitsu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/fujitsu.c b/drivers/mtd/spi-nor/fujitsu.c index 5fa8f04f2e35..69cffc5c73ef 100644 --- a/drivers/mtd/spi-nor/fujitsu.c +++ b/drivers/mtd/spi-nor/fujitsu.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info fujitsu_parts[] =3D { +static const struct flash_info fujitsu_nor_parts[] =3D { /* Fujitsu */ { "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1) FLAGS(SPI_NOR_NO_ERASE) }, @@ -16,6 +16,6 @@ static const struct flash_info fujitsu_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_fujitsu =3D { .name =3D "fujitsu", - .parts =3D fujitsu_parts, - .nparts =3D ARRAY_SIZE(fujitsu_parts), + .parts =3D fujitsu_nor_parts, + .nparts =3D ARRAY_SIZE(fujitsu_nor_parts), }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89642C433EF for ; Wed, 23 Feb 2022 13:44:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241077AbiBWNpG (ORCPT ); Wed, 23 Feb 2022 08:45:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241034AbiBWNog (ORCPT ); Wed, 23 Feb 2022 08:44:36 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 28DD5AC07E for ; Wed, 23 Feb 2022 05:44:09 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 473172241C; Wed, 23 Feb 2022 14:44:07 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623847; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5NdLJVXZ/dtLRMdfMSUr7KgGIAvU7mDPEd3rJRjy/cI=; b=kmHW1+5HTs27hYVZp79Sw7eVqXWAmxsYCwghxG13VU7SZKN55Nwnl2Ejo+zU8MmABgswDz TrfAu4Ug2ZvuTuZhi3EBH5NnD1PWkRZTQxmXCOMCECFweIlDWA44NNg8RSOX1VyRPOezzc qiXleGVKps89JgZUdFj/LO+hjR37EZM= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 07/32] mtd: spi-nor: gigadevice: unify function names Date: Wed, 23 Feb 2022 14:43:33 +0100 Message-Id: <20220223134358.1914798-8-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/gigadevice.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadev= ice.c index 0807d0263808..119b38e6fc2a 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -23,7 +23,7 @@ static const struct spi_nor_fixups gd25q256_fixups =3D { .default_init =3D gd25q256_default_init, }; =20 -static const struct flash_info gigadevice_parts[] =3D { +static const struct flash_info gigadevice_nor_parts[] =3D { { "gd25q16", INFO(0xc84015, 0, 64 * 1024, 32) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | @@ -61,6 +61,6 @@ static const struct flash_info gigadevice_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_gigadevice =3D { .name =3D "gigadevice", - .parts =3D gigadevice_parts, - .nparts =3D ARRAY_SIZE(gigadevice_parts), + .parts =3D gigadevice_nor_parts, + .nparts =3D ARRAY_SIZE(gigadevice_nor_parts), }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3A53C433EF for ; Wed, 23 Feb 2022 13:44:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241123AbiBWNpD (ORCPT ); Wed, 23 Feb 2022 08:45:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241032AbiBWNog (ORCPT ); Wed, 23 Feb 2022 08:44:36 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 34BA8AC901 for ; Wed, 23 Feb 2022 05:44:09 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 881DD22438; Wed, 23 Feb 2022 14:44:07 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623847; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9H1QgT0l/ROJ6PbNq9W4bHH9dAqSu2ls1W1SdcFcyg0=; b=ZfXzB2FziwAZcTTzMMdqvYGJ1L5DpfuxO2THZ8BbyFI7tBMfx2H2aXRKDw8auFI0C1d2sg AX7Zs8qcFjJMITlBv12splfBlCH1MVRlxBCtZvdoa/JgNa1/yTWncfdZMhLQPqpdf8xsyC 6M3jc013RfJbTN975IV3Y2x2TD9GVsI= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 08/32] mtd: spi-nor: intel: unify function names Date: Wed, 23 Feb 2022 14:43:34 +0100 Message-Id: <20220223134358.1914798-9-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/intel.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/intel.c b/drivers/mtd/spi-nor/intel.c index d64e114e9fb4..9179f2d09cba 100644 --- a/drivers/mtd/spi-nor/intel.c +++ b/drivers/mtd/spi-nor/intel.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info intel_parts[] =3D { +static const struct flash_info intel_nor_parts[] =3D { /* Intel/Numonyx -- xxxs33b */ { "160s33b", INFO(0x898911, 0, 64 * 1024, 32) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, @@ -20,6 +20,6 @@ static const struct flash_info intel_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_intel =3D { .name =3D "intel", - .parts =3D intel_parts, - .nparts =3D ARRAY_SIZE(intel_parts), + .parts =3D intel_nor_parts, + .nparts =3D ARRAY_SIZE(intel_nor_parts), }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C65AC433EF for ; Wed, 23 Feb 2022 13:44:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241097AbiBWNpK (ORCPT ); Wed, 23 Feb 2022 08:45:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241037AbiBWNoi (ORCPT ); Wed, 23 Feb 2022 08:44:38 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D43B9AC904 for ; Wed, 23 Feb 2022 05:44:09 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id C0E5622441; Wed, 23 Feb 2022 14:44:07 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623847; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=nvEr6G9dficcmukv0DH8TkWOS6x8eCo7LKw8so44zF4=; b=EO7EOA146pRg5W7/rayg5kVRI48qM77sk7J7J/+sR7k+uBuBxh+pmaWYZaFs63YonwC/dY y2qTJRXG049fg8B5A8e1tVS9SDwF7xVeEnlsP/YbYLOdER/jLCzFpetrbgUAnnAOGariTt ZlsdbajSWZ/kZr8XlgKCc1bpQwIAOzc= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 09/32] mtd: spi-nor: issi: unify function names Date: Wed, 23 Feb 2022 14:43:35 +0100 Message-Id: <20220223134358.1914798-10-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/issi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index 23629b919ade..c012bc2486e1 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -29,7 +29,7 @@ static const struct spi_nor_fixups is25lp256_fixups =3D { .post_bfpt =3D is25lp256_post_bfpt_fixups, }; =20 -static const struct flash_info issi_parts[] =3D { +static const struct flash_info issi_nor_parts[] =3D { /* ISSI */ { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2) NO_SFDP_FLAGS(SECT_4K) }, @@ -69,18 +69,18 @@ static const struct flash_info issi_parts[] =3D { NO_SFDP_FLAGS(SECT_4K) }, }; =20 -static void issi_default_init(struct spi_nor *nor) +static void issi_nor_default_init(struct spi_nor *nor) { nor->params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; } =20 static const struct spi_nor_fixups issi_fixups =3D { - .default_init =3D issi_default_init, + .default_init =3D issi_nor_default_init, }; =20 const struct spi_nor_manufacturer spi_nor_issi =3D { .name =3D "issi", - .parts =3D issi_parts, - .nparts =3D ARRAY_SIZE(issi_parts), + .parts =3D issi_nor_parts, + .nparts =3D ARRAY_SIZE(issi_nor_parts), .fixups =3D &issi_fixups, }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6154DC433F5 for ; Wed, 23 Feb 2022 13:44:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241183AbiBWNpP (ORCPT ); Wed, 23 Feb 2022 08:45:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241036AbiBWNoi (ORCPT ); Wed, 23 Feb 2022 08:44:38 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 33BEFAC909 for ; Wed, 23 Feb 2022 05:44:10 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 86DA52244E; Wed, 23 Feb 2022 14:44:08 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623848; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mxAfkU+dAADC9WLJJSEBdqTHjHBT9Wm1HMlwnh6ZASc=; b=GLdzsi7o0FckyrOA9byawxQwLSaCGSp0C/EOTYoWQB+k1mMFy6gQFVbZjV3vynRb05wTyR 1h8Ma0YT0qlL0xPQ9ZPUkM4BYBzxAoj0g6GigkMo4mjGkc+Cs8/GnLXsHYQSiVNutTW4iV 3hBsCMG+E8grCV7s/12HNINeDHMaYcw= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 10/32] mtd: spi-nor: macronix: unify function names Date: Wed, 23 Feb 2022 14:43:36 +0100 Message-Id: <20220223134358.1914798-11-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/macronix.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 97dba1ae7fb1..d81a4cb2812b 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -32,7 +32,7 @@ static const struct spi_nor_fixups mx25l25635_fixups =3D { .post_bfpt =3D mx25l25635_post_bfpt_fixups, }; =20 -static const struct flash_info macronix_parts[] =3D { +static const struct flash_info macronix_nor_parts[] =3D { /* Macronix */ { "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1) NO_SFDP_FLAGS(SECT_4K) }, @@ -102,19 +102,19 @@ static const struct flash_info macronix_parts[] =3D { FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, }; =20 -static void macronix_default_init(struct spi_nor *nor) +static void macronix_nor_default_init(struct spi_nor *nor) { nor->params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; nor->params->set_4byte_addr_mode =3D spi_nor_set_4byte_addr_mode; } =20 -static const struct spi_nor_fixups macronix_fixups =3D { - .default_init =3D macronix_default_init, +static const struct spi_nor_fixups macronix_nor_fixups =3D { + .default_init =3D macronix_nor_default_init, }; =20 const struct spi_nor_manufacturer spi_nor_macronix =3D { .name =3D "macronix", - .parts =3D macronix_parts, - .nparts =3D ARRAY_SIZE(macronix_parts), - .fixups =3D ¯onix_fixups, + .parts =3D macronix_nor_parts, + .nparts =3D ARRAY_SIZE(macronix_nor_parts), + .fixups =3D ¯onix_nor_fixups, }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4DFCDC433FE for ; Wed, 23 Feb 2022 13:44:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241138AbiBWNpN (ORCPT ); Wed, 23 Feb 2022 08:45:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42396 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241038AbiBWNoi (ORCPT ); Wed, 23 Feb 2022 08:44:38 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 906C8AC902 for ; Wed, 23 Feb 2022 05:44:10 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id D73A22244F; Wed, 23 Feb 2022 14:44:08 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623849; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2K+vGEHJzHmcPcjSMsyw/2Iai2nusSM6WwW3dzCQoWw=; b=uw/MjrF97k7UNMlScc9NpL9cwK8PEcAqfEuAxOpmHO8WBCz+Gg3RVzgYCsJRpcqlTZvxbn orcC48OTHsDoBoD9x8/Lwt1wwN4L79z4q04TKrwdgENxrqdkTLifdCcYNol8m5YrlgYMWe gFA2hheUE4tqKqQ+iokzLC70dXIZIt0= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 11/32] mtd: spi-nor: micron-st: unify function names Date: Wed, 23 Feb 2022 14:43:37 +0100 Message-Id: <20220223134358.1914798-12-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/micron-st.c | 34 ++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index bb95b1aabf74..7a68f2ad3ea1 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -17,7 +17,7 @@ #define SPINOR_MT_OCT_DTR 0xe7 /* Enable Octal DTR. */ #define SPINOR_MT_EXSPI 0xff /* Enable Extended SPI (default) */ =20 -static int spi_nor_micron_octal_dtr_enable(struct spi_nor *nor, bool enabl= e) +static int micron_st_nor_octal_dtr_enable(struct spi_nor *nor, bool enable) { struct spi_mem_op op; u8 *buf =3D nor->bouncebuf; @@ -102,7 +102,7 @@ static int spi_nor_micron_octal_dtr_enable(struct spi_n= or *nor, bool enable) =20 static void mt35xu512aba_default_init(struct spi_nor *nor) { - nor->params->octal_dtr_enable =3D spi_nor_micron_octal_dtr_enable; + nor->params->octal_dtr_enable =3D micron_st_nor_octal_dtr_enable; } =20 static void mt35xu512aba_post_sfdp_fixup(struct spi_nor *nor) @@ -130,7 +130,7 @@ static const struct spi_nor_fixups mt35xu512aba_fixups = =3D { .post_sfdp =3D mt35xu512aba_post_sfdp_fixup, }; =20 -static const struct flash_info micron_parts[] =3D { +static const struct flash_info micron_nor_parts[] =3D { { "mt35xu512aba", INFO(0x2c5b1a, 0, 128 * 1024, 512) FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_OCTAL_READ | @@ -143,7 +143,7 @@ static const struct flash_info micron_parts[] =3D { FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, }; =20 -static const struct flash_info st_parts[] =3D { +static const struct flash_info st_nor_parts[] =3D { { "n25q016a", INFO(0x20bb15, 0, 64 * 1024, 32) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, { "n25q032", INFO(0x20ba16, 0, 64 * 1024, 64) @@ -250,15 +250,15 @@ static const struct flash_info st_parts[] =3D { }; =20 /** - * st_micron_set_4byte_addr_mode() - Set 4-byte address mode for ST and Mi= cron - * flashes. + * micron_st_nor_set_4byte_addr_mode() - Set 4-byte address mode for ST and + * Micron flashes. * @nor: pointer to 'struct spi_nor'. * @enable: true to enter the 4-byte address mode, false to exit the 4-byte * address mode. * * Return: 0 on success, -errno otherwise. */ -static int st_micron_set_4byte_addr_mode(struct spi_nor *nor, bool enable) +static int micron_st_nor_set_4byte_addr_mode(struct spi_nor *nor, bool ena= ble) { int ret; =20 @@ -273,28 +273,28 @@ static int st_micron_set_4byte_addr_mode(struct spi_n= or *nor, bool enable) return spi_nor_write_disable(nor); } =20 -static void micron_st_default_init(struct spi_nor *nor) +static void micron_st_nor_default_init(struct spi_nor *nor) { nor->flags |=3D SNOR_F_HAS_LOCK; nor->flags &=3D ~SNOR_F_HAS_16BIT_SR; nor->params->quad_enable =3D NULL; - nor->params->set_4byte_addr_mode =3D st_micron_set_4byte_addr_mode; + nor->params->set_4byte_addr_mode =3D micron_st_nor_set_4byte_addr_mode; } =20 -static const struct spi_nor_fixups micron_st_fixups =3D { - .default_init =3D micron_st_default_init, +static const struct spi_nor_fixups micron_st_nor_fixups =3D { + .default_init =3D micron_st_nor_default_init, }; =20 const struct spi_nor_manufacturer spi_nor_micron =3D { .name =3D "micron", - .parts =3D micron_parts, - .nparts =3D ARRAY_SIZE(micron_parts), - .fixups =3D µn_st_fixups, + .parts =3D micron_nor_parts, + .nparts =3D ARRAY_SIZE(micron_nor_parts), + .fixups =3D µn_st_nor_fixups, }; =20 const struct spi_nor_manufacturer spi_nor_st =3D { .name =3D "st", - .parts =3D st_parts, - .nparts =3D ARRAY_SIZE(st_parts), - .fixups =3D µn_st_fixups, + .parts =3D st_nor_parts, + .nparts =3D ARRAY_SIZE(st_nor_parts), + .fixups =3D µn_st_nor_fixups, }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D3AEC433F5 for ; Wed, 23 Feb 2022 13:44:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241188AbiBWNpS (ORCPT ); Wed, 23 Feb 2022 08:45:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42430 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241043AbiBWNoj (ORCPT ); Wed, 23 Feb 2022 08:44:39 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 594D4AC901 for ; Wed, 23 Feb 2022 05:44:11 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 3D07F22450; Wed, 23 Feb 2022 14:44:09 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623849; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=emse0VG+uvPnYP/0DVMRTDTPmxiGaj9AioEpZtVOwP0=; b=lOXIOIar49Yk725Tyy7+P0Kao0DZCUfraicdaDBYXhQFw5EFlnbkGJ+zEYRX1Oy0MB7RQo g1jVim8bR+8ASE5S7mPK4Mo7ziQUDd1QYFIARMVtDrz3WcuNv1neeNl8PeOcgsVlXXrhN6 0ebR1QU8vZd7Xc7zI4b54K9rcDc1/6s= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 12/32] mtd: spi-nor: spansion: unify function names Date: Wed, 23 Feb 2022 14:43:38 +0100 Message-Id: <20220223134358.1914798-13-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/spansion.c | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 534196b1d3e7..5affa8ae43a7 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -20,7 +20,7 @@ #define SPINOR_OP_CYPRESS_RD_FAST 0xee =20 /** - * spi_nor_cypress_octal_dtr_enable() - Enable octal DTR on Cypress flashe= s. + * cypress_nor_octal_dtr_enable() - Enable octal DTR on Cypress flashes. * @nor: pointer to a 'struct spi_nor' * @enable: whether to enable or disable Octal DTR * @@ -29,7 +29,7 @@ * * Return: 0 on success, -errno otherwise. */ -static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enab= le) +static int cypress_nor_octal_dtr_enable(struct spi_nor *nor, bool enable) { struct spi_mem_op op; u8 *buf =3D nor->bouncebuf; @@ -116,7 +116,7 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_= nor *nor, bool enable) =20 static void s28hs512t_default_init(struct spi_nor *nor) { - nor->params->octal_dtr_enable =3D spi_nor_cypress_octal_dtr_enable; + nor->params->octal_dtr_enable =3D cypress_nor_octal_dtr_enable; nor->params->writesize =3D 16; } =20 @@ -183,9 +183,9 @@ static const struct spi_nor_fixups s28hs512t_fixups =3D= { }; =20 static int -s25fs_s_post_bfpt_fixups(struct spi_nor *nor, - const struct sfdp_parameter_header *bfpt_header, - const struct sfdp_bfpt *bfpt) +s25fs_s_nor_post_bfpt_fixups(struct spi_nor *nor, + const struct sfdp_parameter_header *bfpt_header, + const struct sfdp_bfpt *bfpt) { /* * The S25FS-S chip family reports 512-byte pages in BFPT but @@ -198,11 +198,11 @@ s25fs_s_post_bfpt_fixups(struct spi_nor *nor, return 0; } =20 -static const struct spi_nor_fixups s25fs_s_fixups =3D { - .post_bfpt =3D s25fs_s_post_bfpt_fixups, +static const struct spi_nor_fixups s25fs_s_nor_fixups =3D { + .post_bfpt =3D s25fs_s_nor_post_bfpt_fixups, }; =20 -static const struct flash_info spansion_parts[] =3D { +static const struct flash_info spansion_nor_parts[] =3D { /* Spansion/Cypress -- single (large) sector size only, at least * for the chips listed here (without boot sectors). */ @@ -229,7 +229,7 @@ static const struct flash_info spansion_parts[] =3D { { "s25fs128s1", INFO6(0x012018, 0x4d0181, 64 * 1024, 256) FLAGS(USE_CLSR) NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - .fixups =3D &s25fs_s_fixups, }, + .fixups =3D &s25fs_s_nor_fixups, }, { "s25fs256s0", INFO6(0x010219, 0x4d0081, 256 * 1024, 128) FLAGS(USE_CLSR) NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, @@ -239,7 +239,7 @@ static const struct flash_info spansion_parts[] =3D { { "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256) FLAGS(USE_CLSR) NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - .fixups =3D &s25fs_s_fixups, }, + .fixups =3D &s25fs_s_nor_fixups, }, { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64) }, { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256) }, { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64) @@ -294,7 +294,7 @@ static const struct flash_info spansion_parts[] =3D { }, }; =20 -static void spansion_late_init(struct spi_nor *nor) +static void spansion_nor_late_init(struct spi_nor *nor) { if (nor->params->size <=3D SZ_16M) return; @@ -305,13 +305,13 @@ static void spansion_late_init(struct spi_nor *nor) nor->mtd.erasesize =3D nor->info->sector_size; } =20 -static const struct spi_nor_fixups spansion_fixups =3D { - .late_init =3D spansion_late_init, +static const struct spi_nor_fixups spansion_nor_fixups =3D { + .late_init =3D spansion_nor_late_init, }; =20 const struct spi_nor_manufacturer spi_nor_spansion =3D { .name =3D "spansion", - .parts =3D spansion_parts, - .nparts =3D ARRAY_SIZE(spansion_parts), - .fixups =3D &spansion_fixups, + .parts =3D spansion_nor_parts, + .nparts =3D ARRAY_SIZE(spansion_nor_parts), + .fixups =3D &spansion_nor_fixups, }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7BD2AC433FE for ; Wed, 23 Feb 2022 13:44:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241199AbiBWNpV (ORCPT ); Wed, 23 Feb 2022 08:45:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42456 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241046AbiBWNoj (ORCPT ); Wed, 23 Feb 2022 08:44:39 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CCBF9AC912 for ; Wed, 23 Feb 2022 05:44:11 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 1255222455; Wed, 23 Feb 2022 14:44:10 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623850; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PO24KqasPOTM4jCeX4Ybk7x9YJsT4PPkecU/Xv5RjVk=; b=qzuPpoIoijOQPFiqR8P0FyKDLX2LI/IMPqD/ZVnSQDfKqBrWK+Z+dbl1PYvZGQtOaZ6V9P uhSXpU2XOssYir35+mHSqv5FhXT5vh7w9bymS65H7+Hzuoqhs1Qs+SjbaoKjss4SUJ2fDV zi+ys4A7DaqSXdzksNvZUR9HuLKhLnc= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 13/32] mtd: spi-nor: sst: unify function names Date: Wed, 23 Feb 2022 14:43:39 +0100 Message-Id: <20220223134358.1914798-14-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/sst.c | 44 +++++++++++++++++++-------------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index 30183e9189b9..63bcc97bf978 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -13,12 +13,12 @@ =20 #define SST26VF_CR_BPNV BIT(3) =20 -static int sst26vf_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) +static int sst26vf_nor_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) { return -EOPNOTSUPP; } =20 -static int sst26vf_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) +static int sst26vf_nor_unlock(struct spi_nor *nor, loff_t ofs, uint64_t le= n) { int ret; =20 @@ -38,27 +38,27 @@ static int sst26vf_unlock(struct spi_nor *nor, loff_t o= fs, uint64_t len) return spi_nor_global_block_unlock(nor); } =20 -static int sst26vf_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) +static int sst26vf_nor_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t= len) { return -EOPNOTSUPP; } =20 -static const struct spi_nor_locking_ops sst26vf_locking_ops =3D { - .lock =3D sst26vf_lock, - .unlock =3D sst26vf_unlock, - .is_locked =3D sst26vf_is_locked, +static const struct spi_nor_locking_ops sst26vf_nor_locking_ops =3D { + .lock =3D sst26vf_nor_lock, + .unlock =3D sst26vf_nor_unlock, + .is_locked =3D sst26vf_nor_is_locked, }; =20 -static void sst26vf_late_init(struct spi_nor *nor) +static void sst26vf_nor_late_init(struct spi_nor *nor) { - nor->params->locking_ops =3D &sst26vf_locking_ops; + nor->params->locking_ops =3D &sst26vf_nor_locking_ops; } =20 -static const struct spi_nor_fixups sst26vf_fixups =3D { - .late_init =3D sst26vf_late_init, +static const struct spi_nor_fixups sst26vf_nor_fixups =3D { + .late_init =3D sst26vf_nor_late_init, }; =20 -static const struct flash_info sst_parts[] =3D { +static const struct flash_info sst_nor_parts[] =3D { /* SST -- large erase sizes are "overlays", "sectors" are 4K */ { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) @@ -114,11 +114,11 @@ static const struct flash_info sst_parts[] =3D { { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - .fixups =3D &sst26vf_fixups }, + .fixups =3D &sst26vf_nor_fixups }, }; =20 -static int sst_write(struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, const u_char *buf) +static int sst_nor_write(struct mtd_info *mtd, loff_t to, size_t len, + size_t *retlen, const u_char *buf) { struct spi_nor *nor =3D mtd_to_spi_nor(mtd); size_t actual =3D 0; @@ -203,19 +203,19 @@ static int sst_write(struct mtd_info *mtd, loff_t to,= size_t len, return ret; } =20 -static void sst_late_init(struct spi_nor *nor) +static void sst_nor_late_init(struct spi_nor *nor) { if (nor->info->mfr_flags & SST_WRITE) - nor->mtd._write =3D sst_write; + nor->mtd._write =3D sst_nor_write; } =20 -static const struct spi_nor_fixups sst_fixups =3D { - .late_init =3D sst_late_init, +static const struct spi_nor_fixups sst_nor_fixups =3D { + .late_init =3D sst_nor_late_init, }; =20 const struct spi_nor_manufacturer spi_nor_sst =3D { .name =3D "sst", - .parts =3D sst_parts, - .nparts =3D ARRAY_SIZE(sst_parts), - .fixups =3D &sst_fixups, + .parts =3D sst_nor_parts, + .nparts =3D ARRAY_SIZE(sst_nor_parts), + .fixups =3D &sst_nor_fixups, }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 861D1C433EF for ; Wed, 23 Feb 2022 13:44:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241194AbiBWNpT (ORCPT ); Wed, 23 Feb 2022 08:45:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241047AbiBWNoj (ORCPT ); Wed, 23 Feb 2022 08:44:39 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 16029AC909 for ; Wed, 23 Feb 2022 05:44:12 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 7BFAF22452; Wed, 23 Feb 2022 14:44:10 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623850; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5l3T+A753bm/ht5hBDi25g4VPQ8SXpBTWIZCLIDWjuQ=; b=Y//ncJA62WYbQoKdltkAgN/XG3MDUwmtbmak3OcCnnbIY3UGe+jFdlHBLIKuWs+HVDjVq1 P003yA8JiFdUfr8MirIxe9mpVDMySqLnNjVhJ4LzkGLZqSWAbli7XNqqXPy53+tnN8DQP2 LgxtO5+32ocVbaL7BAuHBz5LALRM1Ys= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 14/32] mtd: spi-nor: winbond: unify function names Date: Wed, 23 Feb 2022 14:43:40 +0100 Message-Id: <20220223134358.1914798-15-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/winbond.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 3d91888882e4..1e8fb571680b 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -32,7 +32,7 @@ static const struct spi_nor_fixups w25q256_fixups =3D { .post_bfpt =3D w25q256_post_bfpt_fixups, }; =20 -static const struct flash_info winbond_parts[] =3D { +static const struct flash_info winbond_nor_parts[] =3D { /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ { "w25x05", INFO(0xef3010, 0, 64 * 1024, 1) NO_SFDP_FLAGS(SECT_4K) }, @@ -131,14 +131,15 @@ static const struct flash_info winbond_parts[] =3D { }; =20 /** - * winbond_set_4byte_addr_mode() - Set 4-byte address mode for Winbond fla= shes. + * winbond_nor_set_4byte_addr_mode() - Set 4-byte address mode for Winbond + * flashes. * @nor: pointer to 'struct spi_nor'. * @enable: true to enter the 4-byte address mode, false to exit the 4-byte * address mode. * * Return: 0 on success, -errno otherwise. */ -static int winbond_set_4byte_addr_mode(struct spi_nor *nor, bool enable) +static int winbond_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enabl= e) { int ret; =20 @@ -162,7 +163,7 @@ static int winbond_set_4byte_addr_mode(struct spi_nor *= nor, bool enable) return spi_nor_write_disable(nor); } =20 -static const struct spi_nor_otp_ops winbond_otp_ops =3D { +static const struct spi_nor_otp_ops winbond_nor_otp_ops =3D { .read =3D spi_nor_otp_read_secr, .write =3D spi_nor_otp_write_secr, .erase =3D spi_nor_otp_erase_secr, @@ -170,25 +171,25 @@ static const struct spi_nor_otp_ops winbond_otp_ops = =3D { .is_locked =3D spi_nor_otp_is_locked_sr2, }; =20 -static void winbond_default_init(struct spi_nor *nor) +static void winbond_nor_default_init(struct spi_nor *nor) { - nor->params->set_4byte_addr_mode =3D winbond_set_4byte_addr_mode; + nor->params->set_4byte_addr_mode =3D winbond_nor_set_4byte_addr_mode; } =20 -static void winbond_late_init(struct spi_nor *nor) +static void winbond_nor_late_init(struct spi_nor *nor) { if (nor->params->otp.org->n_regions) - nor->params->otp.ops =3D &winbond_otp_ops; + nor->params->otp.ops =3D &winbond_nor_otp_ops; } =20 -static const struct spi_nor_fixups winbond_fixups =3D { - .default_init =3D winbond_default_init, - .late_init =3D winbond_late_init, +static const struct spi_nor_fixups winbond_nor_fixups =3D { + .default_init =3D winbond_nor_default_init, + .late_init =3D winbond_nor_late_init, }; =20 const struct spi_nor_manufacturer spi_nor_winbond =3D { .name =3D "winbond", - .parts =3D winbond_parts, - .nparts =3D ARRAY_SIZE(winbond_parts), - .fixups =3D &winbond_fixups, + .parts =3D winbond_nor_parts, + .nparts =3D ARRAY_SIZE(winbond_nor_parts), + .fixups =3D &winbond_nor_fixups, }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 947D2C433F5 for ; Wed, 23 Feb 2022 13:44:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241205AbiBWNpX (ORCPT ); Wed, 23 Feb 2022 08:45:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241067AbiBWNos (ORCPT ); Wed, 23 Feb 2022 08:44:48 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6868AC914 for ; Wed, 23 Feb 2022 05:44:12 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id BF3872245A; Wed, 23 Feb 2022 14:44:10 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623850; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NbHvy8hevO/uqaI9Zie2Nd+ZG6Y7RWXmci9VDa4GFEA=; b=dudIoW6kLaY+U43BXBdxaZk9D42nGi2Yi0aTL8+vl+RxymdfTiFPiORJdPyYZ77qZDMo/L mgxPoEIHVldZ3KxkJ/KK9JXz2ewR3IYx8N5rJdeiJ55fE1FcGKc1Aue0bMKqZevqGPjtR1 iug1JNSRCJafYUanWqipRhcWtY/qeqc= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 15/32] mtd: spi-nor: xilinx: unify function names Date: Wed, 23 Feb 2022 14:43:41 +0100 Message-Id: <20220223134358.1914798-16-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/xilinx.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 580562bc1e45..07dd11788df5 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info xilinx_parts[] =3D { +static const struct flash_info xilinx_nor_parts[] =3D { /* Xilinx S3AN Internal Flash */ { "3S50AN", S3AN_INFO(0x1f2200, 64, 264) }, { "3S200AN", S3AN_INFO(0x1f2400, 256, 264) }, @@ -26,7 +26,7 @@ static const struct flash_info xilinx_parts[] =3D { * Addr can safely be unsigned int, the biggest S3AN device is smaller than * 4 MiB. */ -static u32 s3an_convert_addr(struct spi_nor *nor, u32 addr) +static u32 s3an_nor_convert_addr(struct spi_nor *nor, u32 addr) { u32 page_size =3D nor->params->page_size; u32 offset, page; @@ -73,25 +73,25 @@ static int xilinx_nor_setup(struct spi_nor *nor, nor->mtd.erasesize =3D 8 * page_size; } else { /* Flash in Default addressing mode */ - nor->params->convert_addr =3D s3an_convert_addr; + nor->params->convert_addr =3D s3an_nor_convert_addr; nor->mtd.erasesize =3D nor->info->sector_size; } =20 return 0; } =20 -static void xilinx_late_init(struct spi_nor *nor) +static void xilinx_nor_late_init(struct spi_nor *nor) { nor->params->setup =3D xilinx_nor_setup; } =20 -static const struct spi_nor_fixups xilinx_fixups =3D { - .late_init =3D xilinx_late_init, +static const struct spi_nor_fixups xilinx_nor_fixups =3D { + .late_init =3D xilinx_nor_late_init, }; =20 const struct spi_nor_manufacturer spi_nor_xilinx =3D { .name =3D "xilinx", - .parts =3D xilinx_parts, - .nparts =3D ARRAY_SIZE(xilinx_parts), - .fixups =3D &xilinx_fixups, + .parts =3D xilinx_nor_parts, + .nparts =3D ARRAY_SIZE(xilinx_nor_parts), + .fixups =3D &xilinx_nor_fixups, }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11C11C433FE for ; Wed, 23 Feb 2022 13:45:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241177AbiBWNp7 (ORCPT ); Wed, 23 Feb 2022 08:45:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241066AbiBWNos (ORCPT ); Wed, 23 Feb 2022 08:44:48 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0EECBAC918 for ; Wed, 23 Feb 2022 05:44:13 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 7902222453; Wed, 23 Feb 2022 14:44:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623851; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CqhkHAkkrKiJhs+qhvMCYUbLSrfnVv6IBJOqUiinTes=; b=d2g4oSzifZXDqqqNQEDrKH1FEmLMbOdvlU6SBHr8JPpAlUXTSw16Gh2K0VFQTCA+zBLvRn zaIt7v4jsPeozeljez8eIR6FGdNUovhZUvHZ99pYL52GFbv3XFRvqLuBLcyXFogSNRPBbc kErTuogFUCOCo/vOdUS19Z5PzlKhkXw= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 16/32] mtd: spi-nor: xmc: unify function names Date: Wed, 23 Feb 2022 14:43:42 +0100 Message-Id: <20220223134358.1914798-17-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _nor_ - _ There are no functional changes. Signed-off-by: Michael Walle Acked-by: Pratyush Yadav --- drivers/mtd/spi-nor/xmc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/xmc.c b/drivers/mtd/spi-nor/xmc.c index 2992af03cb0a..051411e86339 100644 --- a/drivers/mtd/spi-nor/xmc.c +++ b/drivers/mtd/spi-nor/xmc.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info xmc_parts[] =3D { +static const struct flash_info xmc_nor_parts[] =3D { /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ { "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | @@ -20,6 +20,6 @@ static const struct flash_info xmc_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_xmc =3D { .name =3D "xmc", - .parts =3D xmc_parts, - .nparts =3D ARRAY_SIZE(xmc_parts), + .parts =3D xmc_nor_parts, + .nparts =3D ARRAY_SIZE(xmc_nor_parts), }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14ACBC433EF for ; Wed, 23 Feb 2022 13:45:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241110AbiBWNpu (ORCPT ); Wed, 23 Feb 2022 08:45:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241072AbiBWNot (ORCPT ); Wed, 23 Feb 2022 08:44:49 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8AA77AC91E for ; Wed, 23 Feb 2022 05:44:13 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id AAE7B22456; Wed, 23 Feb 2022 14:44:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623851; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FPwyUqw9bIye7MTeMw3+l2+GgFM/jhis7VAg9kKcJLA=; b=PlAXWhAEJ4bl6ttd0i5BJfrgjJ5g+AwEUcovpu7oaBWPOGcwupeW5s0zWbVwZJKE8M1YEZ xZVl/rnvyXS9Gn5yWUP36cBxOpAJCFbmCfSebyGKDBJvPWwSoF8VaTL3ay6nczucK2D+Bg ua3jANmxVh2qqUcRYApGrCo8I137PAs= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 17/32] mtd: spi-nor: slightly refactor the spi_nor_setup() Date: Wed, 23 Feb 2022 14:43:43 +0100 Message-Id: <20220223134358.1914798-18-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Instead of always using a function pointer (and initializing it to our default), just call the default function if the flash didn't set its own one. That will make the call flow easier to follow. Also mark the parameter as optional now. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 10 +++++----- drivers/mtd/spi-nor/core.h | 8 ++++---- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 04ea180118e3..4d2036cdce42 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2532,11 +2532,12 @@ static int spi_nor_setup(struct spi_nor *nor, { int ret; =20 - if (nor->params->setup) { + if (nor->params->setup) ret =3D nor->params->setup(nor, hwcaps); - if (ret) - return ret; - } + else + ret =3D spi_nor_default_setup(nor, hwcaps); + if (ret) + return ret; =20 return spi_nor_set_addr_width(nor); } @@ -2786,7 +2787,6 @@ static void spi_nor_init_default_params(struct spi_no= r *nor) =20 params->quad_enable =3D spi_nor_sr2_bit1_quad_enable; params->set_4byte_addr_mode =3D spansion_set_4byte_addr_mode; - params->setup =3D spi_nor_default_setup; params->otp.org =3D &info->otp_org; =20 /* Default to 16-bit Write Status (01h) Command */ diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 2afb610853a9..4fe16b5aa3f5 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -257,10 +257,10 @@ struct spi_nor_otp { * @convert_addr: converts an absolute address into something the flash * will understand. Particularly useful when pagesize= is * not a power-of-2. - * @setup: configures the SPI NOR memory. Useful for SPI NOR - * flashes that have peculiarities to the SPI NOR sta= ndard - * e.g. different opcodes, specific address calculati= on, - * page size, etc. + * @setup: (optional) configures the SPI NOR memory. Useful for + * SPI NOR flashes that have peculiarities to the SPI NOR + * standard e.g. different opcodes, specific address + * calculation, page size, etc. * @locking_ops: SPI NOR locking methods. */ struct spi_nor_flash_parameter { --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 640D3C433F5 for ; Wed, 23 Feb 2022 13:45:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241221AbiBWNp2 (ORCPT ); Wed, 23 Feb 2022 08:45:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241078AbiBWNov (ORCPT ); Wed, 23 Feb 2022 08:44:51 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2C4ACAC922 for ; Wed, 23 Feb 2022 05:44:14 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 355182245C; Wed, 23 Feb 2022 14:44:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623852; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hXOPL5cPITB5pX8C9uT9seIIQT64+6BMqwNdfPuDNQU=; b=DbjKo8dsPWkQtCCu8eWB0m8tXqheMabXvmk9yM+ZiobdO+1SZnfq6BqoZZOSBLFCYgaSjY gNz6EVsTw/6KpAiqjyBG1ic4PbZLpahUxPQ/8iZwXUTOuNOVKNR4diOQXGnOX/UUczbp6n 3sBevsMWo+gLNLamEUChQQruhMUfYuU= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 18/32] mtd: spi-nor: allow a flash to define its own ready() function Date: Wed, 23 Feb 2022 14:43:44 +0100 Message-Id: <20220223134358.1914798-19-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Xilinx and Micron flashes have their own implementation of the spi_nor_ready() function. At the moment, the core will figure out which one to call according to some flags. Lay the foundation to make it possible that a flash can register its own ready() function. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 4 ++++ drivers/mtd/spi-nor/core.h | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 4d2036cdce42..390a9ab413b7 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -794,6 +794,10 @@ static int spi_nor_ready(struct spi_nor *nor) { int sr, fsr; =20 + /* Flashes might override the standard routine. */ + if (nor->params->ready) + return nor->params->ready(nor); + if (nor->flags & SNOR_F_READY_XSR_RDY) sr =3D spi_nor_xsr_ready(nor); else diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 4fe16b5aa3f5..fdc8c0f31f5c 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -261,6 +261,9 @@ struct spi_nor_otp { * SPI NOR flashes that have peculiarities to the SPI NOR * standard e.g. different opcodes, specific address * calculation, page size, etc. + * @ready: (optional) flashes might use a different mechanism + * than reading the status register to indicate they + * are ready for a new command * @locking_ops: SPI NOR locking methods. */ struct spi_nor_flash_parameter { @@ -282,6 +285,7 @@ struct spi_nor_flash_parameter { int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable); u32 (*convert_addr)(struct spi_nor *nor, u32 addr); int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps); + int (*ready)(struct spi_nor *nor); =20 const struct spi_nor_locking_ops *locking_ops; }; --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F91BC433F5 for ; Wed, 23 Feb 2022 13:45:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241116AbiBWNpn (ORCPT ); Wed, 23 Feb 2022 08:45:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42494 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241081AbiBWNov (ORCPT ); Wed, 23 Feb 2022 08:44:51 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9DD20AC924 for ; Wed, 23 Feb 2022 05:44:14 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id D44C4223ED; Wed, 23 Feb 2022 14:44:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623852; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BewPUYl7ALanqbEPhDcl7g1lZEpz+MjVY87ZkoEXHuI=; b=LTGMOf6pBuNAYpWmbGCDr7QPJnjzbR2JddYaXKDHe7cJa+POPq5AH1kvGbyQ+yRYDPvKwP zrOIitrS5wgyWHoxKZkaRy1tZX4heOADN7M4ov79vMIXVsqJINFFZJy4Mpfd4+LG3Wxydm CB/2J+RREPfXaG6qYlNOSaeDFFNfTOk= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 19/32] mtd: spi-nor: export more function to be used in vendor modules Date: Wed, 23 Feb 2022 14:43:45 +0100 Message-Id: <20220223134358.1914798-20-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" We will move vendor specific code into the vendor modules and thus we will have to export these functions so they can be called. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 10 +++++----- drivers/mtd/spi-nor/core.h | 6 ++++++ 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 390a9ab413b7..8481272533a3 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -157,8 +157,8 @@ static int spi_nor_spimem_exec_op(struct spi_nor *nor, = struct spi_mem_op *op) return spi_mem_exec_op(nor->spimem, op); } =20 -static int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode, - u8 *buf, size_t len) +int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode, + u8 *buf, size_t len) { if (spi_nor_protocol_is_dtr(nor->reg_proto)) return -EOPNOTSUPP; @@ -166,8 +166,8 @@ static int spi_nor_controller_ops_read_reg(struct spi_n= or *nor, u8 opcode, return nor->controller_ops->read_reg(nor, opcode, buf, len); } =20 -static int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode, - const u8 *buf, size_t len) +int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode, + const u8 *buf, size_t len) { if (spi_nor_protocol_is_dtr(nor->reg_proto)) return -EOPNOTSUPP; @@ -683,7 +683,7 @@ static void spi_nor_clear_sr(struct spi_nor *nor) * * Return: 1 if ready, 0 if not ready, -errno on errors. */ -static int spi_nor_sr_ready(struct spi_nor *nor) +int spi_nor_sr_ready(struct spi_nor *nor) { int ret =3D spi_nor_read_sr(nor, nor->bouncebuf); =20 diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index fdc8c0f31f5c..446218b0e017 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -558,6 +558,7 @@ int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor); int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor); int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor); int spi_nor_read_sr(struct spi_nor *nor, u8 *sr); +int spi_nor_sr_ready(struct spi_nor *nor); int spi_nor_read_cr(struct spi_nor *nor, u8 *cr); int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len); int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1); @@ -603,6 +604,11 @@ void spi_nor_try_unlock_all(struct spi_nor *nor); void spi_nor_set_mtd_locking_ops(struct spi_nor *nor); void spi_nor_set_mtd_otp_ops(struct spi_nor *nor); =20 +int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode, + u8 *buf, size_t len); +int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode, + const u8 *buf, size_t len); + static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd) { return container_of(mtd, struct spi_nor, mtd); --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7A55C433F5 for ; Wed, 23 Feb 2022 13:45:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240200AbiBWNp4 (ORCPT ); Wed, 23 Feb 2022 08:45:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42472 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241080AbiBWNov (ORCPT ); Wed, 23 Feb 2022 08:44:51 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB366AC926 for ; Wed, 23 Feb 2022 05:44:14 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 2A15F223F0; Wed, 23 Feb 2022 14:44:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623853; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=H5jDgKwJxZ6D3piaR2vguRJO+uJ6+EZP+5Pa5gMWIq8=; b=iY0lURYYi5YNHKZEvq3YSkw+pDUesfaIgrKnL+iSHocRWGwcJwLVQrGVweGrSPvOo/HARq OmnxNRv13UoqHUBfQpC81yO3bxtP0/Z2AkLUVLoY4YkSPb8pgrenWZ7tqoxOsfxoZ+QcMk CwaK5zr8ehogfYby3GqDyzk7ahsGLnY= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 20/32] mtd: spi-nor: guard _page_size parameter in S3AN_INFO() Date: Wed, 23 Feb 2022 14:43:46 +0100 Message-Id: <20220223134358.1914798-21-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The _page_size marco parameter was missing parentheses around it. Add them. Signed-off-by: Michael Walle Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 446218b0e017..3c37b46d60d5 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -469,9 +469,9 @@ struct flash_info { (_jedec_id) & 0xff \ }, \ .id_len =3D 3, \ - .sector_size =3D (8*_page_size), \ + .sector_size =3D (8 * (_page_size)), \ .n_sectors =3D (_n_sectors), \ - .page_size =3D _page_size, \ + .page_size =3D (_page_size), \ .addr_width =3D 3, \ .flags =3D SPI_NOR_NO_FR | SPI_NOR_XSR_RDY, =20 --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E22DC433F5 for ; Wed, 23 Feb 2022 13:45:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239232AbiBWNpe (ORCPT ); Wed, 23 Feb 2022 08:45:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241085AbiBWNow (ORCPT ); Wed, 23 Feb 2022 08:44:52 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6EDF3AC929 for ; Wed, 23 Feb 2022 05:44:15 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 6B96722464; Wed, 23 Feb 2022 14:44:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623853; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=P5dcEej3Ax5+Qxcv48nsSiUuMGpOh3SbGy2WIrEVylY=; b=U4Lun24lNHcTi1yejESuLULpvhWMmUF6I6a+TgvSiVc6x8ZEuVnFU4xaaX2oYegiytN0+R yX91o1ARD3Ae+dAjAu8vxD3+O/aOVMc1MlNeXM1eBMvqq/ftLmqwYs5eMxM0C1MVNo36Fe HJ4JhFOJKleUDR40jpklt7kB6S14v2o= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 21/32] mtd: spi-nor: move all xilinx specifics into xilinx.c Date: Wed, 23 Feb 2022 14:43:47 +0100 Message-Id: <20220223134358.1914798-22-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Mechanically move all the xilinx functions to its own module. Then register the new flash specific ready() function. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 64 +------------------------------ drivers/mtd/spi-nor/core.h | 18 --------- drivers/mtd/spi-nor/xilinx.c | 73 ++++++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 9 ----- 4 files changed, 74 insertions(+), 90 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 8481272533a3..ae1560250c48 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -598,57 +598,6 @@ int spi_nor_write_ear(struct spi_nor *nor, u8 ear) return ret; } =20 -/** - * spi_nor_xread_sr() - Read the Status Register on S3AN flashes. - * @nor: pointer to 'struct spi_nor'. - * @sr: pointer to a DMA-able buffer where the value of the - * Status Register will be written. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_XRDSR, 0), - SPI_MEM_OP_NO_ADDR, - SPI_MEM_OP_NO_DUMMY, - SPI_MEM_OP_DATA_IN(1, sr, 0)); - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_XRDSR, sr, - 1); - } - - if (ret) - dev_dbg(nor->dev, "error %d reading XRDSR\n", ret); - - return ret; -} - -/** - * spi_nor_xsr_ready() - Query the Status Register of the S3AN flash to se= e if - * the flash is ready for new commands. - * @nor: pointer to 'struct spi_nor'. - * - * Return: 1 if ready, 0 if not ready, -errno on errors. - */ -static int spi_nor_xsr_ready(struct spi_nor *nor) -{ - int ret; - - ret =3D spi_nor_xread_sr(nor, nor->bouncebuf); - if (ret) - return ret; - - return !!(nor->bouncebuf[0] & XSR_RDY); -} - /** * spi_nor_clear_sr() - Clear the Status Register. * @nor: pointer to 'struct spi_nor'. @@ -798,10 +747,7 @@ static int spi_nor_ready(struct spi_nor *nor) if (nor->params->ready) return nor->params->ready(nor); =20 - if (nor->flags & SNOR_F_READY_XSR_RDY) - sr =3D spi_nor_xsr_ready(nor); - else - sr =3D spi_nor_sr_ready(nor); + sr =3D spi_nor_sr_ready(nor); if (sr < 0) return sr; fsr =3D nor->flags & SNOR_F_USE_FSR ? spi_nor_fsr_ready(nor) : 1; @@ -2677,14 +2623,6 @@ static void spi_nor_init_flags(struct spi_nor *nor) =20 if (flags & USE_FSR) nor->flags |=3D SNOR_F_USE_FSR; - - /* - * Make sure the XSR_RDY flag is set before calling - * spi_nor_wait_till_ready(). Xilinx S3AN share MFR - * with Atmel SPI NOR. - */ - if (flags & SPI_NOR_XSR_RDY) - nor->flags |=3D SNOR_F_READY_XSR_RDY; } =20 /** diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 3c37b46d60d5..fabc01ae9a81 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -15,7 +15,6 @@ enum spi_nor_option_flags { SNOR_F_USE_FSR =3D BIT(0), SNOR_F_HAS_SR_TB =3D BIT(1), SNOR_F_NO_OP_CHIP_ERASE =3D BIT(2), - SNOR_F_READY_XSR_RDY =3D BIT(3), SNOR_F_USE_CLSR =3D BIT(4), SNOR_F_BROKEN_RESET =3D BIT(5), SNOR_F_4B_OPCODES =3D BIT(6), @@ -351,8 +350,6 @@ struct spi_nor_fixups { * SPI_NOR_NO_FR: can't do fastread. * USE_CLSR: use CLSR command. * USE_FSR: use flag status register - * SPI_NOR_XSR_RDY: S3AN flashes have specific opcode to read the - * status register. * * @no_sfdp_flags: flags that indicate support that can be discovered via= SFDP. * Used when SFDP tables are not defined in the flash. Th= ese @@ -405,7 +402,6 @@ struct flash_info { #define SPI_NOR_NO_FR BIT(8) #define USE_CLSR BIT(9) #define USE_FSR BIT(10) -#define SPI_NOR_XSR_RDY BIT(11) =20 u8 no_sfdp_flags; #define SPI_NOR_SKIP_SFDP BIT(0) @@ -462,19 +458,6 @@ struct flash_info { .addr_width =3D (_addr_width), \ .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, \ =20 -#define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \ - .id =3D { \ - ((_jedec_id) >> 16) & 0xff, \ - ((_jedec_id) >> 8) & 0xff, \ - (_jedec_id) & 0xff \ - }, \ - .id_len =3D 3, \ - .sector_size =3D (8 * (_page_size)), \ - .n_sectors =3D (_n_sectors), \ - .page_size =3D (_page_size), \ - .addr_width =3D 3, \ - .flags =3D SPI_NOR_NO_FR | SPI_NOR_XSR_RDY, - #define OTP_INFO(_len, _n_regions, _base, _offset) \ .otp_org =3D { \ .len =3D (_len), \ @@ -564,7 +547,6 @@ int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr,= size_t len); int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1); int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr); =20 -int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr); ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, u8 *buf); ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 07dd11788df5..05c7fe843a7d 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -8,6 +8,27 @@ =20 #include "core.h" =20 +#define SPINOR_OP_XSE 0x50 /* Sector erase */ +#define SPINOR_OP_XPP 0x82 /* Page program */ +#define SPINOR_OP_XRDSR 0xd7 /* Read status register */ + +#define XSR_PAGESIZE BIT(0) /* Page size in Po2 or Linear */ +#define XSR_RDY BIT(7) /* Ready */ + +#define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \ + .id =3D { \ + ((_jedec_id) >> 16) & 0xff, \ + ((_jedec_id) >> 8) & 0xff, \ + (_jedec_id) & 0xff \ + }, \ + .id_len =3D 3, \ + .sector_size =3D (8 * (_page_size)), \ + .n_sectors =3D (_n_sectors), \ + .page_size =3D (_page_size), \ + .addr_width =3D 3, \ + .flags =3D SPI_NOR_NO_FR + +/* Xilinx S3AN share MFR with Atmel SPI NOR */ static const struct flash_info xilinx_nor_parts[] =3D { /* Xilinx S3AN Internal Flash */ { "3S50AN", S3AN_INFO(0x1f2200, 64, 264) }, @@ -38,6 +59,57 @@ static u32 s3an_nor_convert_addr(struct spi_nor *nor, u3= 2 addr) return page | offset; } =20 +/** + * spi_nor_xread_sr() - Read the Status Register on S3AN flashes. + * @nor: pointer to 'struct spi_nor'. + * @sr: pointer to a DMA-able buffer where the value of the + * Status Register will be written. + * + * Return: 0 on success, -errno otherwise. + */ +static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) +{ + int ret; + + if (nor->spimem) { + struct spi_mem_op op =3D + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_XRDSR, 0), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_DATA_IN(1, sr, 0)); + + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); + + ret =3D spi_mem_exec_op(nor->spimem, &op); + } else { + ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_XRDSR, sr, + 1); + } + + if (ret) + dev_dbg(nor->dev, "error %d reading XRDSR\n", ret); + + return ret; +} + +/** + * spi_nor_xsr_ready() - Query the Status Register of the S3AN flash to se= e if + * the flash is ready for new commands. + * @nor: pointer to 'struct spi_nor'. + * + * Return: 1 if ready, 0 if not ready, -errno on errors. + */ +static int spi_nor_xsr_ready(struct spi_nor *nor) +{ + int ret; + + ret =3D spi_nor_xread_sr(nor, nor->bouncebuf); + if (ret) + return ret; + + return !!(nor->bouncebuf[0] & XSR_RDY); +} + static int xilinx_nor_setup(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps) { @@ -83,6 +155,7 @@ static int xilinx_nor_setup(struct spi_nor *nor, static void xilinx_nor_late_init(struct spi_nor *nor) { nor->params->setup =3D xilinx_nor_setup; + nor->params->ready =3D spi_nor_xsr_ready; } =20 static const struct spi_nor_fixups xilinx_nor_fixups =3D { diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index fc90fce26e33..b44b05a6f934 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -86,15 +86,6 @@ #define SPINOR_OP_BP 0x02 /* Byte program */ #define SPINOR_OP_AAI_WP 0xad /* Auto address increment word program */ =20 -/* Used for S3AN flashes only */ -#define SPINOR_OP_XSE 0x50 /* Sector erase */ -#define SPINOR_OP_XPP 0x82 /* Page program */ -#define SPINOR_OP_XRDSR 0xd7 /* Read status register */ - -#define XSR_PAGESIZE BIT(0) /* Page size in Po2 or Linear */ -#define XSR_RDY BIT(7) /* Ready */ - - /* Used for Macronix and Winbond flashes. */ #define SPINOR_OP_EN4B 0xb7 /* Enter 4-byte mode */ #define SPINOR_OP_EX4B 0xe9 /* Exit 4-byte mode */ --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28D43C433EF for ; Wed, 23 Feb 2022 13:45:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241216AbiBWNpZ (ORCPT ); Wed, 23 Feb 2022 08:45:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241086AbiBWNow (ORCPT ); Wed, 23 Feb 2022 08:44:52 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C80A1AC92C for ; Wed, 23 Feb 2022 05:44:15 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 2689822247; Wed, 23 Feb 2022 14:44:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623854; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IYl3MKifzSCwZWqS6/ku6kfSrHMIJbi0hdEtx6Zps4Q=; b=f4uQw8k2do7sbYOn3ZVI0bhMOfRKBUnSrIsgaiHyYYAAOj6cL9VKOY4/3KFx/PcdhrrezF mTf8ya9Yr5uPLNe/jUbpqUuQV4Z5YsVXcQbprNdpfZPiWyD6luiRM8ijSX8HthWTXjX4A0 DNC5h/WAjC+RBWeZVQJzXWPbaC18sc4= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 22/32] mtd: spi-nor: xilinx: rename vendor specific functions and defines Date: Wed, 23 Feb 2022 14:43:48 +0100 Message-Id: <20220223134358.1914798-23-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Drop the generic spi_nor prefix for all the xilinx functions. Signed-off-by: Michael Walle Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/xilinx.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 05c7fe843a7d..ffd5579d45cb 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -8,9 +8,9 @@ =20 #include "core.h" =20 -#define SPINOR_OP_XSE 0x50 /* Sector erase */ -#define SPINOR_OP_XPP 0x82 /* Page program */ -#define SPINOR_OP_XRDSR 0xd7 /* Read status register */ +#define XILINX_OP_SE 0x50 /* Sector erase */ +#define XILINX_OP_PP 0x82 /* Page program */ +#define XILINX_OP_RDSR 0xd7 /* Read status register */ =20 #define XSR_PAGESIZE BIT(0) /* Page size in Po2 or Linear */ #define XSR_RDY BIT(7) /* Ready */ @@ -60,20 +60,20 @@ static u32 s3an_nor_convert_addr(struct spi_nor *nor, u= 32 addr) } =20 /** - * spi_nor_xread_sr() - Read the Status Register on S3AN flashes. + * xilinx_nor_read_sr() - Read the Status Register on S3AN flashes. * @nor: pointer to 'struct spi_nor'. * @sr: pointer to a DMA-able buffer where the value of the * Status Register will be written. * * Return: 0 on success, -errno otherwise. */ -static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) +static int xilinx_nor_read_sr(struct spi_nor *nor, u8 *sr) { int ret; =20 if (nor->spimem) { struct spi_mem_op op =3D - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_XRDSR, 0), + SPI_MEM_OP(SPI_MEM_OP_CMD(XILINX_OP_RDSR, 0), SPI_MEM_OP_NO_ADDR, SPI_MEM_OP_NO_DUMMY, SPI_MEM_OP_DATA_IN(1, sr, 0)); @@ -82,7 +82,7 @@ static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) =20 ret =3D spi_mem_exec_op(nor->spimem, &op); } else { - ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_XRDSR, sr, + ret =3D spi_nor_controller_ops_read_reg(nor, XILINX_OP_RDSR, sr, 1); } =20 @@ -93,17 +93,17 @@ static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) } =20 /** - * spi_nor_xsr_ready() - Query the Status Register of the S3AN flash to se= e if - * the flash is ready for new commands. + * xilinx_nor_sr_ready() - Query the Status Register of the S3AN flash to = see + * if the flash is ready for new commands. * @nor: pointer to 'struct spi_nor'. * * Return: 1 if ready, 0 if not ready, -errno on errors. */ -static int spi_nor_xsr_ready(struct spi_nor *nor) +static int xilinx_nor_sr_ready(struct spi_nor *nor) { int ret; =20 - ret =3D spi_nor_xread_sr(nor, nor->bouncebuf); + ret =3D xilinx_nor_read_sr(nor, nor->bouncebuf); if (ret) return ret; =20 @@ -116,12 +116,12 @@ static int xilinx_nor_setup(struct spi_nor *nor, u32 page_size; int ret; =20 - ret =3D spi_nor_xread_sr(nor, nor->bouncebuf); + ret =3D xilinx_nor_read_sr(nor, nor->bouncebuf); if (ret) return ret; =20 - nor->erase_opcode =3D SPINOR_OP_XSE; - nor->program_opcode =3D SPINOR_OP_XPP; + nor->erase_opcode =3D XILINX_OP_SE; + nor->program_opcode =3D XILINX_OP_PP; nor->read_opcode =3D SPINOR_OP_READ; nor->flags |=3D SNOR_F_NO_OP_CHIP_ERASE; =20 @@ -155,7 +155,7 @@ static int xilinx_nor_setup(struct spi_nor *nor, static void xilinx_nor_late_init(struct spi_nor *nor) { nor->params->setup =3D xilinx_nor_setup; - nor->params->ready =3D spi_nor_xsr_ready; + nor->params->ready =3D xilinx_nor_sr_ready; } =20 static const struct spi_nor_fixups xilinx_nor_fixups =3D { --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53673C433EF for ; Wed, 23 Feb 2022 13:45:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241150AbiBWNpg (ORCPT ); Wed, 23 Feb 2022 08:45:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241090AbiBWNow (ORCPT ); Wed, 23 Feb 2022 08:44:52 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5DFC2AC934 for ; Wed, 23 Feb 2022 05:44:16 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 7EDAC223EA; Wed, 23 Feb 2022 14:44:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623854; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+etW7jzC7OWPI2fMPjfRTOpJ5DdDj/wXEqI0+Wud4xs=; b=SUBgP54tPmir3kXNHIaG8r5Czxyk7wwITl+b9oTGQRp3ht6c2QZIAURnqkxKSQeJFpyUqI yC+TqFdony7GfcnCpvhGmGJEeLtNHWzHjzYDXlAQvFYO/QviP5n55N2iMNVQDD/EGMiEM0 m58Sb7QoVhtOp2yFBJhNw3D9Wm/OxsI= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 23/32] mtd: spi-nor: xilinx: correct the debug message Date: Wed, 23 Feb 2022 14:43:49 +0100 Message-Id: <20220223134358.1914798-24-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" XRDSR is a combination of xilinx and the RDSR opcode, but the register is just the status register. Correct the debug message. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/xilinx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index ffd5579d45cb..9459ac2609dc 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -87,7 +87,7 @@ static int xilinx_nor_read_sr(struct spi_nor *nor, u8 *sr) } =20 if (ret) - dev_dbg(nor->dev, "error %d reading XRDSR\n", ret); + dev_dbg(nor->dev, "error %d reading SR\n", ret); =20 return ret; } --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1677CC433EF for ; Wed, 23 Feb 2022 13:45:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241262AbiBWNqE (ORCPT ); Wed, 23 Feb 2022 08:46:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241094AbiBWNow (ORCPT ); Wed, 23 Feb 2022 08:44:52 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5AE1AC936 for ; Wed, 23 Feb 2022 05:44:16 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id CBA2B223EF; Wed, 23 Feb 2022 14:44:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623854; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CNk4lCbg2K5y2GGQaIc+fibYoI1cCdqR6kmDb2jZmMY=; b=M90GDlm/nHM1rWdkuKZl4HnckjNQqcs0hNzmljs9B8v9rGifOF9IjczVALMPu20Rgyhtc1 n4nZcitJN1cCiqwDBrt9C5EVNBQoCDBDiYcoaiAsylgsy8kxUcpI6cs0hmIIaMyLPmWeOA wNJ563ieVsCXrDTSrPh9Ub65dQyscr8= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 24/32] mtd: spi-nor: move all micron-st specifics into micron-st.c Date: Wed, 23 Feb 2022 14:43:50 +0100 Message-Id: <20220223134358.1914798-25-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The flag status register is only available on micron flashes. Move all the functions around that into the micron module. This is almost a mechanical move except for the spi_nor_fsr_ready() which now also checks the normal status register. Previously, this was done in spi_nor_ready(). Signed-off-by: Michael Walle Reviewed-by: Pratyush Yadav Tested-by: Pratyush Yadav # on mt35xu512aba, s28hs512t --- drivers/mtd/spi-nor/core.c | 123 +---------------------------- drivers/mtd/spi-nor/micron-st.c | 134 ++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 8 -- 3 files changed, 135 insertions(+), 130 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index ae1560250c48..5b56d718692b 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -412,50 +412,6 @@ int spi_nor_read_sr(struct spi_nor *nor, u8 *sr) return ret; } =20 -/** - * spi_nor_read_fsr() - Read the Flag Status Register. - * @nor: pointer to 'struct spi_nor' - * @fsr: pointer to a DMA-able buffer where the value of the - * Flag Status Register will be written. Should be at least 2 - * bytes. - * - * Return: 0 on success, -errno otherwise. - */ -static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDFSR, 0), - SPI_MEM_OP_NO_ADDR, - SPI_MEM_OP_NO_DUMMY, - SPI_MEM_OP_DATA_IN(1, fsr, 0)); - - if (nor->reg_proto =3D=3D SNOR_PROTO_8_8_8_DTR) { - op.addr.nbytes =3D nor->params->rdsr_addr_nbytes; - op.dummy.nbytes =3D nor->params->rdsr_dummy; - /* - * We don't want to read only one byte in DTR mode. So, - * read 2 and then discard the second byte. - */ - op.data.nbytes =3D 2; - } - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDFSR, fsr, - 1); - } - - if (ret) - dev_dbg(nor->dev, "error %d reading FSR\n", ret); - - return ret; -} - /** * spi_nor_read_cr() - Read the Configuration Register using the * SPINOR_OP_RDCR (35h) command. @@ -664,75 +620,6 @@ int spi_nor_sr_ready(struct spi_nor *nor) return !(nor->bouncebuf[0] & SR_WIP); } =20 -/** - * spi_nor_clear_fsr() - Clear the Flag Status Register. - * @nor: pointer to 'struct spi_nor'. - */ -static void spi_nor_clear_fsr(struct spi_nor *nor) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLFSR, 0), - SPI_MEM_OP_NO_ADDR, - SPI_MEM_OP_NO_DUMMY, - SPI_MEM_OP_NO_DATA); - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLFSR, - NULL, 0); - } - - if (ret) - dev_dbg(nor->dev, "error %d clearing FSR\n", ret); -} - -/** - * spi_nor_fsr_ready() - Query the Flag Status Register to see if the flas= h is - * ready for new commands. - * @nor: pointer to 'struct spi_nor'. - * - * Return: 1 if ready, 0 if not ready, -errno on errors. - */ -static int spi_nor_fsr_ready(struct spi_nor *nor) -{ - int ret =3D spi_nor_read_fsr(nor, nor->bouncebuf); - - if (ret) - return ret; - - if (nor->bouncebuf[0] & (FSR_E_ERR | FSR_P_ERR)) { - if (nor->bouncebuf[0] & FSR_E_ERR) - dev_err(nor->dev, "Erase operation failed.\n"); - else - dev_err(nor->dev, "Program operation failed.\n"); - - if (nor->bouncebuf[0] & FSR_PT_ERR) - dev_err(nor->dev, - "Attempted to modify a protected sector.\n"); - - spi_nor_clear_fsr(nor); - - /* - * WEL bit remains set to one when an erase or page program - * error occurs. Issue a Write Disable command to protect - * against inadvertent writes that can possibly corrupt the - * contents of the memory. - */ - ret =3D spi_nor_write_disable(nor); - if (ret) - return ret; - - return -EIO; - } - - return !!(nor->bouncebuf[0] & FSR_READY); -} - /** * spi_nor_ready() - Query the flash to see if it is ready for new command= s. * @nor: pointer to 'struct spi_nor'. @@ -741,19 +628,11 @@ static int spi_nor_fsr_ready(struct spi_nor *nor) */ static int spi_nor_ready(struct spi_nor *nor) { - int sr, fsr; - /* Flashes might override the standard routine. */ if (nor->params->ready) return nor->params->ready(nor); =20 - sr =3D spi_nor_sr_ready(nor); - if (sr < 0) - return sr; - fsr =3D nor->flags & SNOR_F_USE_FSR ? spi_nor_fsr_ready(nor) : 1; - if (fsr < 0) - return fsr; - return sr && fsr; + return spi_nor_sr_ready(nor); } =20 /** diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 7a68f2ad3ea1..e580830ed70f 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -8,6 +8,8 @@ =20 #include "core.h" =20 +#define SPINOR_OP_RDFSR 0x70 /* Read flag status register */ +#define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */ #define SPINOR_OP_MT_DTR_RD 0xfd /* Fast Read opcode in DTR mode */ #define SPINOR_OP_MT_RD_ANY_REG 0x85 /* Read volatile register */ #define SPINOR_OP_MT_WR_ANY_REG 0x81 /* Write volatile register */ @@ -17,6 +19,12 @@ #define SPINOR_MT_OCT_DTR 0xe7 /* Enable Octal DTR. */ #define SPINOR_MT_EXSPI 0xff /* Enable Extended SPI (default) */ =20 +/* Flag Status Register bits */ +#define FSR_READY BIT(7) /* Device status, 0 =3D Busy, 1 =3D Ready */ +#define FSR_E_ERR BIT(5) /* Erase operation status */ +#define FSR_P_ERR BIT(4) /* Program operation status */ +#define FSR_PT_ERR BIT(1) /* Protection error bit */ + static int micron_st_nor_octal_dtr_enable(struct spi_nor *nor, bool enable) { struct spi_mem_op op; @@ -273,6 +281,125 @@ static int micron_st_nor_set_4byte_addr_mode(struct s= pi_nor *nor, bool enable) return spi_nor_write_disable(nor); } =20 +/** + * spi_nor_read_fsr() - Read the Flag Status Register. + * @nor: pointer to 'struct spi_nor' + * @fsr: pointer to a DMA-able buffer where the value of the + * Flag Status Register will be written. Should be at least 2 + * bytes. + * + * Return: 0 on success, -errno otherwise. + */ +static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr) +{ + int ret; + + if (nor->spimem) { + struct spi_mem_op op =3D + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDFSR, 0), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_DATA_IN(1, fsr, 0)); + + if (nor->reg_proto =3D=3D SNOR_PROTO_8_8_8_DTR) { + op.addr.nbytes =3D nor->params->rdsr_addr_nbytes; + op.dummy.nbytes =3D nor->params->rdsr_dummy; + /* + * We don't want to read only one byte in DTR mode. So, + * read 2 and then discard the second byte. + */ + op.data.nbytes =3D 2; + } + + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); + + ret =3D spi_mem_exec_op(nor->spimem, &op); + } else { + ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDFSR, fsr, + 1); + } + + if (ret) + dev_dbg(nor->dev, "error %d reading FSR\n", ret); + + return ret; +} + +/** + * spi_nor_clear_fsr() - Clear the Flag Status Register. + * @nor: pointer to 'struct spi_nor'. + */ +static void spi_nor_clear_fsr(struct spi_nor *nor) +{ + int ret; + + if (nor->spimem) { + struct spi_mem_op op =3D + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLFSR, 0), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_NO_DATA); + + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); + + ret =3D spi_mem_exec_op(nor->spimem, &op); + } else { + ret =3D spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLFSR, + NULL, 0); + } + + if (ret) + dev_dbg(nor->dev, "error %d clearing FSR\n", ret); +} + +/** + * spi_nor_fsr_ready() - Query the Status Register as well as the Flag Sta= tus + * Register to see if the flash is ready for new commands. If there are any + * errors in the FSR clear them. + * @nor: pointer to 'struct spi_nor'. + * + * Return: 1 if ready, 0 if not ready, -errno on errors. + */ +static int spi_nor_fsr_ready(struct spi_nor *nor) +{ + int sr_ready, ret; + + sr_ready =3D spi_nor_sr_ready(nor); + if (sr_ready < 0) + return sr_ready; + + ret =3D spi_nor_read_fsr(nor, nor->bouncebuf); + if (ret) + return ret; + + if (nor->bouncebuf[0] & (FSR_E_ERR | FSR_P_ERR)) { + if (nor->bouncebuf[0] & FSR_E_ERR) + dev_err(nor->dev, "Erase operation failed.\n"); + else + dev_err(nor->dev, "Program operation failed.\n"); + + if (nor->bouncebuf[0] & FSR_PT_ERR) + dev_err(nor->dev, + "Attempted to modify a protected sector.\n"); + + spi_nor_clear_fsr(nor); + + /* + * WEL bit remains set to one when an erase or page program + * error occurs. Issue a Write Disable command to protect + * against inadvertent writes that can possibly corrupt the + * contents of the memory. + */ + ret =3D spi_nor_write_disable(nor); + if (ret) + return ret; + + return -EIO; + } + + return sr_ready && !!(nor->bouncebuf[0] & FSR_READY); +} + static void micron_st_nor_default_init(struct spi_nor *nor) { nor->flags |=3D SNOR_F_HAS_LOCK; @@ -281,8 +408,15 @@ static void micron_st_nor_default_init(struct spi_nor = *nor) nor->params->set_4byte_addr_mode =3D micron_st_nor_set_4byte_addr_mode; } =20 +static void micron_st_nor_late_init(struct spi_nor *nor) +{ + if (nor->flags & SNOR_F_USE_FSR) + nor->params->ready =3D spi_nor_fsr_ready; +} + static const struct spi_nor_fixups micron_st_nor_fixups =3D { .default_init =3D micron_st_nor_default_init, + .late_init =3D micron_st_nor_late_init, }; =20 const struct spi_nor_manufacturer spi_nor_micron =3D { diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index b44b05a6f934..4622251a79ff 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -47,8 +47,6 @@ #define SPINOR_OP_RDID 0x9f /* Read JEDEC ID */ #define SPINOR_OP_RDSFDP 0x5a /* Read SFDP */ #define SPINOR_OP_RDCR 0x35 /* Read configuration register */ -#define SPINOR_OP_RDFSR 0x70 /* Read flag status register */ -#define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */ #define SPINOR_OP_RDEAR 0xc8 /* Read Extended Address Register */ #define SPINOR_OP_WREAR 0xc5 /* Write Extended Address Register */ #define SPINOR_OP_SRSTEN 0x66 /* Software Reset Enable */ @@ -126,12 +124,6 @@ /* Enhanced Volatile Configuration Register bits */ #define EVCR_QUAD_EN_MICRON BIT(7) /* Micron Quad I/O */ =20 -/* Flag Status Register bits */ -#define FSR_READY BIT(7) /* Device status, 0 =3D Busy, 1 =3D Ready */ -#define FSR_E_ERR BIT(5) /* Erase operation status */ -#define FSR_P_ERR BIT(4) /* Program operation status */ -#define FSR_PT_ERR BIT(1) /* Protection error bit */ - /* Status Register 2 bits. */ #define SR2_QUAD_EN_BIT1 BIT(1) #define SR2_LB1 BIT(3) /* Security Register Lock Bit 1 */ --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03F61C433EF for ; Wed, 23 Feb 2022 13:45:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241156AbiBWNpj (ORCPT ); Wed, 23 Feb 2022 08:45:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42808 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241093AbiBWNow (ORCPT ); Wed, 23 Feb 2022 08:44:52 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3DCBFAC910 for ; Wed, 23 Feb 2022 05:44:17 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 6B6A32247C; Wed, 23 Feb 2022 14:44:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623855; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=nj33sEa1mwkdrgAwZgX2kvvf+/FEMBirt9My5egz17o=; b=Xjnm5OPBnHZqO/qWU+8VNuO6zEYGuCHa88//rjV6Rkv4I/Rjdr7gISVcbaekXP1h5SK3f1 cHVmaj1B4y6ffgA2gHdBDCqk4uAYunqmT/d5VYpGoxg6oIh6qtU4h7fUwBousIiVjTwHPo m7AhygQqoXvRgjufVM/bQVa4wuABgd4= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 25/32] mtd: spi-nor: micron-st: convert USE_FSR to a manufacturer flag Date: Wed, 23 Feb 2022 14:43:51 +0100 Message-Id: <20220223134358.1914798-26-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Now that all functions using that flag are local to the micron module, we can convert the flag to a manufacturer one. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav Tested-by: Pratyush Yadav # on mt35xu512aba, s28hs512t --- drivers/mtd/spi-nor/core.c | 3 -- drivers/mtd/spi-nor/core.h | 3 -- drivers/mtd/spi-nor/micron-st.c | 93 +++++++++++++++++++++------------ 3 files changed, 60 insertions(+), 39 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 5b56d718692b..ac0faedebafe 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2499,9 +2499,6 @@ static void spi_nor_init_flags(struct spi_nor *nor) =20 if (flags & USE_CLSR) nor->flags |=3D SNOR_F_USE_CLSR; - - if (flags & USE_FSR) - nor->flags |=3D SNOR_F_USE_FSR; } =20 /** diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index fabc01ae9a81..a02bf54289fb 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -12,7 +12,6 @@ #define SPI_NOR_MAX_ID_LEN 6 =20 enum spi_nor_option_flags { - SNOR_F_USE_FSR =3D BIT(0), SNOR_F_HAS_SR_TB =3D BIT(1), SNOR_F_NO_OP_CHIP_ERASE =3D BIT(2), SNOR_F_USE_CLSR =3D BIT(4), @@ -349,7 +348,6 @@ struct spi_nor_fixups { * NO_CHIP_ERASE: chip does not support chip erase. * SPI_NOR_NO_FR: can't do fastread. * USE_CLSR: use CLSR command. - * USE_FSR: use flag status register * * @no_sfdp_flags: flags that indicate support that can be discovered via= SFDP. * Used when SFDP tables are not defined in the flash. Th= ese @@ -401,7 +399,6 @@ struct flash_info { #define NO_CHIP_ERASE BIT(7) #define SPI_NOR_NO_FR BIT(8) #define USE_CLSR BIT(9) -#define USE_FSR BIT(10) =20 u8 no_sfdp_flags; #define SPI_NOR_SKIP_SFDP BIT(0) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index e580830ed70f..1a7227594bf0 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -8,6 +8,9 @@ =20 #include "core.h" =20 +/* flash_info mfr_flag. Used to read proprietary FSR register. */ +#define USE_FSR BIT(0) + #define SPINOR_OP_RDFSR 0x70 /* Read flag status register */ #define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */ #define SPINOR_OP_MT_DTR_RD 0xfd /* Fast Read opcode in DTR mode */ @@ -140,15 +143,17 @@ static const struct spi_nor_fixups mt35xu512aba_fixup= s =3D { =20 static const struct flash_info micron_nor_parts[] =3D { { "mt35xu512aba", INFO(0x2c5b1a, 0, 128 * 1024, 512) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP) FIXUP_FLAGS(SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE) - .fixups =3D &mt35xu512aba_fixups}, + MFR_FLAGS(USE_FSR) + .fixups =3D &mt35xu512aba_fixups + }, { "mt35xu02g", INFO(0x2c5b1c, 0, 128 * 1024, 2048) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_OCTAL_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, + FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + MFR_FLAGS(USE_FSR) + }, }; =20 static const struct flash_info st_nor_parts[] =3D { @@ -164,57 +169,79 @@ static const struct flash_info st_nor_parts[] =3D { NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + SPI_NOR_BP3_SR_BIT6) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + SPI_NOR_BP3_SR_BIT6) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "mt25ql256a", INFO6(0x20ba19, 0x104400, 64 * 1024, 512) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, + FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + MFR_FLAGS(USE_FSR) + }, { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, + SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "mt25qu256a", INFO6(0x20bb19, 0x104400, 64 * 1024, 512) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, + FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + MFR_FLAGS(USE_FSR) + }, { "n25q256ax1", INFO(0x20bb19, 0, 64 * 1024, 512) - FLAGS(USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "mt25ql512a", INFO6(0x20ba20, 0x104400, 64 * 1024, 1024) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, + FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + MFR_FLAGS(USE_FSR) + }, { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + SPI_NOR_BP3_SR_BIT6) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "mt25qu512a", INFO6(0x20bb20, 0x104400, 64 * 1024, 1024) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, + FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + MFR_FLAGS(USE_FSR) + }, { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + SPI_NOR_BP3_SR_BIT6) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048) - FLAGS(NO_CHIP_ERASE | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + FLAGS(NO_CHIP_ERASE) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "mt25ql02g", INFO(0x20ba22, 0, 64 * 1024, 4096) - FLAGS(NO_CHIP_ERASE | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + FLAGS(NO_CHIP_ERASE) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "mt25qu02g", INFO(0x20bb22, 0, 64 * 1024, 4096) - FLAGS(NO_CHIP_ERASE | USE_FSR) + FLAGS(NO_CHIP_ERASE) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, + SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, =20 { "m25p05", INFO(0x202010, 0, 32 * 1024, 2) }, { "m25p10", INFO(0x202011, 0, 32 * 1024, 4) }, @@ -410,7 +437,7 @@ static void micron_st_nor_default_init(struct spi_nor *= nor) =20 static void micron_st_nor_late_init(struct spi_nor *nor) { - if (nor->flags & SNOR_F_USE_FSR) + if (nor->info->mfr_flags & USE_FSR) nor->params->ready =3D spi_nor_fsr_ready; } =20 --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B09FC433F5 for ; Wed, 23 Feb 2022 13:45:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241254AbiBWNqB (ORCPT ); Wed, 23 Feb 2022 08:46:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241095AbiBWNow (ORCPT ); Wed, 23 Feb 2022 08:44:52 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6178BAD100 for ; Wed, 23 Feb 2022 05:44:17 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id CC3C0223F6; Wed, 23 Feb 2022 14:44:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623855; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=35/TrCmEc5UMzhIA1WiLFawNYfLWm/HAT5pOPDWhA7g=; b=oGhvUGdgRR6POL7pFSOWL899Vqs1yn00SDOSXcW5ESSlWSeYArrNCo/BKV29iGWF8Zi03i nQNiUvM4bO97oSswQQc7xnQw2XY+NS78D7banYY01NyLWQ3k+IT90wS5SiURY11revl1iP Mw6fCfWGsKqUqEvxE35LGOoYxfYCUCs= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 26/32] mtd: spi-nor: micron-st: rename vendor specific functions and defines Date: Wed, 23 Feb 2022 14:43:52 +0100 Message-Id: <20220223134358.1914798-27-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Drop the generic spi_nor prefix for all the micron-st functions. Signed-off-by: Michael Walle Tested-by: Pratyush Yadav # on mt35xu512aba, s28hs512t --- drivers/mtd/spi-nor/micron-st.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 1a7227594bf0..8a20475ce77a 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -309,7 +309,7 @@ static int micron_st_nor_set_4byte_addr_mode(struct spi= _nor *nor, bool enable) } =20 /** - * spi_nor_read_fsr() - Read the Flag Status Register. + * micron_st_nor_read_fsr() - Read the Flag Status Register. * @nor: pointer to 'struct spi_nor' * @fsr: pointer to a DMA-able buffer where the value of the * Flag Status Register will be written. Should be at least 2 @@ -317,7 +317,7 @@ static int micron_st_nor_set_4byte_addr_mode(struct spi= _nor *nor, bool enable) * * Return: 0 on success, -errno otherwise. */ -static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr) +static int micron_st_nor_read_fsr(struct spi_nor *nor, u8 *fsr) { int ret; =20 @@ -353,10 +353,10 @@ static int spi_nor_read_fsr(struct spi_nor *nor, u8 *= fsr) } =20 /** - * spi_nor_clear_fsr() - Clear the Flag Status Register. + * micron_st_nor_clear_fsr() - Clear the Flag Status Register. * @nor: pointer to 'struct spi_nor'. */ -static void spi_nor_clear_fsr(struct spi_nor *nor) +static void micron_st_nor_clear_fsr(struct spi_nor *nor) { int ret; =20 @@ -380,14 +380,14 @@ static void spi_nor_clear_fsr(struct spi_nor *nor) } =20 /** - * spi_nor_fsr_ready() - Query the Status Register as well as the Flag Sta= tus + * micron_st_nor_ready() - Query the Status Register as well as the Flag S= tatus * Register to see if the flash is ready for new commands. If there are any * errors in the FSR clear them. * @nor: pointer to 'struct spi_nor'. * * Return: 1 if ready, 0 if not ready, -errno on errors. */ -static int spi_nor_fsr_ready(struct spi_nor *nor) +static int micron_st_nor_ready(struct spi_nor *nor) { int sr_ready, ret; =20 @@ -395,7 +395,7 @@ static int spi_nor_fsr_ready(struct spi_nor *nor) if (sr_ready < 0) return sr_ready; =20 - ret =3D spi_nor_read_fsr(nor, nor->bouncebuf); + ret =3D micron_st_nor_read_fsr(nor, nor->bouncebuf); if (ret) return ret; =20 @@ -409,7 +409,7 @@ static int spi_nor_fsr_ready(struct spi_nor *nor) dev_err(nor->dev, "Attempted to modify a protected sector.\n"); =20 - spi_nor_clear_fsr(nor); + micron_st_nor_clear_fsr(nor); =20 /* * WEL bit remains set to one when an erase or page program @@ -438,7 +438,7 @@ static void micron_st_nor_default_init(struct spi_nor *= nor) static void micron_st_nor_late_init(struct spi_nor *nor) { if (nor->info->mfr_flags & USE_FSR) - nor->params->ready =3D spi_nor_fsr_ready; + nor->params->ready =3D micron_st_nor_ready; } =20 static const struct spi_nor_fixups micron_st_nor_fixups =3D { --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA267C433F5 for ; Wed, 23 Feb 2022 13:45:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241288AbiBWNqZ (ORCPT ); Wed, 23 Feb 2022 08:46:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241040AbiBWNow (ORCPT ); Wed, 23 Feb 2022 08:44:52 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31DA1AD109 for ; Wed, 23 Feb 2022 05:44:17 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 13807223F7; Wed, 23 Feb 2022 14:44:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623856; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=uL11yQUerN/5PBAFbvZdCuFGauujjl+DUxFoPRdGU3I=; b=QtL3GOX2/84/4ZWhgcWRRiAnpysKy/vR/Pw2/S2angWY/B2sPG7t0fbYARHY5kL1ZEksMd GiEUjRTrTgW1BiCPR7oUb9KLs1tR1xw4PzCvGHG/RA3oPvdWxAjoYo1vPcJ2r7UUGgVo8U e0m0LrSVmUuKDL3/eylXnlxytq7IT7g= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 27/32] mtd: spi-nor: spansion: slightly rework control flow in late_init() Date: Wed, 23 Feb 2022 14:43:53 +0100 Message-Id: <20220223134358.1914798-28-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Don't return early when the flash is smaller than or equal to 16MiB. We need to be able to register hooks for all sizes of flashes. This also has the benefit that it increases the readability of the code because the action, i.e. registering the fixups, is connected to the condition, i.e. flashes larger than 16MiB. Signed-off-by: Michael Walle Reviewed-by: Pratyush Yadav Tested-by: Pratyush Yadav # on mt35xu512aba, s28hs512t --- drivers/mtd/spi-nor/spansion.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 5affa8ae43a7..1a0e7214d9e5 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -296,13 +296,12 @@ static const struct flash_info spansion_nor_parts[] = =3D { =20 static void spansion_nor_late_init(struct spi_nor *nor) { - if (nor->params->size <=3D SZ_16M) - return; - - nor->flags |=3D SNOR_F_4B_OPCODES; - /* No small sector erase for 4-byte command set */ - nor->erase_opcode =3D SPINOR_OP_SE; - nor->mtd.erasesize =3D nor->info->sector_size; + if (nor->params->size > SZ_16M) { + nor->flags |=3D SNOR_F_4B_OPCODES; + /* No small sector erase for 4-byte command set */ + nor->erase_opcode =3D SPINOR_OP_SE; + nor->mtd.erasesize =3D nor->info->sector_size; + } } =20 static const struct spi_nor_fixups spansion_nor_fixups =3D { --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1306C433F5 for ; Wed, 23 Feb 2022 13:45:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241283AbiBWNqW (ORCPT ); Wed, 23 Feb 2022 08:46:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241101AbiBWNox (ORCPT ); Wed, 23 Feb 2022 08:44:53 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 63326AD111 for ; Wed, 23 Feb 2022 05:44:18 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id BCB932241C; Wed, 23 Feb 2022 14:44:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623856; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OXdTbmyzIy7IuS2iIMvCIbs79cjfG66//ZMRdryoxy4=; b=iqdgqIo9LwCtZH+on+EMuepDiuGywLi0kXtdEJIZmBTBrA3J/nxVe75xMno24zGnikvPKw HkOw0gi1DvTgTQy1LOjbAgWzFYQ+ieXO0VsMr1tMPaQv8TPA15BlKgJjzMEpdd1STxGV9O Z/vUiofU5ePN6g7YCKqB56vYGcgSIj8= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 28/32] mtd: spi-nor: move all spansion specifics into spansion.c Date: Wed, 23 Feb 2022 14:43:54 +0100 Message-Id: <20220223134358.1914798-29-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The clear status register flags is only available on spansion flashes. Move all the functions around that into the spanion module. Signed-off-by: Michael Walle Reviewed-by: Pratyush Yadav Tested-by: Pratyush Yadav # on mt35xu512aba, s28hs512t --- drivers/mtd/spi-nor/core.c | 49 ------------------------ drivers/mtd/spi-nor/spansion.c | 70 ++++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 1 - 3 files changed, 70 insertions(+), 50 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index ac0faedebafe..e2b8b0a438ce 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -554,33 +554,6 @@ int spi_nor_write_ear(struct spi_nor *nor, u8 ear) return ret; } =20 -/** - * spi_nor_clear_sr() - Clear the Status Register. - * @nor: pointer to 'struct spi_nor'. - */ -static void spi_nor_clear_sr(struct spi_nor *nor) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLSR, 0), - SPI_MEM_OP_NO_ADDR, - SPI_MEM_OP_NO_DUMMY, - SPI_MEM_OP_NO_DATA); - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLSR, - NULL, 0); - } - - if (ret) - dev_dbg(nor->dev, "error %d clearing SR\n", ret); -} - /** * spi_nor_sr_ready() - Query the Status Register to see if the flash is r= eady * for new commands. @@ -595,28 +568,6 @@ int spi_nor_sr_ready(struct spi_nor *nor) if (ret) return ret; =20 - if (nor->flags & SNOR_F_USE_CLSR && - nor->bouncebuf[0] & (SR_E_ERR | SR_P_ERR)) { - if (nor->bouncebuf[0] & SR_E_ERR) - dev_err(nor->dev, "Erase Error occurred\n"); - else - dev_err(nor->dev, "Programming Error occurred\n"); - - spi_nor_clear_sr(nor); - - /* - * WEL bit remains set to one when an erase or page program - * error occurs. Issue a Write Disable command to protect - * against inadvertent writes that can possibly corrupt the - * contents of the memory. - */ - ret =3D spi_nor_write_disable(nor); - if (ret) - return ret; - - return -EIO; - } - return !(nor->bouncebuf[0] & SR_WIP); } =20 diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 1a0e7214d9e5..dbafe97c2636 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -8,6 +8,7 @@ =20 #include "core.h" =20 +#define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */ #define SPINOR_OP_RD_ANY_REG 0x65 /* Read any register */ #define SPINOR_OP_WR_ANY_REG 0x71 /* Write any register */ #define SPINOR_REG_CYPRESS_CFR2V 0x00800003 @@ -294,6 +295,72 @@ static const struct flash_info spansion_nor_parts[] = =3D { }, }; =20 +/** + * spi_nor_clear_sr() - Clear the Status Register. + * @nor: pointer to 'struct spi_nor'. + */ +static void spi_nor_clear_sr(struct spi_nor *nor) +{ + int ret; + + if (nor->spimem) { + struct spi_mem_op op =3D + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLSR, 0), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_NO_DATA); + + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); + + ret =3D spi_mem_exec_op(nor->spimem, &op); + } else { + ret =3D spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLSR, + NULL, 0); + } + + if (ret) + dev_dbg(nor->dev, "error %d clearing SR\n", ret); +} + +/** + * spi_nor_sr_ready_and_clear() - Query the Status Register to see if the = flash + * is ready for new commands and clear it if there are any errors. + * @nor: pointer to 'struct spi_nor'. + * + * Return: 1 if ready, 0 if not ready, -errno on errors. + */ +static int spi_nor_sr_ready_and_clear(struct spi_nor *nor) +{ + int ret; + + ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + if (ret) + return ret; + + if (nor->bouncebuf[0] & (SR_E_ERR | SR_P_ERR)) { + if (nor->bouncebuf[0] & SR_E_ERR) + dev_err(nor->dev, "Erase Error occurred\n"); + else + dev_err(nor->dev, "Programming Error occurred\n"); + + spi_nor_clear_sr(nor); + + /* + * WEL bit remains set to one when an erase or page program + * error occurs. Issue a Write Disable command to protect + * against inadvertent writes that can possibly corrupt the + * contents of the memory. + */ + ret =3D spi_nor_write_disable(nor); + if (ret) + return ret; + + return -EIO; + } + + return !(nor->bouncebuf[0] & SR_WIP); +} + static void spansion_nor_late_init(struct spi_nor *nor) { if (nor->params->size > SZ_16M) { @@ -302,6 +369,9 @@ static void spansion_nor_late_init(struct spi_nor *nor) nor->erase_opcode =3D SPINOR_OP_SE; nor->mtd.erasesize =3D nor->info->sector_size; } + + if (nor->flags & SNOR_F_USE_CLSR) + nor->params->ready =3D spi_nor_sr_ready_and_clear; } =20 static const struct spi_nor_fixups spansion_nor_fixups =3D { diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 4622251a79ff..5e25a7b75ae2 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -90,7 +90,6 @@ =20 /* Used for Spansion flashes only. */ #define SPINOR_OP_BRWR 0x17 /* Bank register write */ -#define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */ =20 /* Used for Micron flashes only. */ #define SPINOR_OP_RD_EVCR 0x65 /* Read EVCR register */ --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3354CC433EF for ; Wed, 23 Feb 2022 13:45:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241267AbiBWNqJ (ORCPT ); Wed, 23 Feb 2022 08:46:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241071AbiBWNox (ORCPT ); Wed, 23 Feb 2022 08:44:53 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B15BAD112 for ; Wed, 23 Feb 2022 05:44:18 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 0094522438; Wed, 23 Feb 2022 14:44:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623857; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cYsm7dmyoJQnu84eGbNpCzXemQ3P5LIli4j54ShhMg4=; b=XfZsh1R1Wj1ESylE9vhyMJz77F45SGjfFP5MiwQ1ZJ223UwLjq7IOV3FPz8M0jLs7/943k CZu1sJLpeA2rPWOb9xNHmgKH09mzgUgt/sAML0J1fpoH9T6iFpp3c/2oELHgDHbKe6tVUe 7C8xu5w8RriHKsr1i+75CaWvKFEWwx8= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 29/32] mtd: spi-nor: spansion: convert USE_CLSR to a manufacturer flag Date: Wed, 23 Feb 2022 14:43:55 +0100 Message-Id: <20220223134358.1914798-30-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Now that all functions using that flag are local to the spansion module, we can convert the flag to a manufacturer one. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav Tested-by: Pratyush Yadav # on mt35xu512aba, s28hs512t --- drivers/mtd/spi-nor/core.c | 3 -- drivers/mtd/spi-nor/core.h | 3 -- drivers/mtd/spi-nor/spansion.c | 55 +++++++++++++++++++++------------- 3 files changed, 34 insertions(+), 27 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index e2b8b0a438ce..f5a2f37d140e 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2447,9 +2447,6 @@ static void spi_nor_init_flags(struct spi_nor *nor) =20 if (flags & NO_CHIP_ERASE) nor->flags |=3D SNOR_F_NO_OP_CHIP_ERASE; - - if (flags & USE_CLSR) - nor->flags |=3D SNOR_F_USE_CLSR; } =20 /** diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index a02bf54289fb..2130a96e2044 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -14,7 +14,6 @@ enum spi_nor_option_flags { SNOR_F_HAS_SR_TB =3D BIT(1), SNOR_F_NO_OP_CHIP_ERASE =3D BIT(2), - SNOR_F_USE_CLSR =3D BIT(4), SNOR_F_BROKEN_RESET =3D BIT(5), SNOR_F_4B_OPCODES =3D BIT(6), SNOR_F_HAS_4BAIT =3D BIT(7), @@ -347,7 +346,6 @@ struct spi_nor_fixups { * SPI_NOR_NO_ERASE: no erase command needed. * NO_CHIP_ERASE: chip does not support chip erase. * SPI_NOR_NO_FR: can't do fastread. - * USE_CLSR: use CLSR command. * * @no_sfdp_flags: flags that indicate support that can be discovered via= SFDP. * Used when SFDP tables are not defined in the flash. Th= ese @@ -398,7 +396,6 @@ struct flash_info { #define SPI_NOR_NO_ERASE BIT(6) #define NO_CHIP_ERASE BIT(7) #define SPI_NOR_NO_FR BIT(8) -#define USE_CLSR BIT(9) =20 u8 no_sfdp_flags; #define SPI_NOR_SKIP_SFDP BIT(0) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index dbafe97c2636..32d3301ce385 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -8,6 +8,9 @@ =20 #include "core.h" =20 +/* flash_info mfr_flag. Used to clear sticky prorietary SR bits. */ +#define USE_CLSR BIT(0) + #define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */ #define SPINOR_OP_RD_ANY_REG 0x65 /* Read any register */ #define SPINOR_OP_WR_ANY_REG 0x71 /* Write any register */ @@ -212,43 +215,53 @@ static const struct flash_info spansion_nor_parts[] = =3D { { "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128) NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "s25fl128s0", INFO6(0x012018, 0x4d0080, 256 * 1024, 64) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fl256s0", INFO6(0x010219, 0x4d0080, 256 * 1024, 128) - FLAGS(USE_CLSR) NO_SFDP_FLAGS(SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, + SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fl256s1", INFO6(0x010219, 0x4d0180, 64 * 1024, 512) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fl512s", INFO6(0x010220, 0x4d0080, 256 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + FLAGS(SPI_NOR_HAS_LOCK) + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fs128s1", INFO6(0x012018, 0x4d0181, 64 * 1024, 256) - FLAGS(USE_CLSR) NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) .fixups =3D &s25fs_s_nor_fixups, }, { "s25fs256s0", INFO6(0x010219, 0x4d0081, 256 * 1024, 128) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256) - FLAGS(USE_CLSR) NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) .fixups =3D &s25fs_s_nor_fixups, }, { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64) }, { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256) }, { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8) }, { "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16) }, { "s25sl016a", INFO(0x010214, 0, 64 * 1024, 32) }, @@ -370,7 +383,7 @@ static void spansion_nor_late_init(struct spi_nor *nor) nor->mtd.erasesize =3D nor->info->sector_size; } =20 - if (nor->flags & SNOR_F_USE_CLSR) + if (nor->info->mfr_flags & USE_CLSR) nor->params->ready =3D spi_nor_sr_ready_and_clear; } =20 --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAACDC433F5 for ; Wed, 23 Feb 2022 13:45:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241222AbiBWNqN (ORCPT ); Wed, 23 Feb 2022 08:46:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42468 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241100AbiBWNox (ORCPT ); Wed, 23 Feb 2022 08:44:53 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E3EA1AD113 for ; Wed, 23 Feb 2022 05:44:18 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 3FB1C22441; Wed, 23 Feb 2022 14:44:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623857; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0AaEL49bVNyArPkAHpyLUsNVUBDXrbZNlfI++WTggmA=; b=at5saJJpY1lu4kbyfwL8XFB8mGT93lYhkB3RHO3DCqqjXMZ0aO6vV7YKfQ7CVTMMehtvjX QHL70/up3DO17LaQ10TLb14HinB26DK5s/n25hdZBINK8Vp68uKV5p9NB+RhqjPKAxqAL0 ETmrUqerrM0LdKVOt/GM8HdnDtysj40= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 30/32] mtd: spi-nor: spansion: rename vendor specific functions and defines Date: Wed, 23 Feb 2022 14:43:56 +0100 Message-Id: <20220223134358.1914798-31-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Drop the generic spi_nor prefix for all the spansion functions. Signed-off-by: Michael Walle Reviewed-by: Pratyush Yadav Tested-by: Pratyush Yadav # on mt35xu512aba, s28hs512t --- drivers/mtd/spi-nor/spansion.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 32d3301ce385..f24e546e04a5 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -309,10 +309,10 @@ static const struct flash_info spansion_nor_parts[] = =3D { }; =20 /** - * spi_nor_clear_sr() - Clear the Status Register. + * spansion_nor_clear_sr() - Clear the Status Register. * @nor: pointer to 'struct spi_nor'. */ -static void spi_nor_clear_sr(struct spi_nor *nor) +static void spansion_nor_clear_sr(struct spi_nor *nor) { int ret; =20 @@ -336,13 +336,13 @@ static void spi_nor_clear_sr(struct spi_nor *nor) } =20 /** - * spi_nor_sr_ready_and_clear() - Query the Status Register to see if the = flash - * is ready for new commands and clear it if there are any errors. + * spansion_nor_sr_ready_and_clear() - Query the Status Register to see if= the + * flash is ready for new commands and clear it if there are any errors. * @nor: pointer to 'struct spi_nor'. * * Return: 1 if ready, 0 if not ready, -errno on errors. */ -static int spi_nor_sr_ready_and_clear(struct spi_nor *nor) +static int spansion_nor_sr_ready_and_clear(struct spi_nor *nor) { int ret; =20 @@ -356,7 +356,7 @@ static int spi_nor_sr_ready_and_clear(struct spi_nor *n= or) else dev_err(nor->dev, "Programming Error occurred\n"); =20 - spi_nor_clear_sr(nor); + spansion_nor_clear_sr(nor); =20 /* * WEL bit remains set to one when an erase or page program @@ -384,7 +384,7 @@ static void spansion_nor_late_init(struct spi_nor *nor) } =20 if (nor->info->mfr_flags & USE_CLSR) - nor->params->ready =3D spi_nor_sr_ready_and_clear; + nor->params->ready =3D spansion_nor_sr_ready_and_clear; } =20 static const struct spi_nor_fixups spansion_nor_fixups =3D { --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55CD3C433F5 for ; Wed, 23 Feb 2022 13:45:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241234AbiBWNqQ (ORCPT ); Wed, 23 Feb 2022 08:46:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42408 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241099AbiBWNox (ORCPT ); Wed, 23 Feb 2022 08:44:53 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B901AD115 for ; Wed, 23 Feb 2022 05:44:19 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 7957E22481; Wed, 23 Feb 2022 14:44:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623857; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=acuMMmcA9VmQZOASvU5gU9zXugIenhc8Io0FNHjds/g=; b=paHkoDs/LU+X1CypVRs/Xr2CBe9Nchjuoqk/jB4dgSJ2oQTpEGFVeN82iQ/prsK2Ye7bdR IewnijdV27Tlu7/0fSYTcjxdRFsOB1x0YUIidGJlu7k3mcdYrTWH3yhrOclmPZ0TLJ9Oaw vLitYBad6NqYWRfIo6QqzwPFBJXNlaI= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 31/32] mtd: spi-nor: slightly change code style in spi_nor_sr_ready() Date: Wed, 23 Feb 2022 14:43:57 +0100 Message-Id: <20220223134358.1914798-32-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Now that there is almost no special case code left in spi_nor_sr_ready(), the return check looks odd. Move the function call closer to the return code checking. Signed-off-by: Michael Walle Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index f5a2f37d140e..9014008e60b3 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -563,8 +563,9 @@ int spi_nor_write_ear(struct spi_nor *nor, u8 ear) */ int spi_nor_sr_ready(struct spi_nor *nor) { - int ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + int ret; =20 + ret =3D spi_nor_read_sr(nor, nor->bouncebuf); if (ret) return ret; =20 --=20 2.30.2 From nobody Thu Jun 25 03:08:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 235F0C433EF for ; Wed, 23 Feb 2022 13:45:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241239AbiBWNqS (ORCPT ); Wed, 23 Feb 2022 08:46:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241106AbiBWNox (ORCPT ); Wed, 23 Feb 2022 08:44:53 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6F9BAD11C for ; Wed, 23 Feb 2022 05:44:19 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 1E3AB2244F; Wed, 23 Feb 2022 14:44:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645623858; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BUHjRq3B/3JjsHlcHc+UiOV+3YaaqpA1vvTF3QO9238=; b=bXuicVX0rflHWdGKwarIkjI7YKGuzPnD7dB6J08XHkeAXhjmkejR/EMsHRv2PfYOpFgVOv QKjD7eC+ZgjKthxFJSPJffNH3w2987D47kO9HQBHC3skrTUbh70b9U5rGSaM/AGNIdxz6b XhdkQTqJnir0q3XeGYCgB1IgZEf/+uU= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v5 32/32] mtd: spi-nor: renumber flags Date: Wed, 23 Feb 2022 14:43:58 +0100 Message-Id: <20220223134358.1914798-33-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220223134358.1914798-1-michael@walle.cc> References: <20220223134358.1914798-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" As we have deleted some flag, lets renumber them so there are no holes. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.h | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 2130a96e2044..b7fd760e3b47 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -12,20 +12,20 @@ #define SPI_NOR_MAX_ID_LEN 6 =20 enum spi_nor_option_flags { - SNOR_F_HAS_SR_TB =3D BIT(1), - SNOR_F_NO_OP_CHIP_ERASE =3D BIT(2), - SNOR_F_BROKEN_RESET =3D BIT(5), - SNOR_F_4B_OPCODES =3D BIT(6), - SNOR_F_HAS_4BAIT =3D BIT(7), - SNOR_F_HAS_LOCK =3D BIT(8), - SNOR_F_HAS_16BIT_SR =3D BIT(9), - SNOR_F_NO_READ_CR =3D BIT(10), - SNOR_F_HAS_SR_TB_BIT6 =3D BIT(11), - SNOR_F_HAS_4BIT_BP =3D BIT(12), - SNOR_F_HAS_SR_BP3_BIT6 =3D BIT(13), - SNOR_F_IO_MODE_EN_VOLATILE =3D BIT(14), - SNOR_F_SOFT_RESET =3D BIT(15), - SNOR_F_SWP_IS_VOLATILE =3D BIT(16), + SNOR_F_HAS_SR_TB =3D BIT(0), + SNOR_F_NO_OP_CHIP_ERASE =3D BIT(1), + SNOR_F_BROKEN_RESET =3D BIT(2), + SNOR_F_4B_OPCODES =3D BIT(3), + SNOR_F_HAS_4BAIT =3D BIT(4), + SNOR_F_HAS_LOCK =3D BIT(5), + SNOR_F_HAS_16BIT_SR =3D BIT(6), + SNOR_F_NO_READ_CR =3D BIT(7), + SNOR_F_HAS_SR_TB_BIT6 =3D BIT(8), + SNOR_F_HAS_4BIT_BP =3D BIT(9), + SNOR_F_HAS_SR_BP3_BIT6 =3D BIT(10), + SNOR_F_IO_MODE_EN_VOLATILE =3D BIT(11), + SNOR_F_SOFT_RESET =3D BIT(12), + SNOR_F_SWP_IS_VOLATILE =3D BIT(13), }; =20 struct spi_nor_read_command { --=20 2.30.2