From nobody Thu Jun 25 09:38:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EF55C433F5 for ; Tue, 22 Feb 2022 12:03:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230242AbiBVMEA (ORCPT ); Tue, 22 Feb 2022 07:04:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60280 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231978AbiBVMDw (ORCPT ); Tue, 22 Feb 2022 07:03:52 -0500 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA6AFC6210; Tue, 22 Feb 2022 04:03:25 -0800 (PST) Received: by mail-wr1-x42b.google.com with SMTP id u1so32729129wrg.11; Tue, 22 Feb 2022 04:03:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=QbmY80ocxNOiijSbsV19VPgVTJ6ROSn9KA0LYKbj2Ss=; b=MwbETFFEcrGhyG+LH1t68UsAe53GCSf6urVxWoBvDVlCGfAcvUfapW8Uxq2bXd6Bw+ aNVFsaEE9mCxY2/8v7SKrARfQWLVCFjZ1NWsZB6kbfSTPt7zurbCxv8a4q9oe/gQZ7zU DoUAEqETC2nTzi6H82/0Mxti9k2vVGD6zRNO4+59/m9VP/krtr62munaBLFtEX74wHc3 cNTOniX5rpos3Liz/tyu+dimFrg/XCPhg3LEimTqM8RyCA8wU7uG4CnZV0MY+zaWug6X 9QTWE+/aBMPOrBVboZ8H4+CC2tWeoWnbV0UrdobfF1KybUnzJNh5n4os6+JHJquE2Qj2 57Dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=QbmY80ocxNOiijSbsV19VPgVTJ6ROSn9KA0LYKbj2Ss=; b=mFNLG+PDn6tUorOOipFFOJV9bzIV4+1ynKdlyoU4Gbbe+yhvJ2gwFPSY0tTJs3GG0L MRxSi3/VpynwbiqeK+/ZcTuYZJYOwgvCKh7MrU/Nfbq31e7Cp0O1pvqz3wqMcyD5Cyq5 5CBC5JRqgS2auJEPBluBapM0EOEztP1AElKCVwcWjJ9YN/UJF9ZpT4WuVC2z8/ap93IZ 951yySSLrjYBfrfM7G3la+wTp+wRCmU4c0nTaFOScqP/CbZZ2NQmSK5qyWfp+djfxAdB 1LchR0Qa1UBxlI7lKNnIKL4huDUAN/uKpBDQrMDc6Lgy6OXFjP0U8vzjm1MRYI0zqvwO FWNw== X-Gm-Message-State: AOAM531AovNfwg6m1J4HP3SziZLSxGZ66qK/5pPnOu3cA09IotE+LS0/ kkPV2Sf0tbAIB15mOxL+0JU= X-Google-Smtp-Source: ABdhPJz+y6HNF/vXrsjO1hB+4KCEYzs7HiueM6A9qCnX0USE6K7ZbYhvnQYVzFCmpLKSxqerxRCFGA== X-Received: by 2002:adf:f846:0:b0:1d9:3079:a02f with SMTP id d6-20020adff846000000b001d93079a02fmr19192537wrq.62.1645531404467; Tue, 22 Feb 2022 04:03:24 -0800 (PST) Received: from localhost (cpc154979-craw9-2-0-cust193.16-3.cable.virginm.net. [80.193.200.194]) by smtp.gmail.com with ESMTPSA id t16sm3178500wrg.99.2022.02.22.04.03.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Feb 2022 04:03:24 -0800 (PST) From: Colin Ian King To: Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Daniel Vetter , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] drm/i915: make a handful of read-only arrays static const Date: Tue, 22 Feb 2022 12:03:23 +0000 Message-Id: <20220222120323.86480-1-colin.i.king@gmail.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Don't populate the read-only arrays on the stack but instead make them static const. Also makes the object code a little smaller. Reformat the statements to clear up checkpatch warning. Signed-off-by: Colin Ian King Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_vdsc.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i9= 15/display/intel_vdsc.c index 3faea903b9ae..d49f66237ec3 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -378,10 +378,18 @@ calculate_rc_params(struct rc_parameters *rc, { int bpc =3D vdsc_cfg->bits_per_component; int bpp =3D vdsc_cfg->bits_per_pixel >> 4; - int ofs_und6[] =3D { 0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -1= 2, -12, -12 }; - int ofs_und8[] =3D { 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12,= -12, -12 }; - int ofs_und12[] =3D { 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12= , -12, -12 }; - int ofs_und15[] =3D { 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -= 12, -12 }; + static const int ofs_und6[] =3D { + 0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12 + }; + static const int ofs_und8[] =3D { + 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12 + }; + static const int ofs_und12[] =3D { + 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -10, -12, -12, -12 + }; + static const int ofs_und15[] =3D { + 10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, -12 + }; int qp_bpc_modifier =3D (bpc - 8) * 2; u32 res, buf_i, bpp_i; =20 --=20 2.34.1