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Sat, 19 Feb 2022 10:32:37 -0800 (PST) Received: from localhost.localdomain ([141.72.243.13]) by smtp.gmail.com with ESMTPSA id ba27sm17611568wrb.61.2022.02.19.10.32.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Feb 2022 10:32:37 -0800 (PST) From: Moses Christopher Bollavarapu To: gregkh@linuxfoundation.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Moses Christopher Bollavarapu Subject: [PATCH] staging: rtl8192e: use BIT macro instead of left shifting Date: Sat, 19 Feb 2022 19:32:34 +0100 Message-Id: <20220219183234.31216-1-mosescb.dev@gmail.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" There is a BIT(nr) macro available in vdso/bits.h which is doing the same left shift operation Example: (1 << 7) =3D=3D BIT(7) Signed-off-by: Moses Christopher Bollavarapu Reviewed-by: Dan Carpenter --- drivers/staging/rtl8192e/rtllib_debug.h | 54 +++++++++++++------------ 1 file changed, 28 insertions(+), 26 deletions(-) diff --git a/drivers/staging/rtl8192e/rtllib_debug.h b/drivers/staging/rtl8= 192e/rtllib_debug.h index 9065901636f5..e3e8302945eb 100644 --- a/drivers/staging/rtl8192e/rtllib_debug.h +++ b/drivers/staging/rtl8192e/rtllib_debug.h @@ -7,6 +7,8 @@ #ifndef _RTL_DEBUG_H #define _RTL_DEBUG_H =20 +#include + /* Allow files to override DRV_NAME */ #ifndef DRV_NAME #define DRV_NAME "rtllib_92e" @@ -16,32 +18,32 @@ extern u32 rt_global_debug_component; =20 /* These are the defines for rt_global_debug_component */ enum RTL_DEBUG { - COMP_TRACE =3D (1 << 0), - COMP_DBG =3D (1 << 1), - COMP_INIT =3D (1 << 2), - COMP_RECV =3D (1 << 3), - COMP_POWER =3D (1 << 6), - COMP_SWBW =3D (1 << 8), - COMP_SEC =3D (1 << 9), - COMP_LPS =3D (1 << 10), - COMP_QOS =3D (1 << 11), - COMP_RATE =3D (1 << 12), - COMP_RXDESC =3D (1 << 13), - COMP_PHY =3D (1 << 14), - COMP_DIG =3D (1 << 15), - COMP_TXAGC =3D (1 << 16), - COMP_HALDM =3D (1 << 17), - COMP_POWER_TRACKING =3D (1 << 18), - COMP_CH =3D (1 << 19), - COMP_RF =3D (1 << 20), - COMP_FIRMWARE =3D (1 << 21), - COMP_RESET =3D (1 << 23), - COMP_CMDPKT =3D (1 << 24), - COMP_SCAN =3D (1 << 25), - COMP_PS =3D (1 << 26), - COMP_DOWN =3D (1 << 27), - COMP_INTR =3D (1 << 28), - COMP_ERR =3D (1 << 31) + COMP_TRACE =3D BIT(0), + COMP_DBG =3D BIT(1), + COMP_INIT =3D BIT(2), + COMP_RECV =3D BIT(3), + COMP_POWER =3D BIT(6), + COMP_SWBW =3D BIT(8), + COMP_SEC =3D BIT(9), + COMP_LPS =3D BIT(10), + COMP_QOS =3D BIT(11), + COMP_RATE =3D BIT(12), + COMP_RXDESC =3D BIT(13), + COMP_PHY =3D BIT(14), + COMP_DIG =3D BIT(15), + COMP_TXAGC =3D BIT(16), + COMP_HALDM =3D BIT(17), + COMP_POWER_TRACKING =3D BIT(18), + COMP_CH =3D BIT(19), + COMP_RF =3D BIT(20), + COMP_FIRMWARE =3D BIT(21), + COMP_RESET =3D BIT(23), + COMP_CMDPKT =3D BIT(24), + COMP_SCAN =3D BIT(25), + COMP_PS =3D BIT(26), + COMP_DOWN =3D BIT(27), + COMP_INTR =3D BIT(28), + COMP_ERR =3D BIT(31) }; =20 #define RT_TRACE(component, x, args...) \ --=20 2.30.2