From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EF34C433EF for ; Fri, 18 Feb 2022 11:36:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234594AbiBRLgo (ORCPT ); Fri, 18 Feb 2022 06:36:44 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:43972 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234556AbiBRLgf (ORCPT ); Fri, 18 Feb 2022 06:36:35 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 87BE82B0B37 for ; Fri, 18 Feb 2022 03:36:16 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 78720223EF; Fri, 18 Feb 2022 12:36:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184174; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PtTcOZ5uJmuDgpPQTtF1sV4m//Y+QuqhzoWTdilRjsE=; b=QpjTJYoVnhXCmAJn/q6Im0PBrO6zH/i8STj1lPW4AYlIm6xuhB5NeoEWg2O/PHfOxete3j 6hnPUv3UKfCodsYLDUJjHggXlB2GiyGyrH4ZWlTChg9KJshnCkRNg3VYmtgY67mPpGuiz1 JvUnq06p0G8domeHi6nWhTEr157dbUg= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 01/32] mtd: spi-nor: atmel: unify function names Date: Fri, 18 Feb 2022 12:35:36 +0100 Message-Id: <20220218113607.1360020-2-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/atmel.c | 81 +++++++++++++++++++------------------ 1 file changed, 42 insertions(+), 39 deletions(-) diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index d6d889ce8876..19fbad841e2f 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -16,12 +16,12 @@ * is to unlock the whole flash array on startup. Therefore, we have to su= pport * exactly this operation. */ -static int atmel_at25fs_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) +static int at25fs_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) { return -EOPNOTSUPP; } =20 -static int atmel_at25fs_unlock(struct spi_nor *nor, loff_t ofs, uint64_t l= en) +static int at25fs_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) { int ret; =20 @@ -37,28 +37,28 @@ static int atmel_at25fs_unlock(struct spi_nor *nor, lof= f_t ofs, uint64_t len) return ret; } =20 -static int atmel_at25fs_is_locked(struct spi_nor *nor, loff_t ofs, uint64_= t len) +static int at25fs_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) { return -EOPNOTSUPP; } =20 -static const struct spi_nor_locking_ops atmel_at25fs_locking_ops =3D { - .lock =3D atmel_at25fs_lock, - .unlock =3D atmel_at25fs_unlock, - .is_locked =3D atmel_at25fs_is_locked, +static const struct spi_nor_locking_ops at25fs_locking_ops =3D { + .lock =3D at25fs_lock, + .unlock =3D at25fs_unlock, + .is_locked =3D at25fs_is_locked, }; =20 -static void atmel_at25fs_late_init(struct spi_nor *nor) +static void at25fs_late_init(struct spi_nor *nor) { - nor->params->locking_ops =3D &atmel_at25fs_locking_ops; + nor->params->locking_ops =3D &at25fs_locking_ops; } =20 -static const struct spi_nor_fixups atmel_at25fs_fixups =3D { - .late_init =3D atmel_at25fs_late_init, +static const struct spi_nor_fixups at25fs_fixups =3D { + .late_init =3D at25fs_late_init, }; =20 /** - * atmel_set_global_protection - Do a Global Protect or Unprotect command + * atmel_nor_set_global_protection - Do a Global Protect or Unprotect comm= and * @nor: pointer to 'struct spi_nor' * @ofs: offset in bytes * @len: len in bytes @@ -66,8 +66,8 @@ static const struct spi_nor_fixups atmel_at25fs_fixups = =3D { * * Return: 0 on success, -error otherwise. */ -static int atmel_set_global_protection(struct spi_nor *nor, loff_t ofs, - uint64_t len, bool is_protect) +static int atmel_nor_set_global_protection(struct spi_nor *nor, loff_t ofs, + uint64_t len, bool is_protect) { int ret; u8 sr; @@ -116,17 +116,20 @@ static int atmel_set_global_protection(struct spi_nor= *nor, loff_t ofs, return spi_nor_write_sr(nor, nor->bouncebuf, 1); } =20 -static int atmel_global_protect(struct spi_nor *nor, loff_t ofs, uint64_t = len) +static int atmel_nor_global_protect(struct spi_nor *nor, loff_t ofs, + uint64_t len) { - return atmel_set_global_protection(nor, ofs, len, true); + return atmel_nor_set_global_protection(nor, ofs, len, true); } =20 -static int atmel_global_unprotect(struct spi_nor *nor, loff_t ofs, uint64_= t len) +static int atmel_nor_global_unprotect(struct spi_nor *nor, loff_t ofs, + uint64_t len) { - return atmel_set_global_protection(nor, ofs, len, false); + return atmel_nor_set_global_protection(nor, ofs, len, false); } =20 -static int atmel_is_global_protected(struct spi_nor *nor, loff_t ofs, uint= 64_t len) +static int atmel_nor_is_global_protected(struct spi_nor *nor, loff_t ofs, + uint64_t len) { int ret; =20 @@ -140,47 +143,47 @@ static int atmel_is_global_protected(struct spi_nor *= nor, loff_t ofs, uint64_t l return ((nor->bouncebuf[0] & ATMEL_SR_GLOBAL_PROTECT_MASK) =3D=3D ATMEL_S= R_GLOBAL_PROTECT_MASK); } =20 -static const struct spi_nor_locking_ops atmel_global_protection_ops =3D { - .lock =3D atmel_global_protect, - .unlock =3D atmel_global_unprotect, - .is_locked =3D atmel_is_global_protected, +static const struct spi_nor_locking_ops atmel_nor_global_protection_ops = =3D { + .lock =3D atmel_nor_global_protect, + .unlock =3D atmel_nor_global_unprotect, + .is_locked =3D atmel_nor_is_global_protected, }; =20 -static void atmel_global_protection_late_init(struct spi_nor *nor) +static void atmel_nor_global_protection_late_init(struct spi_nor *nor) { - nor->params->locking_ops =3D &atmel_global_protection_ops; + nor->params->locking_ops =3D &atmel_nor_global_protection_ops; } =20 -static const struct spi_nor_fixups atmel_global_protection_fixups =3D { - .late_init =3D atmel_global_protection_late_init, +static const struct spi_nor_fixups atmel_nor_global_protection_fixups =3D { + .late_init =3D atmel_nor_global_protection_late_init, }; =20 -static const struct flash_info atmel_parts[] =3D { +static const struct flash_info atmel_nor_parts[] =3D { /* Atmel -- some are (confusingly) marketed as "DataFlash" */ { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4) FLAGS(SPI_NOR_HAS_LOCK) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_at25fs_fixups }, + .fixups =3D &at25fs_fixups }, { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8) FLAGS(SPI_NOR_HAS_LOCK) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_at25fs_fixups }, + .fixups =3D &at25fs_fixups }, { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at25df321", INFO(0x1f4700, 0, 64 * 1024, 64) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at25sl321", INFO(0x1f4216, 0, 64 * 1024, 64) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8) @@ -188,21 +191,21 @@ static const struct flash_info atmel_parts[] =3D { { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_global_protection_fixups }, + .fixups =3D &atmel_nor_global_protection_fixups }, { "at45db081d", INFO(0x1f2500, 0, 64 * 1024, 16) NO_SFDP_FLAGS(SECT_4K) }, }; =20 const struct spi_nor_manufacturer spi_nor_atmel =3D { .name =3D "atmel", - .parts =3D atmel_parts, - .nparts =3D ARRAY_SIZE(atmel_parts), + .parts =3D atmel_nor_parts, + .nparts =3D ARRAY_SIZE(atmel_nor_parts), }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36ED0C433EF for ; Fri, 18 Feb 2022 11:36:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234639AbiBRLgw (ORCPT ); Fri, 18 Feb 2022 06:36:52 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44064 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234559AbiBRLgh (ORCPT ); Fri, 18 Feb 2022 06:36:37 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D25802B0B38 for ; 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(unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 096EC223F0; Fri, 18 Feb 2022 12:36:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184175; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UD6+0Z6yibRsOdt8zn1BhQmKZUwO1fab/PtnzMpVPlk=; b=qlEhJUbrs65qllmKyx6mDETOJaPX+DBHXUK++Ig6cSbTKlWgbs3J4QhYou+sPHMdijHgWN syNvrjECpgE7frCMOR45mCrOFnYf/WqUTzjKhJMquzgFKAXhfw/Cgd2SKg9v432Qm/NWyu bsTBiQsawtEa3xp59T/URB4XjA0dkDg= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 02/32] mtd: spi-nor: catalyst: unify function names Date: Fri, 18 Feb 2022 12:35:37 +0100 Message-Id: <20220218113607.1360020-3-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/catalyst.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/catalyst.c b/drivers/mtd/spi-nor/catalyst.c index ae4d67e01bb3..6d310815fb12 100644 --- a/drivers/mtd/spi-nor/catalyst.c +++ b/drivers/mtd/spi-nor/catalyst.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info catalyst_parts[] =3D { +static const struct flash_info catalyst_nor_parts[] =3D { /* Catalyst / On Semiconductor -- non-JEDEC */ { "cat25c11", CAT25_INFO(16, 8, 16, 1) }, { "cat25c03", CAT25_INFO(32, 8, 16, 2) }, @@ -19,6 +19,6 @@ static const struct flash_info catalyst_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_catalyst =3D { .name =3D "catalyst", - .parts =3D catalyst_parts, - .nparts =3D ARRAY_SIZE(catalyst_parts), + .parts =3D catalyst_nor_parts, + .nparts =3D ARRAY_SIZE(catalyst_nor_parts), }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8029C433EF for ; Fri, 18 Feb 2022 11:36:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234629AbiBRLgt (ORCPT ); Fri, 18 Feb 2022 06:36:49 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44010 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234557AbiBRLgg (ORCPT ); Fri, 18 Feb 2022 06:36:36 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 116B42B100B for ; Fri, 18 Feb 2022 03:36:17 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 53A5B223F6; Fri, 18 Feb 2022 12:36:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184175; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=j0qxuzdGChpI6toeNp0CORmb0ksJAONj4ukyeKdZfs4=; b=gaNEhn5aiIkKF8+8oeHnMeekSPzWtFaw34npaQTDdOeXjWTmFbs5rafCK/wwq4GNgA/Vks C4GwKJRxBRX0O9fHJTHtGBqFRX7366j+dSjVLP0F/BIwd/6m0FygSW4/t1/9N2T6Pq+EY3 fVf2293AgBlYmFHI+JBXld1T3Z6KrOM= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 03/32] mtd: spi-nor: eon: unify function names Date: Fri, 18 Feb 2022 12:35:38 +0100 Message-Id: <20220218113607.1360020-4-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/eon.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/eon.c b/drivers/mtd/spi-nor/eon.c index 4f3ee6331f37..8c1c57530281 100644 --- a/drivers/mtd/spi-nor/eon.c +++ b/drivers/mtd/spi-nor/eon.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info eon_parts[] =3D { +static const struct flash_info eon_nor_parts[] =3D { /* EON -- en25xxx */ { "en25f32", INFO(0x1c3116, 0, 64 * 1024, 64) NO_SFDP_FLAGS(SECT_4K) }, @@ -32,6 +32,6 @@ static const struct flash_info eon_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_eon =3D { .name =3D "eon", - .parts =3D eon_parts, - .nparts =3D ARRAY_SIZE(eon_parts), + .parts =3D eon_nor_parts, + .nparts =3D ARRAY_SIZE(eon_nor_parts), }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 488C6C433F5 for ; Fri, 18 Feb 2022 11:36:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232138AbiBRLgz (ORCPT ); Fri, 18 Feb 2022 06:36:55 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234560AbiBRLgh (ORCPT ); Fri, 18 Feb 2022 06:36:37 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 538582B102C for ; Fri, 18 Feb 2022 03:36:17 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 8A6F1223F7; Fri, 18 Feb 2022 12:36:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184175; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mCboYF2SsSwR+fiVXOGx/OmbS97AWmo5FY5yos1xu8s=; b=lrZXtSwF7GPJIStf4kmx+wXh/pbisjkjkL0K9wBTjfUcXDblkeKvUCOw9D+GVUo0Qkpt6i G0xJ43KEp0fYUDEaQ5TUj0bJsRUb/gG66Y4Z4ApS4MPLWOE5UkMEkMG70mvDSQl8MG0hvP BF1m23Kr+dfiLYKB6K3VWWfpCuoqVTk= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 04/32] mtd: spi-nor: esmt: unify function names Date: Fri, 18 Feb 2022 12:35:39 +0100 Message-Id: <20220218113607.1360020-5-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/esmt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/esmt.c b/drivers/mtd/spi-nor/esmt.c index ace1da221566..79e2408f4998 100644 --- a/drivers/mtd/spi-nor/esmt.c +++ b/drivers/mtd/spi-nor/esmt.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info esmt_parts[] =3D { +static const struct flash_info esmt_nor_parts[] =3D { /* ESMT */ { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) @@ -23,6 +23,6 @@ static const struct flash_info esmt_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_esmt =3D { .name =3D "esmt", - .parts =3D esmt_parts, - .nparts =3D ARRAY_SIZE(esmt_parts), + .parts =3D esmt_nor_parts, + .nparts =3D ARRAY_SIZE(esmt_nor_parts), }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1565AC433EF for ; Fri, 18 Feb 2022 11:36:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234672AbiBRLhF (ORCPT ); Fri, 18 Feb 2022 06:37:05 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234572AbiBRLgk (ORCPT ); Fri, 18 Feb 2022 06:36:40 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2E302B167E for ; Fri, 18 Feb 2022 03:36:21 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id CACF82241C; Fri, 18 Feb 2022 12:36:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184175; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=b3SRCZp/aNw+4bqfY8YI6R1apw3mSO1+Icgsv0JWupc=; b=XJiEqr1ghuqlMXCPtUAZ3v68yW1DzMIH/aDQzfNo4fvx10AHa420+AMmX22YmlM3APU/Me J6gdI53QAaHdUGdfoM/M4skHxHcBxu8i3TCZnganrFWmhmp4bJ6rXiWREi3J8Siuy9XhGE 5WrwcjGFckMcUzZlcUpqZa+jXiQ0Yho= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 05/32] mtd: spi-nor: everspin: unify function names Date: Fri, 18 Feb 2022 12:35:40 +0100 Message-Id: <20220218113607.1360020-6-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/everspin.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/everspin.c b/drivers/mtd/spi-nor/everspin.c index f6c6fb36a428..84a07c2e0536 100644 --- a/drivers/mtd/spi-nor/everspin.c +++ b/drivers/mtd/spi-nor/everspin.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info everspin_parts[] =3D { +static const struct flash_info everspin_nor_parts[] =3D { /* Everspin */ { "mr25h128", CAT25_INFO(16 * 1024, 1, 256, 2) }, { "mr25h256", CAT25_INFO(32 * 1024, 1, 256, 2) }, @@ -18,6 +18,6 @@ static const struct flash_info everspin_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_everspin =3D { .name =3D "everspin", - .parts =3D everspin_parts, - .nparts =3D ARRAY_SIZE(everspin_parts), + .parts =3D everspin_nor_parts, + .nparts =3D ARRAY_SIZE(everspin_nor_parts), }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D429FC433EF for ; Fri, 18 Feb 2022 11:36:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234670AbiBRLhA (ORCPT ); Fri, 18 Feb 2022 06:37:00 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234564AbiBRLgi (ORCPT ); Fri, 18 Feb 2022 06:36:38 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9AEC22B1662 for ; Fri, 18 Feb 2022 03:36:21 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 1CD6822438; Fri, 18 Feb 2022 12:36:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184176; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dtG66nP664HjdKC0+87lNjjaUhGXO0bMlmKnlKGD5d0=; b=GMd3bir1YRH6VWLE9FpodmsL22ZQtAUK/r4tep2ko9iZGLRJgFO+B7IcdhTMEjL9+n/e5K 6KMV5AjTOXovy/D2mNdViy+WE6z2uQlJ5Ca4+iB3GmZW97XEgWdLb0cQslpZQrGi+5gIKr xq03KG5EZd1aH5pOt0R2x/v3wu7ymWE= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 06/32] mtd: spi-nor: fujitsu: unify function names Date: Fri, 18 Feb 2022 12:35:41 +0100 Message-Id: <20220218113607.1360020-7-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/fujitsu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/fujitsu.c b/drivers/mtd/spi-nor/fujitsu.c index 5fa8f04f2e35..69cffc5c73ef 100644 --- a/drivers/mtd/spi-nor/fujitsu.c +++ b/drivers/mtd/spi-nor/fujitsu.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info fujitsu_parts[] =3D { +static const struct flash_info fujitsu_nor_parts[] =3D { /* Fujitsu */ { "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1) FLAGS(SPI_NOR_NO_ERASE) }, @@ -16,6 +16,6 @@ static const struct flash_info fujitsu_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_fujitsu =3D { .name =3D "fujitsu", - .parts =3D fujitsu_parts, - .nparts =3D ARRAY_SIZE(fujitsu_parts), + .parts =3D fujitsu_nor_parts, + .nparts =3D ARRAY_SIZE(fujitsu_nor_parts), }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75FCFC433EF for ; Fri, 18 Feb 2022 11:37:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234361AbiBRLhP (ORCPT ); Fri, 18 Feb 2022 06:37:15 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44178 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234570AbiBRLgk (ORCPT ); Fri, 18 Feb 2022 06:36:40 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 236572B1A91 for ; Fri, 18 Feb 2022 03:36:21 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 65E7222441; Fri, 18 Feb 2022 12:36:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184176; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vRIfoFnqXVSGsc4QPzE+R/oup9/PmIzQc5ULgCA1XSY=; b=GESDjJ7k7Yasa2e3JxZUiwjfrHdqThuKaC0Ls1TL8PS+XAaipRV2sHF9PkmFqmtbGIBS3G xAn1WC046IJNdkDO2gR4yKmrQrT51iIFRCbZCmBEp/9m50NvqqJbXnTpta/bFJdPq+DrKy PphDUYZqpt3UDtC0fnSdpK6P+1HcYlE= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 07/32] mtd: spi-nor: gigadevice: unify function names Date: Fri, 18 Feb 2022 12:35:42 +0100 Message-Id: <20220218113607.1360020-8-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/gigadevice.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadev= ice.c index 0807d0263808..119b38e6fc2a 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -23,7 +23,7 @@ static const struct spi_nor_fixups gd25q256_fixups =3D { .default_init =3D gd25q256_default_init, }; =20 -static const struct flash_info gigadevice_parts[] =3D { +static const struct flash_info gigadevice_nor_parts[] =3D { { "gd25q16", INFO(0xc84015, 0, 64 * 1024, 32) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | @@ -61,6 +61,6 @@ static const struct flash_info gigadevice_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_gigadevice =3D { .name =3D "gigadevice", - .parts =3D gigadevice_parts, - .nparts =3D ARRAY_SIZE(gigadevice_parts), + .parts =3D gigadevice_nor_parts, + .nparts =3D ARRAY_SIZE(gigadevice_nor_parts), }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16699C433EF for ; Fri, 18 Feb 2022 11:37:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233577AbiBRLhR (ORCPT ); Fri, 18 Feb 2022 06:37:17 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44278 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234577AbiBRLgk (ORCPT ); Fri, 18 Feb 2022 06:36:40 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2373A2B1A92 for ; Fri, 18 Feb 2022 03:36:21 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 9EB512244E; Fri, 18 Feb 2022 12:36:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184176; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DvTwO/d5q8PM9u/lLrOXBuccah4W7HSyVD2GJr3f7lQ=; b=XDl6lxtCVyKnGj0DTdsfpAhoPHFTbnDLHXb/ynWzXKIkSWq+8gJWybASJTjLJmhypzwBm3 8skDhTEqYzewTR/5Rh56oyVOsKeQbBGnGnJdJZgqeojo0WV3Gvrj278803aCZNgDRRHINL i8+yj3455Xz2ptTV6KpxQwsbIC6d8kQ= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 08/32] mtd: spi-nor: intel: unify function names Date: Fri, 18 Feb 2022 12:35:43 +0100 Message-Id: <20220218113607.1360020-9-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/intel.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/intel.c b/drivers/mtd/spi-nor/intel.c index d64e114e9fb4..9179f2d09cba 100644 --- a/drivers/mtd/spi-nor/intel.c +++ b/drivers/mtd/spi-nor/intel.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info intel_parts[] =3D { +static const struct flash_info intel_nor_parts[] =3D { /* Intel/Numonyx -- xxxs33b */ { "160s33b", INFO(0x898911, 0, 64 * 1024, 32) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, @@ -20,6 +20,6 @@ static const struct flash_info intel_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_intel =3D { .name =3D "intel", - .parts =3D intel_parts, - .nparts =3D ARRAY_SIZE(intel_parts), + .parts =3D intel_nor_parts, + .nparts =3D ARRAY_SIZE(intel_nor_parts), }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2392EC433EF for ; Fri, 18 Feb 2022 11:36:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234152AbiBRLhL (ORCPT ); Fri, 18 Feb 2022 06:37:11 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44212 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234573AbiBRLgk (ORCPT ); Fri, 18 Feb 2022 06:36:40 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 236072B1A82 for ; Fri, 18 Feb 2022 03:36:21 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id DFFF62244F; Fri, 18 Feb 2022 12:36:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184177; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=usr8xYhL0OkkvyVpz03FFLuCa1SjXG6k7g15Vf3dWH4=; b=XTYzoJHBLBXKEqd2f9usCrt/CVFuMS+TmnVSE36vh1EtEs27NDKzWxrwleBwHPoDiWCV8j 4PHO0kk3jwR/lQVF3TW76g8aKAkuerejObuC7oH8SsEmNeZvVi2viHEImeAm3zR+uieCwq t7F/C+zApEMUwd3ywTuNZEd1LEkCrJ0= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 09/32] mtd: spi-nor: issi: unify function names Date: Fri, 18 Feb 2022 12:35:44 +0100 Message-Id: <20220218113607.1360020-10-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/issi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index 23629b919ade..c012bc2486e1 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -29,7 +29,7 @@ static const struct spi_nor_fixups is25lp256_fixups =3D { .post_bfpt =3D is25lp256_post_bfpt_fixups, }; =20 -static const struct flash_info issi_parts[] =3D { +static const struct flash_info issi_nor_parts[] =3D { /* ISSI */ { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2) NO_SFDP_FLAGS(SECT_4K) }, @@ -69,18 +69,18 @@ static const struct flash_info issi_parts[] =3D { NO_SFDP_FLAGS(SECT_4K) }, }; =20 -static void issi_default_init(struct spi_nor *nor) +static void issi_nor_default_init(struct spi_nor *nor) { nor->params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; } =20 static const struct spi_nor_fixups issi_fixups =3D { - .default_init =3D issi_default_init, + .default_init =3D issi_nor_default_init, }; =20 const struct spi_nor_manufacturer spi_nor_issi =3D { .name =3D "issi", - .parts =3D issi_parts, - .nparts =3D ARRAY_SIZE(issi_parts), + .parts =3D issi_nor_parts, + .nparts =3D ARRAY_SIZE(issi_nor_parts), .fixups =3D &issi_fixups, }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C343C433EF for ; Fri, 18 Feb 2022 11:37:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234733AbiBRLhU (ORCPT ); Fri, 18 Feb 2022 06:37:20 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234574AbiBRLgk (ORCPT ); Fri, 18 Feb 2022 06:36:40 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 238D42B1A95 for ; Fri, 18 Feb 2022 03:36:22 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 2338E22450; Fri, 18 Feb 2022 12:36:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184177; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7MTuzFpCvHrYsDEsSy+Lrt3U2XF9QJpNBVrsBXeBWII=; b=Ux2ShD0Vt0l2V7Ay4nNe3a8VrhpqY8kLv6O9ZhcbGILSDcP9f9EATTG0k/wdXw7h06/HeQ dh9qY2g6nQeDgk7Ekd+92oAglnNgcK2aINo1YnxdTgylKYIoU2Jj1aLhLggaFaCarzYd8Z 89NO7AELgyteQV+5UB64PxzxkLLfT+o= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 10/32] mtd: spi-nor: macronix: unify function names Date: Fri, 18 Feb 2022 12:35:45 +0100 Message-Id: <20220218113607.1360020-11-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/macronix.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 97dba1ae7fb1..d81a4cb2812b 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -32,7 +32,7 @@ static const struct spi_nor_fixups mx25l25635_fixups =3D { .post_bfpt =3D mx25l25635_post_bfpt_fixups, }; =20 -static const struct flash_info macronix_parts[] =3D { +static const struct flash_info macronix_nor_parts[] =3D { /* Macronix */ { "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1) NO_SFDP_FLAGS(SECT_4K) }, @@ -102,19 +102,19 @@ static const struct flash_info macronix_parts[] =3D { FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, }; =20 -static void macronix_default_init(struct spi_nor *nor) +static void macronix_nor_default_init(struct spi_nor *nor) { nor->params->quad_enable =3D spi_nor_sr1_bit6_quad_enable; nor->params->set_4byte_addr_mode =3D spi_nor_set_4byte_addr_mode; } =20 -static const struct spi_nor_fixups macronix_fixups =3D { - .default_init =3D macronix_default_init, +static const struct spi_nor_fixups macronix_nor_fixups =3D { + .default_init =3D macronix_nor_default_init, }; =20 const struct spi_nor_manufacturer spi_nor_macronix =3D { .name =3D "macronix", - .parts =3D macronix_parts, - .nparts =3D ARRAY_SIZE(macronix_parts), - .fixups =3D ¯onix_fixups, + .parts =3D macronix_nor_parts, + .nparts =3D ARRAY_SIZE(macronix_nor_parts), + .fixups =3D ¯onix_nor_fixups, }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F170CC433F5 for ; Fri, 18 Feb 2022 11:37:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234661AbiBRLhg (ORCPT ); Fri, 18 Feb 2022 06:37:36 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44178 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234581AbiBRLgk (ORCPT ); Fri, 18 Feb 2022 06:36:40 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72B842B0B37 for ; Fri, 18 Feb 2022 03:36:23 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 6869922452; Fri, 18 Feb 2022 12:36:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184177; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CyQD7v0TOOw56IqLXg5ckuhKii03Kxz51MOI5ERrL9I=; b=uhET8Im/cU5TRTYOhwQn/pH5tIdDmFpNDpP7LUa4AoCQ2fj6m4+jq14Nagoa64OMYGvlL9 hfCUxZtdbWYeFKgs/hMZ5x0mkdj8tlGRMz4WyPsxZixw/sPQF/Sb7xWStyjHcwfIlgy/6Q I7iCC+lE17bjcMV9mvYjfgOmMoqT2u8= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 11/32] mtd: spi-nor: micron-st: unify function names Date: Fri, 18 Feb 2022 12:35:46 +0100 Message-Id: <20220218113607.1360020-12-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/micron-st.c | 34 ++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index bb95b1aabf74..7a68f2ad3ea1 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -17,7 +17,7 @@ #define SPINOR_MT_OCT_DTR 0xe7 /* Enable Octal DTR. */ #define SPINOR_MT_EXSPI 0xff /* Enable Extended SPI (default) */ =20 -static int spi_nor_micron_octal_dtr_enable(struct spi_nor *nor, bool enabl= e) +static int micron_st_nor_octal_dtr_enable(struct spi_nor *nor, bool enable) { struct spi_mem_op op; u8 *buf =3D nor->bouncebuf; @@ -102,7 +102,7 @@ static int spi_nor_micron_octal_dtr_enable(struct spi_n= or *nor, bool enable) =20 static void mt35xu512aba_default_init(struct spi_nor *nor) { - nor->params->octal_dtr_enable =3D spi_nor_micron_octal_dtr_enable; + nor->params->octal_dtr_enable =3D micron_st_nor_octal_dtr_enable; } =20 static void mt35xu512aba_post_sfdp_fixup(struct spi_nor *nor) @@ -130,7 +130,7 @@ static const struct spi_nor_fixups mt35xu512aba_fixups = =3D { .post_sfdp =3D mt35xu512aba_post_sfdp_fixup, }; =20 -static const struct flash_info micron_parts[] =3D { +static const struct flash_info micron_nor_parts[] =3D { { "mt35xu512aba", INFO(0x2c5b1a, 0, 128 * 1024, 512) FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_OCTAL_READ | @@ -143,7 +143,7 @@ static const struct flash_info micron_parts[] =3D { FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, }; =20 -static const struct flash_info st_parts[] =3D { +static const struct flash_info st_nor_parts[] =3D { { "n25q016a", INFO(0x20bb15, 0, 64 * 1024, 32) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, { "n25q032", INFO(0x20ba16, 0, 64 * 1024, 64) @@ -250,15 +250,15 @@ static const struct flash_info st_parts[] =3D { }; =20 /** - * st_micron_set_4byte_addr_mode() - Set 4-byte address mode for ST and Mi= cron - * flashes. + * micron_st_nor_set_4byte_addr_mode() - Set 4-byte address mode for ST and + * Micron flashes. * @nor: pointer to 'struct spi_nor'. * @enable: true to enter the 4-byte address mode, false to exit the 4-byte * address mode. * * Return: 0 on success, -errno otherwise. */ -static int st_micron_set_4byte_addr_mode(struct spi_nor *nor, bool enable) +static int micron_st_nor_set_4byte_addr_mode(struct spi_nor *nor, bool ena= ble) { int ret; =20 @@ -273,28 +273,28 @@ static int st_micron_set_4byte_addr_mode(struct spi_n= or *nor, bool enable) return spi_nor_write_disable(nor); } =20 -static void micron_st_default_init(struct spi_nor *nor) +static void micron_st_nor_default_init(struct spi_nor *nor) { nor->flags |=3D SNOR_F_HAS_LOCK; nor->flags &=3D ~SNOR_F_HAS_16BIT_SR; nor->params->quad_enable =3D NULL; - nor->params->set_4byte_addr_mode =3D st_micron_set_4byte_addr_mode; + nor->params->set_4byte_addr_mode =3D micron_st_nor_set_4byte_addr_mode; } =20 -static const struct spi_nor_fixups micron_st_fixups =3D { - .default_init =3D micron_st_default_init, +static const struct spi_nor_fixups micron_st_nor_fixups =3D { + .default_init =3D micron_st_nor_default_init, }; =20 const struct spi_nor_manufacturer spi_nor_micron =3D { .name =3D "micron", - .parts =3D micron_parts, - .nparts =3D ARRAY_SIZE(micron_parts), - .fixups =3D µn_st_fixups, + .parts =3D micron_nor_parts, + .nparts =3D ARRAY_SIZE(micron_nor_parts), + .fixups =3D µn_st_nor_fixups, }; =20 const struct spi_nor_manufacturer spi_nor_st =3D { .name =3D "st", - .parts =3D st_parts, - .nparts =3D ARRAY_SIZE(st_parts), - .fixups =3D µn_st_fixups, + .parts =3D st_nor_parts, + .nparts =3D ARRAY_SIZE(st_nor_parts), + .fixups =3D µn_st_nor_fixups, }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66143C433EF for ; Fri, 18 Feb 2022 11:37:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234560AbiBRLhc (ORCPT ); Fri, 18 Feb 2022 06:37:32 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234563AbiBRLgk (ORCPT ); Fri, 18 Feb 2022 06:36:40 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72AAC2B0B09 for ; Fri, 18 Feb 2022 03:36:23 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id CDF4022453; Fri, 18 Feb 2022 12:36:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184177; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=e5GfVMbBGWmdvXhXIoW+ggWd1G9vkp3A24ZAKD/FfOY=; b=STLkdrZwqV4ycL94P2bDWqeV/e8uQfyZ/vlcjqTYXR3mMh1TR+KzMzx2E7ydoBjWrJFDLU r73PV/KrpV6uyzPeWQHM61jFECRCYeLhX2GxNJHrJhm+BMbLXpKL9KTII5dcNhJ1S9WNI8 K413aWqOGGIjuWAn9/tsi7iRExHEWd0= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 12/32] mtd: spi-nor: spansion: unify function names Date: Fri, 18 Feb 2022 12:35:47 +0100 Message-Id: <20220218113607.1360020-13-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/spansion.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 534196b1d3e7..c57ee085e1ba 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -20,7 +20,7 @@ #define SPINOR_OP_CYPRESS_RD_FAST 0xee =20 /** - * spi_nor_cypress_octal_dtr_enable() - Enable octal DTR on Cypress flashe= s. + * cypress_nor_octal_dtr_enable() - Enable octal DTR on Cypress flashes. * @nor: pointer to a 'struct spi_nor' * @enable: whether to enable or disable Octal DTR * @@ -29,7 +29,7 @@ * * Return: 0 on success, -errno otherwise. */ -static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enab= le) +static int cypress_nor_octal_dtr_enable(struct spi_nor *nor, bool enable) { struct spi_mem_op op; u8 *buf =3D nor->bouncebuf; @@ -116,7 +116,7 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_= nor *nor, bool enable) =20 static void s28hs512t_default_init(struct spi_nor *nor) { - nor->params->octal_dtr_enable =3D spi_nor_cypress_octal_dtr_enable; + nor->params->octal_dtr_enable =3D cypress_nor_octal_dtr_enable; nor->params->writesize =3D 16; } =20 @@ -202,7 +202,7 @@ static const struct spi_nor_fixups s25fs_s_fixups =3D { .post_bfpt =3D s25fs_s_post_bfpt_fixups, }; =20 -static const struct flash_info spansion_parts[] =3D { +static const struct flash_info spansion_nor_parts[] =3D { /* Spansion/Cypress -- single (large) sector size only, at least * for the chips listed here (without boot sectors). */ @@ -294,7 +294,7 @@ static const struct flash_info spansion_parts[] =3D { }, }; =20 -static void spansion_late_init(struct spi_nor *nor) +static void spansion_nor_late_init(struct spi_nor *nor) { if (nor->params->size <=3D SZ_16M) return; @@ -305,13 +305,13 @@ static void spansion_late_init(struct spi_nor *nor) nor->mtd.erasesize =3D nor->info->sector_size; } =20 -static const struct spi_nor_fixups spansion_fixups =3D { - .late_init =3D spansion_late_init, +static const struct spi_nor_fixups spansion_nor_fixups =3D { + .late_init =3D spansion_nor_late_init, }; =20 const struct spi_nor_manufacturer spi_nor_spansion =3D { .name =3D "spansion", - .parts =3D spansion_parts, - .nparts =3D ARRAY_SIZE(spansion_parts), - .fixups =3D &spansion_fixups, + .parts =3D spansion_nor_parts, + .nparts =3D ARRAY_SIZE(spansion_nor_parts), + .fixups =3D &spansion_nor_fixups, }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30524C433F5 for ; Fri, 18 Feb 2022 11:37:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234693AbiBRLhV (ORCPT ); Fri, 18 Feb 2022 06:37:21 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44304 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234580AbiBRLgk (ORCPT ); Fri, 18 Feb 2022 06:36:40 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72294389A for ; Fri, 18 Feb 2022 03:36:23 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 26C3022455; Fri, 18 Feb 2022 12:36:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184178; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mAAklKio0JJkGw53kWM7gFAN8lZmsvKpPSFctQzn+dA=; b=Q4wG2obFYxqxCm2/+QCY4HDCh4BIZEenfqLIlVwzlJj6Q70JWuwNmt3ezO3La3Qzctz0s2 CCQWVkH0cs60B3YHaOU7nHZfSqcn9kixKlSOe1taVJYI2XKbQQKtJozcPR4w4uwLSGx/IP VJ2oAqKOju2k1vga/ufkt9er2LlSkuI= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 13/32] mtd: spi-nor: sst: unify function names Date: Fri, 18 Feb 2022 12:35:48 +0100 Message-Id: <20220218113607.1360020-14-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/sst.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index 30183e9189b9..45d277d62584 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -58,7 +58,7 @@ static const struct spi_nor_fixups sst26vf_fixups =3D { .late_init =3D sst26vf_late_init, }; =20 -static const struct flash_info sst_parts[] =3D { +static const struct flash_info sst_nor_parts[] =3D { /* SST -- large erase sizes are "overlays", "sectors" are 4K */ { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) @@ -117,8 +117,8 @@ static const struct flash_info sst_parts[] =3D { .fixups =3D &sst26vf_fixups }, }; =20 -static int sst_write(struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, const u_char *buf) +static int sst_nor_write(struct mtd_info *mtd, loff_t to, size_t len, + size_t *retlen, const u_char *buf) { struct spi_nor *nor =3D mtd_to_spi_nor(mtd); size_t actual =3D 0; @@ -203,19 +203,19 @@ static int sst_write(struct mtd_info *mtd, loff_t to,= size_t len, return ret; } =20 -static void sst_late_init(struct spi_nor *nor) +static void sst_nor_late_init(struct spi_nor *nor) { if (nor->info->mfr_flags & SST_WRITE) - nor->mtd._write =3D sst_write; + nor->mtd._write =3D sst_nor_write; } =20 -static const struct spi_nor_fixups sst_fixups =3D { - .late_init =3D sst_late_init, +static const struct spi_nor_fixups sst_nor_fixups =3D { + .late_init =3D sst_nor_late_init, }; =20 const struct spi_nor_manufacturer spi_nor_sst =3D { .name =3D "sst", - .parts =3D sst_parts, - .nparts =3D ARRAY_SIZE(sst_parts), - .fixups =3D &sst_fixups, + .parts =3D sst_nor_parts, + .nparts =3D ARRAY_SIZE(sst_nor_parts), + .fixups =3D &sst_nor_fixups, }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB12BC433EF for ; Fri, 18 Feb 2022 11:37:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234751AbiBRLhZ (ORCPT ); Fri, 18 Feb 2022 06:37:25 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234582AbiBRLgk (ORCPT ); Fri, 18 Feb 2022 06:36:40 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72CD12B3541 for ; Fri, 18 Feb 2022 03:36:23 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 69D7022456; Fri, 18 Feb 2022 12:36:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184178; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Wwdz4ZqLZzwMbbOuFl8qfVobOJC0DCzhISRyc0ex6gI=; b=E/qT1sWAIUfmRcLrru+mcYRGgbpFE8Fj4IuLQtL/nx9rqQPFM+RWKrVaJWR3xEieEqVMd6 9LAL8O+hC8gtcpTIGPikxo7ygxxQUt+AoIe5MA4o7Y1S/LF+UU7moEB7xvzQURVpsOwiMd eciY9/atDQlkEFLrNdd9kl5Z1B/bICo= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 14/32] mtd: spi-nor: winbond: unify function names Date: Fri, 18 Feb 2022 12:35:49 +0100 Message-Id: <20220218113607.1360020-15-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle Reported-by: kernel test robot --- drivers/mtd/spi-nor/winbond.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 3d91888882e4..8314266c2fec 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -32,7 +32,7 @@ static const struct spi_nor_fixups w25q256_fixups =3D { .post_bfpt =3D w25q256_post_bfpt_fixups, }; =20 -static const struct flash_info winbond_parts[] =3D { +static const struct flash_info winbond_nor_parts[] =3D { /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ { "w25x05", INFO(0xef3010, 0, 64 * 1024, 1) NO_SFDP_FLAGS(SECT_4K) }, @@ -138,7 +138,7 @@ static const struct flash_info winbond_parts[] =3D { * * Return: 0 on success, -errno otherwise. */ -static int winbond_set_4byte_addr_mode(struct spi_nor *nor, bool enable) +static int winbond_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enabl= e) { int ret; =20 @@ -162,7 +162,7 @@ static int winbond_set_4byte_addr_mode(struct spi_nor *= nor, bool enable) return spi_nor_write_disable(nor); } =20 -static const struct spi_nor_otp_ops winbond_otp_ops =3D { +static const struct spi_nor_otp_ops winbond_nor_otp_ops =3D { .read =3D spi_nor_otp_read_secr, .write =3D spi_nor_otp_write_secr, .erase =3D spi_nor_otp_erase_secr, @@ -170,25 +170,25 @@ static const struct spi_nor_otp_ops winbond_otp_ops = =3D { .is_locked =3D spi_nor_otp_is_locked_sr2, }; =20 -static void winbond_default_init(struct spi_nor *nor) +static void winbond_nor_default_init(struct spi_nor *nor) { - nor->params->set_4byte_addr_mode =3D winbond_set_4byte_addr_mode; + nor->params->set_4byte_addr_mode =3D winbond_nor_set_4byte_addr_mode; } =20 -static void winbond_late_init(struct spi_nor *nor) +static void winbond_nor_late_init(struct spi_nor *nor) { if (nor->params->otp.org->n_regions) - nor->params->otp.ops =3D &winbond_otp_ops; + nor->params->otp.ops =3D &winbond_nor_otp_ops; } =20 -static const struct spi_nor_fixups winbond_fixups =3D { - .default_init =3D winbond_default_init, - .late_init =3D winbond_late_init, +static const struct spi_nor_fixups winbond_nor_fixups =3D { + .default_init =3D winbond_nor_default_init, + .late_init =3D winbond_nor_late_init, }; =20 const struct spi_nor_manufacturer spi_nor_winbond =3D { .name =3D "winbond", - .parts =3D winbond_parts, - .nparts =3D ARRAY_SIZE(winbond_parts), - .fixups =3D &winbond_fixups, + .parts =3D winbond_nor_parts, + .nparts =3D ARRAY_SIZE(winbond_nor_parts), + .fixups =3D &winbond_nor_fixups, }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37F22C433F5 for ; Fri, 18 Feb 2022 11:37:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234814AbiBRLhp (ORCPT ); Fri, 18 Feb 2022 06:37:45 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234562AbiBRLgl (ORCPT ); Fri, 18 Feb 2022 06:36:41 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C9BA82B404A for ; Fri, 18 Feb 2022 03:36:23 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id B1BD92245A; Fri, 18 Feb 2022 12:36:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184178; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cY/ubQNSRnKpIjV+ZU1mBaI6kn7JLs7xpJYX2NPaQ14=; b=EDMP+B6kLIA6o3qzkaAv8TKo21QrGPpWDz/fd+73647aOBaYe50W84cGFesHPplzPFqBTN jO+OqwrhnztlN1qK9Vy7ej+MbnCie5GTnzs/ecsVWd0d6DhUYWRKucQqrr6tfjAhlptlCi GIk24bn+teNrLrc4rpgtDI90DEKQ8k8= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 15/32] mtd: spi-nor: xilinx: unify function names Date: Fri, 18 Feb 2022 12:35:50 +0100 Message-Id: <20220218113607.1360020-16-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/xilinx.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 580562bc1e45..42ecdc6fc625 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info xilinx_parts[] =3D { +static const struct flash_info xilinx_nor_parts[] =3D { /* Xilinx S3AN Internal Flash */ { "3S50AN", S3AN_INFO(0x1f2200, 64, 264) }, { "3S200AN", S3AN_INFO(0x1f2400, 256, 264) }, @@ -80,18 +80,18 @@ static int xilinx_nor_setup(struct spi_nor *nor, return 0; } =20 -static void xilinx_late_init(struct spi_nor *nor) +static void xilinx_nor_late_init(struct spi_nor *nor) { nor->params->setup =3D xilinx_nor_setup; } =20 -static const struct spi_nor_fixups xilinx_fixups =3D { - .late_init =3D xilinx_late_init, +static const struct spi_nor_fixups xilinx_nor_fixups =3D { + .late_init =3D xilinx_nor_late_init, }; =20 const struct spi_nor_manufacturer spi_nor_xilinx =3D { .name =3D "xilinx", - .parts =3D xilinx_parts, - .nparts =3D ARRAY_SIZE(xilinx_parts), - .fixups =3D &xilinx_fixups, + .parts =3D xilinx_nor_parts, + .nparts =3D ARRAY_SIZE(xilinx_nor_parts), + .fixups =3D &xilinx_nor_fixups, }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF45EC433F5 for ; Fri, 18 Feb 2022 11:37:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234622AbiBRLhm (ORCPT ); Fri, 18 Feb 2022 06:37:42 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44456 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234585AbiBRLgm (ORCPT ); Fri, 18 Feb 2022 06:36:42 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E5C782B0B38 for ; Fri, 18 Feb 2022 03:36:23 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 3AD822245C; Fri, 18 Feb 2022 12:36:19 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184179; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/nRIForTo2KQPxd/AMOdX/ky4GDtYbolPskG8tcKSBY=; b=N5bD1JrYy18L4GsPMn13XuZjxttiF1LXN0Q/F1n9P8lcrgnYz9hbPgO/gND7TA+3HeC8Sw 3LvKtjogVXa1G/dtorFAYfllVg89n4xtHV3HLRdQqp2CxkCnUO+dFesjQbcR71ELGZ1xbl 6UcB9XOCOCem6NUSZDqmHbWO+Jm0+WU= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 16/32] mtd: spi-nor: xmc: unify function names Date: Fri, 18 Feb 2022 12:35:51 +0100 Message-Id: <20220218113607.1360020-17-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To avoid name clashes unify all the function and static object names and use one of the following prefixes which should be sufficiently unique: - _nor_ - _ - _ There are no functional changes. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/xmc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/xmc.c b/drivers/mtd/spi-nor/xmc.c index 2992af03cb0a..051411e86339 100644 --- a/drivers/mtd/spi-nor/xmc.c +++ b/drivers/mtd/spi-nor/xmc.c @@ -8,7 +8,7 @@ =20 #include "core.h" =20 -static const struct flash_info xmc_parts[] =3D { +static const struct flash_info xmc_nor_parts[] =3D { /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ { "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | @@ -20,6 +20,6 @@ static const struct flash_info xmc_parts[] =3D { =20 const struct spi_nor_manufacturer spi_nor_xmc =3D { .name =3D "xmc", - .parts =3D xmc_parts, - .nparts =3D ARRAY_SIZE(xmc_parts), + .parts =3D xmc_nor_parts, + .nparts =3D ARRAY_SIZE(xmc_nor_parts), }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9991EC433F5 for ; Fri, 18 Feb 2022 11:38:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234161AbiBRLib (ORCPT ); Fri, 18 Feb 2022 06:38:31 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44610 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234604AbiBRLgp (ORCPT ); Fri, 18 Feb 2022 06:36:45 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2FEE32B1A82 for ; Fri, 18 Feb 2022 03:36:24 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id A336F22464; Fri, 18 Feb 2022 12:36:19 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184179; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FPwyUqw9bIye7MTeMw3+l2+GgFM/jhis7VAg9kKcJLA=; b=NdIFY1SGhV7/QHm0YYYlEYKStd9HQqm5kPFHGSqFeHrHITc1FJbs36XKePRZFgz7/N0b0W y4jsjfaahFhT7QeEeVNEc25YzWt/s0IYNqjThwRAD9LczXh/LMPQgEW4sBLttwp1uNgq7v lKv+esYpPk9oUsP5l+yb3PkJTTq2GMI= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 17/32] mtd: spi-nor: slightly refactor the spi_nor_setup() Date: Fri, 18 Feb 2022 12:35:52 +0100 Message-Id: <20220218113607.1360020-18-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Instead of always using a function pointer (and initializing it to our default), just call the default function if the flash didn't set its own one. That will make the call flow easier to follow. Also mark the parameter as optional now. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 10 +++++----- drivers/mtd/spi-nor/core.h | 8 ++++---- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 04ea180118e3..4d2036cdce42 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2532,11 +2532,12 @@ static int spi_nor_setup(struct spi_nor *nor, { int ret; =20 - if (nor->params->setup) { + if (nor->params->setup) ret =3D nor->params->setup(nor, hwcaps); - if (ret) - return ret; - } + else + ret =3D spi_nor_default_setup(nor, hwcaps); + if (ret) + return ret; =20 return spi_nor_set_addr_width(nor); } @@ -2786,7 +2787,6 @@ static void spi_nor_init_default_params(struct spi_no= r *nor) =20 params->quad_enable =3D spi_nor_sr2_bit1_quad_enable; params->set_4byte_addr_mode =3D spansion_set_4byte_addr_mode; - params->setup =3D spi_nor_default_setup; params->otp.org =3D &info->otp_org; =20 /* Default to 16-bit Write Status (01h) Command */ diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 2afb610853a9..4fe16b5aa3f5 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -257,10 +257,10 @@ struct spi_nor_otp { * @convert_addr: converts an absolute address into something the flash * will understand. Particularly useful when pagesize= is * not a power-of-2. - * @setup: configures the SPI NOR memory. Useful for SPI NOR - * flashes that have peculiarities to the SPI NOR sta= ndard - * e.g. different opcodes, specific address calculati= on, - * page size, etc. + * @setup: (optional) configures the SPI NOR memory. Useful for + * SPI NOR flashes that have peculiarities to the SPI NOR + * standard e.g. different opcodes, specific address + * calculation, page size, etc. * @locking_ops: SPI NOR locking methods. */ struct spi_nor_flash_parameter { --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62108C433EF for ; Fri, 18 Feb 2022 11:38:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234812AbiBRLiX (ORCPT ); Fri, 18 Feb 2022 06:38:23 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234601AbiBRLgp (ORCPT ); Fri, 18 Feb 2022 06:36:45 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A4A22B167E for ; Fri, 18 Feb 2022 03:36:24 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 2618822487; Fri, 18 Feb 2022 12:36:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184180; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hXOPL5cPITB5pX8C9uT9seIIQT64+6BMqwNdfPuDNQU=; b=vQIL3TFBgAUQ1mTY1NpPnE1LshWtHA/3VSe6zJKjA+kATSUtxTCE6i3y37k91WfZNicyoY 9dsmt/KaXcKancfpLWu9FmGrsPb0AnWKPC4F6ErIuJwSHSinP4NFBvvjX7kIZKAvcTBA/K znOQdED8bQdIUZDxBA4MS3s4GfGod7M= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 18/32] mtd: spi-nor: allow a flash to define its own ready() function Date: Fri, 18 Feb 2022 12:35:53 +0100 Message-Id: <20220218113607.1360020-19-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Xilinx and Micron flashes have their own implementation of the spi_nor_ready() function. At the moment, the core will figure out which one to call according to some flags. Lay the foundation to make it possible that a flash can register its own ready() function. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 4 ++++ drivers/mtd/spi-nor/core.h | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 4d2036cdce42..390a9ab413b7 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -794,6 +794,10 @@ static int spi_nor_ready(struct spi_nor *nor) { int sr, fsr; =20 + /* Flashes might override the standard routine. */ + if (nor->params->ready) + return nor->params->ready(nor); + if (nor->flags & SNOR_F_READY_XSR_RDY) sr =3D spi_nor_xsr_ready(nor); else diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 4fe16b5aa3f5..fdc8c0f31f5c 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -261,6 +261,9 @@ struct spi_nor_otp { * SPI NOR flashes that have peculiarities to the SPI NOR * standard e.g. different opcodes, specific address * calculation, page size, etc. + * @ready: (optional) flashes might use a different mechanism + * than reading the status register to indicate they + * are ready for a new command * @locking_ops: SPI NOR locking methods. */ struct spi_nor_flash_parameter { @@ -282,6 +285,7 @@ struct spi_nor_flash_parameter { int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable); u32 (*convert_addr)(struct spi_nor *nor, u32 addr); int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps); + int (*ready)(struct spi_nor *nor); =20 const struct spi_nor_locking_ops *locking_ops; }; --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4FD3CC433EF for ; Fri, 18 Feb 2022 11:37:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234289AbiBRLh7 (ORCPT ); Fri, 18 Feb 2022 06:37:59 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44598 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234598AbiBRLgp (ORCPT ); Fri, 18 Feb 2022 06:36:45 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1CDE42B1655 for ; Fri, 18 Feb 2022 03:36:24 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 719CA2247C; Fri, 18 Feb 2022 12:36:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184180; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BewPUYl7ALanqbEPhDcl7g1lZEpz+MjVY87ZkoEXHuI=; b=DeSUu72NBNCsIi5ghE+i1z9fen3B9PCpcp2o+UOFW3SZltwum8qDiVdENV0Z4FRGpQ4PlQ oPgT3LRlH9ieWEJFwmpJDZrqpKyJLpS8//vu66mNaoikE8MOqF5+fb2U7weDOjHC9mWDuy +Qt3kb7J6szvOK/tii3aD57e5PV4wDk= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 19/32] mtd: spi-nor: export more function to be used in vendor modules Date: Fri, 18 Feb 2022 12:35:54 +0100 Message-Id: <20220218113607.1360020-20-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" We will move vendor specific code into the vendor modules and thus we will have to export these functions so they can be called. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 10 +++++----- drivers/mtd/spi-nor/core.h | 6 ++++++ 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 390a9ab413b7..8481272533a3 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -157,8 +157,8 @@ static int spi_nor_spimem_exec_op(struct spi_nor *nor, = struct spi_mem_op *op) return spi_mem_exec_op(nor->spimem, op); } =20 -static int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode, - u8 *buf, size_t len) +int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode, + u8 *buf, size_t len) { if (spi_nor_protocol_is_dtr(nor->reg_proto)) return -EOPNOTSUPP; @@ -166,8 +166,8 @@ static int spi_nor_controller_ops_read_reg(struct spi_n= or *nor, u8 opcode, return nor->controller_ops->read_reg(nor, opcode, buf, len); } =20 -static int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode, - const u8 *buf, size_t len) +int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode, + const u8 *buf, size_t len) { if (spi_nor_protocol_is_dtr(nor->reg_proto)) return -EOPNOTSUPP; @@ -683,7 +683,7 @@ static void spi_nor_clear_sr(struct spi_nor *nor) * * Return: 1 if ready, 0 if not ready, -errno on errors. */ -static int spi_nor_sr_ready(struct spi_nor *nor) +int spi_nor_sr_ready(struct spi_nor *nor) { int ret =3D spi_nor_read_sr(nor, nor->bouncebuf); =20 diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index fdc8c0f31f5c..446218b0e017 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -558,6 +558,7 @@ int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor); int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor); int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor); int spi_nor_read_sr(struct spi_nor *nor, u8 *sr); +int spi_nor_sr_ready(struct spi_nor *nor); int spi_nor_read_cr(struct spi_nor *nor, u8 *cr); int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len); int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1); @@ -603,6 +604,11 @@ void spi_nor_try_unlock_all(struct spi_nor *nor); void spi_nor_set_mtd_locking_ops(struct spi_nor *nor); void spi_nor_set_mtd_otp_ops(struct spi_nor *nor); =20 +int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode, + u8 *buf, size_t len); +int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode, + const u8 *buf, size_t len); + static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd) { return container_of(mtd, struct spi_nor, mtd); --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7508C433F5 for ; Fri, 18 Feb 2022 11:37:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232969AbiBRLh4 (ORCPT ); Fri, 18 Feb 2022 06:37:56 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234600AbiBRLgp (ORCPT ); Fri, 18 Feb 2022 06:36:45 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1CEFE2B1657 for ; Fri, 18 Feb 2022 03:36:24 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id C2E5E22481; Fri, 18 Feb 2022 12:36:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184180; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=F1qkSskWvLmQEwC2wGrqzOG2oXtmYsBZ+OhFkXYPiXE=; b=XSz4LNMbooEbXcRQOseQgXnotQJAnFwsndRLU+lCPy6C4JE4ii9/k2xvT8PDEuhZM98Nyo 5mRBSlX58/b1EAos/8XFaMo4seIBFDzxiElRWPRFavoN27PrD81OVBgD4U1aPZ3jp7qXlP SiqwW7VAM00pT+JyY2pezsLkp1it4es= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 20/32] mtd: spi-nor: guard _page_size parameter in S3AN_INFO() Date: Fri, 18 Feb 2022 12:35:55 +0100 Message-Id: <20220218113607.1360020-21-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The _page_size marco parameter was missing parentheses around it. Add them. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 446218b0e017..3c37b46d60d5 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -469,9 +469,9 @@ struct flash_info { (_jedec_id) & 0xff \ }, \ .id_len =3D 3, \ - .sector_size =3D (8*_page_size), \ + .sector_size =3D (8 * (_page_size)), \ .n_sectors =3D (_n_sectors), \ - .page_size =3D _page_size, \ + .page_size =3D (_page_size), \ .addr_width =3D 3, \ .flags =3D SPI_NOR_NO_FR | SPI_NOR_XSR_RDY, =20 --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52EC7C433F5 for ; Fri, 18 Feb 2022 11:37:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234581AbiBRLhu (ORCPT ); Fri, 18 Feb 2022 06:37:50 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44482 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234590AbiBRLgm (ORCPT ); Fri, 18 Feb 2022 06:36:42 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1CA5C2B100B for ; Fri, 18 Feb 2022 03:36:24 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 168C922488; Fri, 18 Feb 2022 12:36:21 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184181; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/lsdehp1ReMbMxVC+PcTLBb2egKAFJmVHKF+xUIvCeQ=; b=l1yDULbJoQhODFt3oF/iUKhXQSbRk6kZEHATD0BQPfLqKlf3vFhc3dTKxbmNIln+tsuhML bpX3knnwcD1aVeJ9X4/ytePqQYSrbjxjh5VTizWAVZadx01STRigcjYjp/VOm1sCXjwbrW AvxUQ/n4zjYfQyx8bo/e7lMFpsN5iyU= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 21/32] mtd: spi-nor: move all xilinx specifics into xilinx.c Date: Fri, 18 Feb 2022 12:35:56 +0100 Message-Id: <20220218113607.1360020-22-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Mechanically move all the xilinx functions to its own module. Then register the new flash specific ready() function. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 64 +------------------------------ drivers/mtd/spi-nor/core.h | 18 --------- drivers/mtd/spi-nor/xilinx.c | 73 ++++++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 9 ----- 4 files changed, 74 insertions(+), 90 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 8481272533a3..ae1560250c48 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -598,57 +598,6 @@ int spi_nor_write_ear(struct spi_nor *nor, u8 ear) return ret; } =20 -/** - * spi_nor_xread_sr() - Read the Status Register on S3AN flashes. - * @nor: pointer to 'struct spi_nor'. - * @sr: pointer to a DMA-able buffer where the value of the - * Status Register will be written. - * - * Return: 0 on success, -errno otherwise. - */ -int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_XRDSR, 0), - SPI_MEM_OP_NO_ADDR, - SPI_MEM_OP_NO_DUMMY, - SPI_MEM_OP_DATA_IN(1, sr, 0)); - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_XRDSR, sr, - 1); - } - - if (ret) - dev_dbg(nor->dev, "error %d reading XRDSR\n", ret); - - return ret; -} - -/** - * spi_nor_xsr_ready() - Query the Status Register of the S3AN flash to se= e if - * the flash is ready for new commands. - * @nor: pointer to 'struct spi_nor'. - * - * Return: 1 if ready, 0 if not ready, -errno on errors. - */ -static int spi_nor_xsr_ready(struct spi_nor *nor) -{ - int ret; - - ret =3D spi_nor_xread_sr(nor, nor->bouncebuf); - if (ret) - return ret; - - return !!(nor->bouncebuf[0] & XSR_RDY); -} - /** * spi_nor_clear_sr() - Clear the Status Register. * @nor: pointer to 'struct spi_nor'. @@ -798,10 +747,7 @@ static int spi_nor_ready(struct spi_nor *nor) if (nor->params->ready) return nor->params->ready(nor); =20 - if (nor->flags & SNOR_F_READY_XSR_RDY) - sr =3D spi_nor_xsr_ready(nor); - else - sr =3D spi_nor_sr_ready(nor); + sr =3D spi_nor_sr_ready(nor); if (sr < 0) return sr; fsr =3D nor->flags & SNOR_F_USE_FSR ? spi_nor_fsr_ready(nor) : 1; @@ -2677,14 +2623,6 @@ static void spi_nor_init_flags(struct spi_nor *nor) =20 if (flags & USE_FSR) nor->flags |=3D SNOR_F_USE_FSR; - - /* - * Make sure the XSR_RDY flag is set before calling - * spi_nor_wait_till_ready(). Xilinx S3AN share MFR - * with Atmel SPI NOR. - */ - if (flags & SPI_NOR_XSR_RDY) - nor->flags |=3D SNOR_F_READY_XSR_RDY; } =20 /** diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 3c37b46d60d5..fabc01ae9a81 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -15,7 +15,6 @@ enum spi_nor_option_flags { SNOR_F_USE_FSR =3D BIT(0), SNOR_F_HAS_SR_TB =3D BIT(1), SNOR_F_NO_OP_CHIP_ERASE =3D BIT(2), - SNOR_F_READY_XSR_RDY =3D BIT(3), SNOR_F_USE_CLSR =3D BIT(4), SNOR_F_BROKEN_RESET =3D BIT(5), SNOR_F_4B_OPCODES =3D BIT(6), @@ -351,8 +350,6 @@ struct spi_nor_fixups { * SPI_NOR_NO_FR: can't do fastread. * USE_CLSR: use CLSR command. * USE_FSR: use flag status register - * SPI_NOR_XSR_RDY: S3AN flashes have specific opcode to read the - * status register. * * @no_sfdp_flags: flags that indicate support that can be discovered via= SFDP. * Used when SFDP tables are not defined in the flash. Th= ese @@ -405,7 +402,6 @@ struct flash_info { #define SPI_NOR_NO_FR BIT(8) #define USE_CLSR BIT(9) #define USE_FSR BIT(10) -#define SPI_NOR_XSR_RDY BIT(11) =20 u8 no_sfdp_flags; #define SPI_NOR_SKIP_SFDP BIT(0) @@ -462,19 +458,6 @@ struct flash_info { .addr_width =3D (_addr_width), \ .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, \ =20 -#define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \ - .id =3D { \ - ((_jedec_id) >> 16) & 0xff, \ - ((_jedec_id) >> 8) & 0xff, \ - (_jedec_id) & 0xff \ - }, \ - .id_len =3D 3, \ - .sector_size =3D (8 * (_page_size)), \ - .n_sectors =3D (_n_sectors), \ - .page_size =3D (_page_size), \ - .addr_width =3D 3, \ - .flags =3D SPI_NOR_NO_FR | SPI_NOR_XSR_RDY, - #define OTP_INFO(_len, _n_regions, _base, _offset) \ .otp_org =3D { \ .len =3D (_len), \ @@ -564,7 +547,6 @@ int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr,= size_t len); int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1); int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr); =20 -int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr); ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, u8 *buf); ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 42ecdc6fc625..2140d6b2bb02 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -8,6 +8,27 @@ =20 #include "core.h" =20 +#define SPINOR_OP_XSE 0x50 /* Sector erase */ +#define SPINOR_OP_XPP 0x82 /* Page program */ +#define SPINOR_OP_XRDSR 0xd7 /* Read status register */ + +#define XSR_PAGESIZE BIT(0) /* Page size in Po2 or Linear */ +#define XSR_RDY BIT(7) /* Ready */ + +#define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \ + .id =3D { \ + ((_jedec_id) >> 16) & 0xff, \ + ((_jedec_id) >> 8) & 0xff, \ + (_jedec_id) & 0xff \ + }, \ + .id_len =3D 3, \ + .sector_size =3D (8 * (_page_size)), \ + .n_sectors =3D (_n_sectors), \ + .page_size =3D (_page_size), \ + .addr_width =3D 3, \ + .flags =3D SPI_NOR_NO_FR + +/* Xilinx S3AN share MFR with Atmel SPI NOR */ static const struct flash_info xilinx_nor_parts[] =3D { /* Xilinx S3AN Internal Flash */ { "3S50AN", S3AN_INFO(0x1f2200, 64, 264) }, @@ -38,6 +59,57 @@ static u32 s3an_convert_addr(struct spi_nor *nor, u32 ad= dr) return page | offset; } =20 +/** + * spi_nor_xread_sr() - Read the Status Register on S3AN flashes. + * @nor: pointer to 'struct spi_nor'. + * @sr: pointer to a DMA-able buffer where the value of the + * Status Register will be written. + * + * Return: 0 on success, -errno otherwise. + */ +static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) +{ + int ret; + + if (nor->spimem) { + struct spi_mem_op op =3D + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_XRDSR, 0), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_DATA_IN(1, sr, 0)); + + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); + + ret =3D spi_mem_exec_op(nor->spimem, &op); + } else { + ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_XRDSR, sr, + 1); + } + + if (ret) + dev_dbg(nor->dev, "error %d reading XRDSR\n", ret); + + return ret; +} + +/** + * spi_nor_xsr_ready() - Query the Status Register of the S3AN flash to se= e if + * the flash is ready for new commands. + * @nor: pointer to 'struct spi_nor'. + * + * Return: 1 if ready, 0 if not ready, -errno on errors. + */ +static int spi_nor_xsr_ready(struct spi_nor *nor) +{ + int ret; + + ret =3D spi_nor_xread_sr(nor, nor->bouncebuf); + if (ret) + return ret; + + return !!(nor->bouncebuf[0] & XSR_RDY); +} + static int xilinx_nor_setup(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps) { @@ -83,6 +155,7 @@ static int xilinx_nor_setup(struct spi_nor *nor, static void xilinx_nor_late_init(struct spi_nor *nor) { nor->params->setup =3D xilinx_nor_setup; + nor->params->ready =3D spi_nor_xsr_ready; } =20 static const struct spi_nor_fixups xilinx_nor_fixups =3D { diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index fc90fce26e33..b44b05a6f934 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -86,15 +86,6 @@ #define SPINOR_OP_BP 0x02 /* Byte program */ #define SPINOR_OP_AAI_WP 0xad /* Auto address increment word program */ =20 -/* Used for S3AN flashes only */ -#define SPINOR_OP_XSE 0x50 /* Sector erase */ -#define SPINOR_OP_XPP 0x82 /* Page program */ -#define SPINOR_OP_XRDSR 0xd7 /* Read status register */ - -#define XSR_PAGESIZE BIT(0) /* Page size in Po2 or Linear */ -#define XSR_RDY BIT(7) /* Ready */ - - /* Used for Macronix and Winbond flashes. */ #define SPINOR_OP_EN4B 0xb7 /* Enter 4-byte mode */ #define SPINOR_OP_EX4B 0xe9 /* Exit 4-byte mode */ --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDF30C433F5 for ; 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(unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 814D62248E; Fri, 18 Feb 2022 12:36:21 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184181; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=TVr3ei/zYQMSUzZaFUQ8S5hh2hTqvyLfZwC1r+crQ0A=; b=TVc6c1XYX8fNeZlkL2XA9GSV4kWaXLg+qE9i2Clh7tcYWpG8cvHw0fm6+pj0Eh3rCay4cC 4AXoQgxxwbC9NQEVA/Sw0VoIoQURysczutWcWZtUJbRTLmc7XwI0tchv4a8VDcUfGUkV39 0i3/SLq3KrwADr4wSmH8NxYm+5Pep00= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 22/32] mtd: spi-nor: xilinx: rename vendor specific functions and defines Date: Fri, 18 Feb 2022 12:35:57 +0100 Message-Id: <20220218113607.1360020-23-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Drop the generic spi_nor prefix for all the xilinx functions. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/xilinx.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 2140d6b2bb02..c098c50379b4 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -8,9 +8,9 @@ =20 #include "core.h" =20 -#define SPINOR_OP_XSE 0x50 /* Sector erase */ -#define SPINOR_OP_XPP 0x82 /* Page program */ -#define SPINOR_OP_XRDSR 0xd7 /* Read status register */ +#define XILINX_OP_SE 0x50 /* Sector erase */ +#define XILINX_OP_PP 0x82 /* Page program */ +#define XILINX_OP_RDSR 0xd7 /* Read status register */ =20 #define XSR_PAGESIZE BIT(0) /* Page size in Po2 or Linear */ #define XSR_RDY BIT(7) /* Ready */ @@ -60,20 +60,20 @@ static u32 s3an_convert_addr(struct spi_nor *nor, u32 a= ddr) } =20 /** - * spi_nor_xread_sr() - Read the Status Register on S3AN flashes. + * xilinx_nor_read_sr() - Read the Status Register on S3AN flashes. * @nor: pointer to 'struct spi_nor'. * @sr: pointer to a DMA-able buffer where the value of the * Status Register will be written. * * Return: 0 on success, -errno otherwise. */ -static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) +static int xilinx_nor_read_sr(struct spi_nor *nor, u8 *sr) { int ret; =20 if (nor->spimem) { struct spi_mem_op op =3D - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_XRDSR, 0), + SPI_MEM_OP(SPI_MEM_OP_CMD(XILINX_OP_RDSR, 0), SPI_MEM_OP_NO_ADDR, SPI_MEM_OP_NO_DUMMY, SPI_MEM_OP_DATA_IN(1, sr, 0)); @@ -82,7 +82,7 @@ static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) =20 ret =3D spi_mem_exec_op(nor->spimem, &op); } else { - ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_XRDSR, sr, + ret =3D spi_nor_controller_ops_read_reg(nor, XILINX_OP_RDSR, sr, 1); } =20 @@ -93,17 +93,17 @@ static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) } =20 /** - * spi_nor_xsr_ready() - Query the Status Register of the S3AN flash to se= e if - * the flash is ready for new commands. + * xilinx_nor_sr_ready() - Query the Status Register of the S3AN flash to = see + * if the flash is ready for new commands. * @nor: pointer to 'struct spi_nor'. * * Return: 1 if ready, 0 if not ready, -errno on errors. */ -static int spi_nor_xsr_ready(struct spi_nor *nor) +static int xilinx_nor_sr_ready(struct spi_nor *nor) { int ret; =20 - ret =3D spi_nor_xread_sr(nor, nor->bouncebuf); + ret =3D xilinx_nor_read_sr(nor, nor->bouncebuf); if (ret) return ret; =20 @@ -116,12 +116,12 @@ static int xilinx_nor_setup(struct spi_nor *nor, u32 page_size; int ret; =20 - ret =3D spi_nor_xread_sr(nor, nor->bouncebuf); + ret =3D xilinx_nor_read_sr(nor, nor->bouncebuf); if (ret) return ret; =20 - nor->erase_opcode =3D SPINOR_OP_XSE; - nor->program_opcode =3D SPINOR_OP_XPP; + nor->erase_opcode =3D XILINX_OP_SE; + nor->program_opcode =3D XILINX_OP_PP; nor->read_opcode =3D SPINOR_OP_READ; nor->flags |=3D SNOR_F_NO_OP_CHIP_ERASE; =20 @@ -155,7 +155,7 @@ static int xilinx_nor_setup(struct spi_nor *nor, static void xilinx_nor_late_init(struct spi_nor *nor) { nor->params->setup =3D xilinx_nor_setup; - nor->params->ready =3D spi_nor_xsr_ready; + nor->params->ready =3D xilinx_nor_sr_ready; } =20 static const struct spi_nor_fixups xilinx_nor_fixups =3D { --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61EA9C433EF for ; Fri, 18 Feb 2022 11:38:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234757AbiBRLi6 (ORCPT ); Fri, 18 Feb 2022 06:38:58 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44636 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234603AbiBRLgp (ORCPT ); Fri, 18 Feb 2022 06:36:45 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F3E32B1A97 for ; Fri, 18 Feb 2022 03:36:25 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id C0ECD22495; Fri, 18 Feb 2022 12:36:21 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184181; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vndLg1/tmA+xUIohe+oUi4f1BSBLl5gr6bazRy9aWpE=; b=EiF8GPxXxmc87fQZfUFyHVjlGyR0glWUxqQm9YfOimiE6mykrxPHSjQ1jSJhhm6mWGMjbh TW7xIWRS9PKLzcvY1YRe2pxALIYKyRnGst2HD/3PrJGDfR2TfxPmQG9NlUjkqtbWsQNN1j vvva8N2n29Re+HW9C7f00D3mbRCslto= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 23/32] mtd: spi-nor: xilinx: correct the debug message Date: Fri, 18 Feb 2022 12:35:58 +0100 Message-Id: <20220218113607.1360020-24-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" XRDSR is a combination of xilinx and the RDSR opcode, but the register is just the status register. Correct the debug message. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/xilinx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index c098c50379b4..6a8b86861ce2 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -87,7 +87,7 @@ static int xilinx_nor_read_sr(struct spi_nor *nor, u8 *sr) } =20 if (ret) - dev_dbg(nor->dev, "error %d reading XRDSR\n", ret); + dev_dbg(nor->dev, "error %d reading SR\n", ret); =20 return ret; } --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47639C433EF for ; Fri, 18 Feb 2022 11:37:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234777AbiBRLiE (ORCPT ); Fri, 18 Feb 2022 06:38:04 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44634 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234602AbiBRLgp (ORCPT ); Fri, 18 Feb 2022 06:36:45 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67E282B1A91 for ; Fri, 18 Feb 2022 03:36:24 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 0EA2022496; Fri, 18 Feb 2022 12:36:22 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184182; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=y6Gbu5ONm2hlRADzx/R6Xoo589VHVIGFuGyeHW81kPk=; b=RcUmYZ4p/5Ai8aEnYUJMneeOT2eyjjqS9qy0HqNZpGNDBkuag77Bt7nBsIJpnw6DOXEf3A +/0zTc1fmhC3M2nvy9x8ykevDOYldu5bLix8qkKc9OUvFHvSy5SbFqgI4LowiC4dzEuKnS A3xH0LVPxtXJle/oWZBoPLXh/zJEMX0= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 24/32] mtd: spi-nor: move all micron-st specifics into micron-st.c Date: Fri, 18 Feb 2022 12:35:59 +0100 Message-Id: <20220218113607.1360020-25-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The flag status register is only available on micron flashes. Move all the functions around that into the micron module. This is almost a mechanical move except for the spi_nor_fsr_ready() which now also checks the normal status register. Previously, this was done in spi_nor_ready(). Signed-off-by: Michael Walle Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 123 +---------------------------- drivers/mtd/spi-nor/micron-st.c | 133 ++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 8 -- 3 files changed, 134 insertions(+), 130 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index ae1560250c48..5b56d718692b 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -412,50 +412,6 @@ int spi_nor_read_sr(struct spi_nor *nor, u8 *sr) return ret; } =20 -/** - * spi_nor_read_fsr() - Read the Flag Status Register. - * @nor: pointer to 'struct spi_nor' - * @fsr: pointer to a DMA-able buffer where the value of the - * Flag Status Register will be written. Should be at least 2 - * bytes. - * - * Return: 0 on success, -errno otherwise. - */ -static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDFSR, 0), - SPI_MEM_OP_NO_ADDR, - SPI_MEM_OP_NO_DUMMY, - SPI_MEM_OP_DATA_IN(1, fsr, 0)); - - if (nor->reg_proto =3D=3D SNOR_PROTO_8_8_8_DTR) { - op.addr.nbytes =3D nor->params->rdsr_addr_nbytes; - op.dummy.nbytes =3D nor->params->rdsr_dummy; - /* - * We don't want to read only one byte in DTR mode. So, - * read 2 and then discard the second byte. - */ - op.data.nbytes =3D 2; - } - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDFSR, fsr, - 1); - } - - if (ret) - dev_dbg(nor->dev, "error %d reading FSR\n", ret); - - return ret; -} - /** * spi_nor_read_cr() - Read the Configuration Register using the * SPINOR_OP_RDCR (35h) command. @@ -664,75 +620,6 @@ int spi_nor_sr_ready(struct spi_nor *nor) return !(nor->bouncebuf[0] & SR_WIP); } =20 -/** - * spi_nor_clear_fsr() - Clear the Flag Status Register. - * @nor: pointer to 'struct spi_nor'. - */ -static void spi_nor_clear_fsr(struct spi_nor *nor) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLFSR, 0), - SPI_MEM_OP_NO_ADDR, - SPI_MEM_OP_NO_DUMMY, - SPI_MEM_OP_NO_DATA); - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLFSR, - NULL, 0); - } - - if (ret) - dev_dbg(nor->dev, "error %d clearing FSR\n", ret); -} - -/** - * spi_nor_fsr_ready() - Query the Flag Status Register to see if the flas= h is - * ready for new commands. - * @nor: pointer to 'struct spi_nor'. - * - * Return: 1 if ready, 0 if not ready, -errno on errors. - */ -static int spi_nor_fsr_ready(struct spi_nor *nor) -{ - int ret =3D spi_nor_read_fsr(nor, nor->bouncebuf); - - if (ret) - return ret; - - if (nor->bouncebuf[0] & (FSR_E_ERR | FSR_P_ERR)) { - if (nor->bouncebuf[0] & FSR_E_ERR) - dev_err(nor->dev, "Erase operation failed.\n"); - else - dev_err(nor->dev, "Program operation failed.\n"); - - if (nor->bouncebuf[0] & FSR_PT_ERR) - dev_err(nor->dev, - "Attempted to modify a protected sector.\n"); - - spi_nor_clear_fsr(nor); - - /* - * WEL bit remains set to one when an erase or page program - * error occurs. Issue a Write Disable command to protect - * against inadvertent writes that can possibly corrupt the - * contents of the memory. - */ - ret =3D spi_nor_write_disable(nor); - if (ret) - return ret; - - return -EIO; - } - - return !!(nor->bouncebuf[0] & FSR_READY); -} - /** * spi_nor_ready() - Query the flash to see if it is ready for new command= s. * @nor: pointer to 'struct spi_nor'. @@ -741,19 +628,11 @@ static int spi_nor_fsr_ready(struct spi_nor *nor) */ static int spi_nor_ready(struct spi_nor *nor) { - int sr, fsr; - /* Flashes might override the standard routine. */ if (nor->params->ready) return nor->params->ready(nor); =20 - sr =3D spi_nor_sr_ready(nor); - if (sr < 0) - return sr; - fsr =3D nor->flags & SNOR_F_USE_FSR ? spi_nor_fsr_ready(nor) : 1; - if (fsr < 0) - return fsr; - return sr && fsr; + return spi_nor_sr_ready(nor); } =20 /** diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 7a68f2ad3ea1..8877b122cf42 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -8,6 +8,8 @@ =20 #include "core.h" =20 +#define SPINOR_OP_RDFSR 0x70 /* Read flag status register */ +#define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */ #define SPINOR_OP_MT_DTR_RD 0xfd /* Fast Read opcode in DTR mode */ #define SPINOR_OP_MT_RD_ANY_REG 0x85 /* Read volatile register */ #define SPINOR_OP_MT_WR_ANY_REG 0x81 /* Write volatile register */ @@ -17,6 +19,12 @@ #define SPINOR_MT_OCT_DTR 0xe7 /* Enable Octal DTR. */ #define SPINOR_MT_EXSPI 0xff /* Enable Extended SPI (default) */ =20 +/* Flag Status Register bits */ +#define FSR_READY BIT(7) /* Device status, 0 =3D Busy, 1 =3D Ready */ +#define FSR_E_ERR BIT(5) /* Erase operation status */ +#define FSR_P_ERR BIT(4) /* Program operation status */ +#define FSR_PT_ERR BIT(1) /* Protection error bit */ + static int micron_st_nor_octal_dtr_enable(struct spi_nor *nor, bool enable) { struct spi_mem_op op; @@ -273,6 +281,124 @@ static int micron_st_nor_set_4byte_addr_mode(struct s= pi_nor *nor, bool enable) return spi_nor_write_disable(nor); } =20 +/** + * spi_nor_read_fsr() - Read the Flag Status Register. + * @nor: pointer to 'struct spi_nor' + * @fsr: pointer to a DMA-able buffer where the value of the + * Flag Status Register will be written. Should be at least 2 + * bytes. + * + * Return: 0 on success, -errno otherwise. + */ +static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr) +{ + int ret; + + if (nor->spimem) { + struct spi_mem_op op =3D + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDFSR, 0), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_DATA_IN(1, fsr, 0)); + + if (nor->reg_proto =3D=3D SNOR_PROTO_8_8_8_DTR) { + op.addr.nbytes =3D nor->params->rdsr_addr_nbytes; + op.dummy.nbytes =3D nor->params->rdsr_dummy; + /* + * We don't want to read only one byte in DTR mode. So, + * read 2 and then discard the second byte. + */ + op.data.nbytes =3D 2; + } + + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); + + ret =3D spi_mem_exec_op(nor->spimem, &op); + } else { + ret =3D spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDFSR, fsr, + 1); + } + + if (ret) + dev_dbg(nor->dev, "error %d reading FSR\n", ret); + + return ret; +} + +/** + * spi_nor_clear_fsr() - Clear the Flag Status Register. + * @nor: pointer to 'struct spi_nor'. + */ +static void spi_nor_clear_fsr(struct spi_nor *nor) +{ + int ret; + + if (nor->spimem) { + struct spi_mem_op op =3D + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLFSR, 0), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_NO_DATA); + + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); + + ret =3D spi_mem_exec_op(nor->spimem, &op); + } else { + ret =3D spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLFSR, + NULL, 0); + } + + if (ret) + dev_dbg(nor->dev, "error %d clearing FSR\n", ret); +} + +/** + * spi_nor_fsr_ready() - Query the Flag Status Register to see if the flas= h is + * ready for new commands. + * @nor: pointer to 'struct spi_nor'. + * + * Return: 1 if ready, 0 if not ready, -errno on errors. + */ +static int spi_nor_fsr_ready(struct spi_nor *nor) +{ + int sr_ready, ret; + + sr_ready =3D spi_nor_sr_ready(nor); + if (sr_ready < 0) + return sr_ready; + + ret =3D spi_nor_read_fsr(nor, nor->bouncebuf); + if (ret) + return ret; + + if (nor->bouncebuf[0] & (FSR_E_ERR | FSR_P_ERR)) { + if (nor->bouncebuf[0] & FSR_E_ERR) + dev_err(nor->dev, "Erase operation failed.\n"); + else + dev_err(nor->dev, "Program operation failed.\n"); + + if (nor->bouncebuf[0] & FSR_PT_ERR) + dev_err(nor->dev, + "Attempted to modify a protected sector.\n"); + + spi_nor_clear_fsr(nor); + + /* + * WEL bit remains set to one when an erase or page program + * error occurs. Issue a Write Disable command to protect + * against inadvertent writes that can possibly corrupt the + * contents of the memory. + */ + ret =3D spi_nor_write_disable(nor); + if (ret) + return ret; + + return -EIO; + } + + return sr_ready && !!(nor->bouncebuf[0] & FSR_READY); +} + static void micron_st_nor_default_init(struct spi_nor *nor) { nor->flags |=3D SNOR_F_HAS_LOCK; @@ -281,8 +407,15 @@ static void micron_st_nor_default_init(struct spi_nor = *nor) nor->params->set_4byte_addr_mode =3D micron_st_nor_set_4byte_addr_mode; } =20 +static void micron_st_nor_late_init(struct spi_nor *nor) +{ + if (nor->flags & SNOR_F_USE_FSR) + nor->params->ready =3D spi_nor_fsr_ready; +} + static const struct spi_nor_fixups micron_st_nor_fixups =3D { .default_init =3D micron_st_nor_default_init, + .late_init =3D micron_st_nor_late_init, }; =20 const struct spi_nor_manufacturer spi_nor_micron =3D { diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index b44b05a6f934..4622251a79ff 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -47,8 +47,6 @@ #define SPINOR_OP_RDID 0x9f /* Read JEDEC ID */ #define SPINOR_OP_RDSFDP 0x5a /* Read SFDP */ #define SPINOR_OP_RDCR 0x35 /* Read configuration register */ -#define SPINOR_OP_RDFSR 0x70 /* Read flag status register */ -#define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */ #define SPINOR_OP_RDEAR 0xc8 /* Read Extended Address Register */ #define SPINOR_OP_WREAR 0xc5 /* Write Extended Address Register */ #define SPINOR_OP_SRSTEN 0x66 /* Software Reset Enable */ @@ -126,12 +124,6 @@ /* Enhanced Volatile Configuration Register bits */ #define EVCR_QUAD_EN_MICRON BIT(7) /* Micron Quad I/O */ =20 -/* Flag Status Register bits */ -#define FSR_READY BIT(7) /* Device status, 0 =3D Busy, 1 =3D Ready */ -#define FSR_E_ERR BIT(5) /* Erase operation status */ -#define FSR_P_ERR BIT(4) /* Program operation status */ -#define FSR_PT_ERR BIT(1) /* Protection error bit */ - /* Status Register 2 bits. */ #define SR2_QUAD_EN_BIT1 BIT(1) #define SR2_LB1 BIT(3) /* Security Register Lock Bit 1 */ --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18FECC433F5 for ; Fri, 18 Feb 2022 11:37:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234724AbiBRLiJ (ORCPT ); Fri, 18 Feb 2022 06:38:09 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234556AbiBRLgp (ORCPT ); Fri, 18 Feb 2022 06:36:45 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9254A2B1A92 for ; Fri, 18 Feb 2022 03:36:24 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 5764522497; Fri, 18 Feb 2022 12:36:22 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184182; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CHaJ1Kn9aqC7sMskqgvZF6XdFCXYYKaOSB+d24RXhTQ=; b=r9U5yZhytTfosNYKou3/AYQDJ5+OjQBMcnbhsWnKY0vFrnOV4e/96GiQofkFueRg+kI35e z+7xsn2KWLBYQT2ZswMWLwV7lrrP03OKzB/AyJyWf03VtFaMv2iYT+Fx8CG7WAzXh2ziXG ykETBFOaLEWZ8c8dFeXyT56T09U58QQ= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 25/32] mtd: spi-nor: micron-st: convert USE_FSR to a manufacturer flag Date: Fri, 18 Feb 2022 12:36:00 +0100 Message-Id: <20220218113607.1360020-26-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Now that all functions using that flag are local to the micron module, we can convert the flag to a manufacturer one. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 3 -- drivers/mtd/spi-nor/core.h | 3 -- drivers/mtd/spi-nor/micron-st.c | 93 +++++++++++++++++++++------------ 3 files changed, 60 insertions(+), 39 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 5b56d718692b..ac0faedebafe 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2499,9 +2499,6 @@ static void spi_nor_init_flags(struct spi_nor *nor) =20 if (flags & USE_CLSR) nor->flags |=3D SNOR_F_USE_CLSR; - - if (flags & USE_FSR) - nor->flags |=3D SNOR_F_USE_FSR; } =20 /** diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index fabc01ae9a81..a02bf54289fb 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -12,7 +12,6 @@ #define SPI_NOR_MAX_ID_LEN 6 =20 enum spi_nor_option_flags { - SNOR_F_USE_FSR =3D BIT(0), SNOR_F_HAS_SR_TB =3D BIT(1), SNOR_F_NO_OP_CHIP_ERASE =3D BIT(2), SNOR_F_USE_CLSR =3D BIT(4), @@ -349,7 +348,6 @@ struct spi_nor_fixups { * NO_CHIP_ERASE: chip does not support chip erase. * SPI_NOR_NO_FR: can't do fastread. * USE_CLSR: use CLSR command. - * USE_FSR: use flag status register * * @no_sfdp_flags: flags that indicate support that can be discovered via= SFDP. * Used when SFDP tables are not defined in the flash. Th= ese @@ -401,7 +399,6 @@ struct flash_info { #define NO_CHIP_ERASE BIT(7) #define SPI_NOR_NO_FR BIT(8) #define USE_CLSR BIT(9) -#define USE_FSR BIT(10) =20 u8 no_sfdp_flags; #define SPI_NOR_SKIP_SFDP BIT(0) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 8877b122cf42..f693f8720541 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -8,6 +8,9 @@ =20 #include "core.h" =20 +/* flash_info mfr_flag. Used to read proprietary FSR register. */ +#define USE_FSR BIT(0) + #define SPINOR_OP_RDFSR 0x70 /* Read flag status register */ #define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */ #define SPINOR_OP_MT_DTR_RD 0xfd /* Fast Read opcode in DTR mode */ @@ -140,15 +143,17 @@ static const struct spi_nor_fixups mt35xu512aba_fixup= s =3D { =20 static const struct flash_info micron_nor_parts[] =3D { { "mt35xu512aba", INFO(0x2c5b1a, 0, 128 * 1024, 512) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP) FIXUP_FLAGS(SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE) - .fixups =3D &mt35xu512aba_fixups}, + MFR_FLAGS(USE_FSR) + .fixups =3D &mt35xu512aba_fixups + }, { "mt35xu02g", INFO(0x2c5b1c, 0, 128 * 1024, 2048) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_OCTAL_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, + FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + MFR_FLAGS(USE_FSR) + }, }; =20 static const struct flash_info st_nor_parts[] =3D { @@ -164,57 +169,79 @@ static const struct flash_info st_nor_parts[] =3D { NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + SPI_NOR_BP3_SR_BIT6) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + SPI_NOR_BP3_SR_BIT6) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "mt25ql256a", INFO6(0x20ba19, 0x104400, 64 * 1024, 512) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, + FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + MFR_FLAGS(USE_FSR) + }, { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, + SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "mt25qu256a", INFO6(0x20bb19, 0x104400, 64 * 1024, 512) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, + FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + MFR_FLAGS(USE_FSR) + }, { "n25q256ax1", INFO(0x20bb19, 0, 64 * 1024, 512) - FLAGS(USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "mt25ql512a", INFO6(0x20ba20, 0x104400, 64 * 1024, 1024) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, + FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + MFR_FLAGS(USE_FSR) + }, { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + SPI_NOR_BP3_SR_BIT6) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "mt25qu512a", INFO6(0x20bb20, 0x104400, 64 * 1024, 1024) - FLAGS(USE_FSR) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, + FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + MFR_FLAGS(USE_FSR) + }, { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + SPI_NOR_BP3_SR_BIT6) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048) - FLAGS(NO_CHIP_ERASE | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + FLAGS(NO_CHIP_ERASE) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "mt25ql02g", INFO(0x20ba22, 0, 64 * 1024, 4096) - FLAGS(NO_CHIP_ERASE | USE_FSR) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, + FLAGS(NO_CHIP_ERASE) + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, { "mt25qu02g", INFO(0x20bb22, 0, 64 * 1024, 4096) - FLAGS(NO_CHIP_ERASE | USE_FSR) + FLAGS(NO_CHIP_ERASE) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, + SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_FSR) + }, =20 { "m25p05", INFO(0x202010, 0, 32 * 1024, 2) }, { "m25p10", INFO(0x202011, 0, 32 * 1024, 4) }, @@ -409,7 +436,7 @@ static void micron_st_nor_default_init(struct spi_nor *= nor) =20 static void micron_st_nor_late_init(struct spi_nor *nor) { - if (nor->flags & SNOR_F_USE_FSR) + if (nor->info->mfr_flags & USE_FSR) nor->params->ready =3D spi_nor_fsr_ready; } =20 --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 102F6C433EF for ; Fri, 18 Feb 2022 11:38:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234906AbiBRLjB (ORCPT ); Fri, 18 Feb 2022 06:39:01 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234606AbiBRLgp (ORCPT ); Fri, 18 Feb 2022 06:36:45 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99D562B1A95 for ; Fri, 18 Feb 2022 03:36:24 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id A99FC223F0; Fri, 18 Feb 2022 12:36:22 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184182; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yvCsGo+Zzlp+j51uBwOYnmVN4vdWTxdhsRo6HA993sA=; b=PPoV1eBaoxAuhA5htcx6fmsEBpxExNTEday1zoGeTC8caJ8NukFw3B15BjliPxoAgzp6mS Z+am6+Wj75t8672UgXPTMW44Sw8D7DNXjRsPQZTh1UamtfljYpp2dQNbseOYqD4+q+X2nh L4fFF0ywtARWPqRYiz40DufhJ2jeJFA= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 26/32] mtd: spi-nor: micron-st: rename vendor specific functions and defines Date: Fri, 18 Feb 2022 12:36:01 +0100 Message-Id: <20220218113607.1360020-27-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Drop the generic spi_nor prefix for all the micron-st functions. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/micron-st.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index f693f8720541..de450495e1ab 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -309,7 +309,7 @@ static int micron_st_nor_set_4byte_addr_mode(struct spi= _nor *nor, bool enable) } =20 /** - * spi_nor_read_fsr() - Read the Flag Status Register. + * micron_st_nor_read_fsr() - Read the Flag Status Register. * @nor: pointer to 'struct spi_nor' * @fsr: pointer to a DMA-able buffer where the value of the * Flag Status Register will be written. Should be at least 2 @@ -317,7 +317,7 @@ static int micron_st_nor_set_4byte_addr_mode(struct spi= _nor *nor, bool enable) * * Return: 0 on success, -errno otherwise. */ -static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr) +static int micron_st_nor_read_fsr(struct spi_nor *nor, u8 *fsr) { int ret; =20 @@ -353,10 +353,10 @@ static int spi_nor_read_fsr(struct spi_nor *nor, u8 *= fsr) } =20 /** - * spi_nor_clear_fsr() - Clear the Flag Status Register. + * micron_st_nor_clear_fsr() - Clear the Flag Status Register. * @nor: pointer to 'struct spi_nor'. */ -static void spi_nor_clear_fsr(struct spi_nor *nor) +static void micron_st_nor_clear_fsr(struct spi_nor *nor) { int ret; =20 @@ -380,13 +380,13 @@ static void spi_nor_clear_fsr(struct spi_nor *nor) } =20 /** - * spi_nor_fsr_ready() - Query the Flag Status Register to see if the flas= h is - * ready for new commands. + * micron_st_nor_fsr_ready() - Query the Flag Status Register to see if the + * flash is ready for new commands. * @nor: pointer to 'struct spi_nor'. * * Return: 1 if ready, 0 if not ready, -errno on errors. */ -static int spi_nor_fsr_ready(struct spi_nor *nor) +static int micron_st_nor_fsr_ready(struct spi_nor *nor) { int sr_ready, ret; =20 @@ -394,7 +394,7 @@ static int spi_nor_fsr_ready(struct spi_nor *nor) if (sr_ready < 0) return sr_ready; =20 - ret =3D spi_nor_read_fsr(nor, nor->bouncebuf); + ret =3D micron_st_nor_read_fsr(nor, nor->bouncebuf); if (ret) return ret; =20 @@ -408,7 +408,7 @@ static int spi_nor_fsr_ready(struct spi_nor *nor) dev_err(nor->dev, "Attempted to modify a protected sector.\n"); =20 - spi_nor_clear_fsr(nor); + micron_st_nor_clear_fsr(nor); =20 /* * WEL bit remains set to one when an erase or page program @@ -437,7 +437,7 @@ static void micron_st_nor_default_init(struct spi_nor *= nor) static void micron_st_nor_late_init(struct spi_nor *nor) { if (nor->info->mfr_flags & USE_FSR) - nor->params->ready =3D spi_nor_fsr_ready; + nor->params->ready =3D micron_st_nor_fsr_ready; } =20 static const struct spi_nor_fixups micron_st_nor_fixups =3D { --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 854D5C433EF for ; Fri, 18 Feb 2022 11:38:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234784AbiBRLih (ORCPT ); Fri, 18 Feb 2022 06:38:37 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234615AbiBRLgq (ORCPT ); Fri, 18 Feb 2022 06:36:46 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 676212B0B37 for ; Fri, 18 Feb 2022 03:36:26 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id EE55622239; Fri, 18 Feb 2022 12:36:22 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184183; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qL5CIZLAHLRpiDax8OyYMNlETCy029ApvOQa4Db/FjE=; b=l4OVKWXjsEUdtM6dEv6mpQVeAEKoLjHvW4gL4me7Sbma6kr479g7i9wfxD1VFJW3VdYnLG nUDgiLYBcigIbJX1MJmjjFB9L/dkWsZSCtYDecV45lDJQP1ysH/hKoAfxbm3BEGgp7FGJP Vcx0VhgtyP988s2inFNnDuw7CTfCaeU= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 27/32] mtd: spi-nor: spansion: slightly rework control flow in late_init() Date: Fri, 18 Feb 2022 12:36:02 +0100 Message-Id: <20220218113607.1360020-28-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Don't return early when the flash is smaller than or equal to 16MiB. We need to be able to register hooks for all sizes of flashes. This also has the benefit that it increases the readability of the code because the action, i.e. registering the fixups, is connected to the condition, i.e. flashes larger than 16MiB. Signed-off-by: Michael Walle Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/spansion.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index c57ee085e1ba..86665e55970d 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -296,13 +296,12 @@ static const struct flash_info spansion_nor_parts[] = =3D { =20 static void spansion_nor_late_init(struct spi_nor *nor) { - if (nor->params->size <=3D SZ_16M) - return; - - nor->flags |=3D SNOR_F_4B_OPCODES; - /* No small sector erase for 4-byte command set */ - nor->erase_opcode =3D SPINOR_OP_SE; - nor->mtd.erasesize =3D nor->info->sector_size; + if (nor->params->size > SZ_16M) { + nor->flags |=3D SNOR_F_4B_OPCODES; + /* No small sector erase for 4-byte command set */ + nor->erase_opcode =3D SPINOR_OP_SE; + nor->mtd.erasesize =3D nor->info->sector_size; + } } =20 static const struct spi_nor_fixups spansion_nor_fixups =3D { --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C84CC433F5 for ; Fri, 18 Feb 2022 11:38:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233462AbiBRLiy (ORCPT ); Fri, 18 Feb 2022 06:38:54 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44600 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234619AbiBRLgq (ORCPT ); Fri, 18 Feb 2022 06:36:46 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 678182B1A9E for ; Fri, 18 Feb 2022 03:36:26 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 33499223EF; Fri, 18 Feb 2022 12:36:23 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184183; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yfCCzUPTOP+4bjBQpTuSfDS2yYDjRFWUHlf1SjyvktE=; b=dgcKd3i3W8E008P3gPKDeURo1K5OPeYPpgxzSwa7+7bzMVBpr47dnX9rqgNG2yn0UgRAt+ VLGmuXzsJZAmpeWuooCML2U9FkCD0pix2i9BB/cRjK34XwddKWPTJmBW6tUSe1X1qFY/ej VejZfNVLEs961G17xghLqSjder97jK0= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 28/32] mtd: spi-nor: move all spansion specifics into spansion.c Date: Fri, 18 Feb 2022 12:36:03 +0100 Message-Id: <20220218113607.1360020-29-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The clear status register flags is only available on spansion flashes. Move all the functions around that into the spanion module. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.c | 49 ------------------------ drivers/mtd/spi-nor/spansion.c | 70 ++++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 1 - 3 files changed, 70 insertions(+), 50 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index ac0faedebafe..e2b8b0a438ce 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -554,33 +554,6 @@ int spi_nor_write_ear(struct spi_nor *nor, u8 ear) return ret; } =20 -/** - * spi_nor_clear_sr() - Clear the Status Register. - * @nor: pointer to 'struct spi_nor'. - */ -static void spi_nor_clear_sr(struct spi_nor *nor) -{ - int ret; - - if (nor->spimem) { - struct spi_mem_op op =3D - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLSR, 0), - SPI_MEM_OP_NO_ADDR, - SPI_MEM_OP_NO_DUMMY, - SPI_MEM_OP_NO_DATA); - - spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); - - ret =3D spi_mem_exec_op(nor->spimem, &op); - } else { - ret =3D spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLSR, - NULL, 0); - } - - if (ret) - dev_dbg(nor->dev, "error %d clearing SR\n", ret); -} - /** * spi_nor_sr_ready() - Query the Status Register to see if the flash is r= eady * for new commands. @@ -595,28 +568,6 @@ int spi_nor_sr_ready(struct spi_nor *nor) if (ret) return ret; =20 - if (nor->flags & SNOR_F_USE_CLSR && - nor->bouncebuf[0] & (SR_E_ERR | SR_P_ERR)) { - if (nor->bouncebuf[0] & SR_E_ERR) - dev_err(nor->dev, "Erase Error occurred\n"); - else - dev_err(nor->dev, "Programming Error occurred\n"); - - spi_nor_clear_sr(nor); - - /* - * WEL bit remains set to one when an erase or page program - * error occurs. Issue a Write Disable command to protect - * against inadvertent writes that can possibly corrupt the - * contents of the memory. - */ - ret =3D spi_nor_write_disable(nor); - if (ret) - return ret; - - return -EIO; - } - return !(nor->bouncebuf[0] & SR_WIP); } =20 diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 86665e55970d..f7d781194850 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -8,6 +8,7 @@ =20 #include "core.h" =20 +#define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */ #define SPINOR_OP_RD_ANY_REG 0x65 /* Read any register */ #define SPINOR_OP_WR_ANY_REG 0x71 /* Write any register */ #define SPINOR_REG_CYPRESS_CFR2V 0x00800003 @@ -294,6 +295,72 @@ static const struct flash_info spansion_nor_parts[] = =3D { }, }; =20 +/** + * spi_nor_clear_sr() - Clear the Status Register. + * @nor: pointer to 'struct spi_nor'. + */ +static void spi_nor_clear_sr(struct spi_nor *nor) +{ + int ret; + + if (nor->spimem) { + struct spi_mem_op op =3D + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLSR, 0), + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_NO_DATA); + + spi_nor_spimem_setup_op(nor, &op, nor->reg_proto); + + ret =3D spi_mem_exec_op(nor->spimem, &op); + } else { + ret =3D spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLSR, + NULL, 0); + } + + if (ret) + dev_dbg(nor->dev, "error %d clearing SR\n", ret); +} + +/** + * spi_nor_sr_ready_and_clear() - Query the Status Register to see if the = flash + * is ready for new commands and clear it. + * @nor: pointer to 'struct spi_nor'. + * + * Return: 1 if ready, 0 if not ready, -errno on errors. + */ +static int spi_nor_sr_ready_and_clear(struct spi_nor *nor) +{ + int ret; + + ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + if (ret) + return ret; + + if (nor->bouncebuf[0] & (SR_E_ERR | SR_P_ERR)) { + if (nor->bouncebuf[0] & SR_E_ERR) + dev_err(nor->dev, "Erase Error occurred\n"); + else + dev_err(nor->dev, "Programming Error occurred\n"); + + spi_nor_clear_sr(nor); + + /* + * WEL bit remains set to one when an erase or page program + * error occurs. Issue a Write Disable command to protect + * against inadvertent writes that can possibly corrupt the + * contents of the memory. + */ + ret =3D spi_nor_write_disable(nor); + if (ret) + return ret; + + return -EIO; + } + + return !(nor->bouncebuf[0] & SR_WIP); +} + static void spansion_nor_late_init(struct spi_nor *nor) { if (nor->params->size > SZ_16M) { @@ -302,6 +369,9 @@ static void spansion_nor_late_init(struct spi_nor *nor) nor->erase_opcode =3D SPINOR_OP_SE; nor->mtd.erasesize =3D nor->info->sector_size; } + + if (nor->flags & SNOR_F_USE_CLSR) + nor->params->ready =3D spi_nor_sr_ready_and_clear; } =20 static const struct spi_nor_fixups spansion_nor_fixups =3D { diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 4622251a79ff..5e25a7b75ae2 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -90,7 +90,6 @@ =20 /* Used for Spansion flashes only. */ #define SPINOR_OP_BRWR 0x17 /* Bank register write */ -#define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */ =20 /* Used for Micron flashes only. */ #define SPINOR_OP_RD_EVCR 0x65 /* Read EVCR register */ --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D87D3C433EF for ; Fri, 18 Feb 2022 11:38:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234758AbiBRLic (ORCPT ); Fri, 18 Feb 2022 06:38:32 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234620AbiBRLgq (ORCPT ); Fri, 18 Feb 2022 06:36:46 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67D322B405C for ; Fri, 18 Feb 2022 03:36:26 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 74854223F7; Fri, 18 Feb 2022 12:36:23 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184183; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FtKn1Ihp9t6RnjfWlSzFiBTXbyszZe5R09mnBy88O24=; b=YeL82QF74DbiffbQh2U81DFlcZoSPAoPVsq05xTcJF/JUpK3qIMI2KRahcqeB43sq4eDO8 zKzh3QfcVI0qYxFdRG8Dt79bdJXS/Y4ZGs7rHwNTZ07aveCPld3czr58dJ3YNQCzI8Jav+ EUZhujb01QTxjutBTY16yaSY8XjBYoQ= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 29/32] mtd: spi-nor: spansion: convert USE_CLSR to a manufacturer flag Date: Fri, 18 Feb 2022 12:36:04 +0100 Message-Id: <20220218113607.1360020-30-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Now that all functions using that flag are local to the spansion module, we can convert the flag to a manufacturer one. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.c | 3 -- drivers/mtd/spi-nor/core.h | 3 -- drivers/mtd/spi-nor/spansion.c | 55 +++++++++++++++++++++------------- 3 files changed, 34 insertions(+), 27 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index e2b8b0a438ce..f5a2f37d140e 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2447,9 +2447,6 @@ static void spi_nor_init_flags(struct spi_nor *nor) =20 if (flags & NO_CHIP_ERASE) nor->flags |=3D SNOR_F_NO_OP_CHIP_ERASE; - - if (flags & USE_CLSR) - nor->flags |=3D SNOR_F_USE_CLSR; } =20 /** diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index a02bf54289fb..2130a96e2044 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -14,7 +14,6 @@ enum spi_nor_option_flags { SNOR_F_HAS_SR_TB =3D BIT(1), SNOR_F_NO_OP_CHIP_ERASE =3D BIT(2), - SNOR_F_USE_CLSR =3D BIT(4), SNOR_F_BROKEN_RESET =3D BIT(5), SNOR_F_4B_OPCODES =3D BIT(6), SNOR_F_HAS_4BAIT =3D BIT(7), @@ -347,7 +346,6 @@ struct spi_nor_fixups { * SPI_NOR_NO_ERASE: no erase command needed. * NO_CHIP_ERASE: chip does not support chip erase. * SPI_NOR_NO_FR: can't do fastread. - * USE_CLSR: use CLSR command. * * @no_sfdp_flags: flags that indicate support that can be discovered via= SFDP. * Used when SFDP tables are not defined in the flash. Th= ese @@ -398,7 +396,6 @@ struct flash_info { #define SPI_NOR_NO_ERASE BIT(6) #define NO_CHIP_ERASE BIT(7) #define SPI_NOR_NO_FR BIT(8) -#define USE_CLSR BIT(9) =20 u8 no_sfdp_flags; #define SPI_NOR_SKIP_SFDP BIT(0) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index f7d781194850..061357790dde 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -8,6 +8,9 @@ =20 #include "core.h" =20 +/* flash_info mfr_flag. Used to clear sticky prorietary SR bits. */ +#define USE_CLSR BIT(0) + #define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */ #define SPINOR_OP_RD_ANY_REG 0x65 /* Read any register */ #define SPINOR_OP_WR_ANY_REG 0x71 /* Write any register */ @@ -212,43 +215,53 @@ static const struct flash_info spansion_nor_parts[] = =3D { { "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128) NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "s25fl128s0", INFO6(0x012018, 0x4d0080, 256 * 1024, 64) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fl256s0", INFO6(0x010219, 0x4d0080, 256 * 1024, 128) - FLAGS(USE_CLSR) NO_SFDP_FLAGS(SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, + SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fl256s1", INFO6(0x010219, 0x4d0180, 64 * 1024, 512) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fl512s", INFO6(0x010220, 0x4d0080, 256 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + FLAGS(SPI_NOR_HAS_LOCK) + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fs128s1", INFO6(0x012018, 0x4d0181, 64 * 1024, 256) - FLAGS(USE_CLSR) NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) .fixups =3D &s25fs_s_fixups, }, { "s25fs256s0", INFO6(0x010219, 0x4d0081, 256 * 1024, 128) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256) - FLAGS(USE_CLSR) NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) .fixups =3D &s25fs_s_fixups, }, { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64) }, { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256) }, { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256) - FLAGS(USE_CLSR) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + MFR_FLAGS(USE_CLSR) + }, { "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8) }, { "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16) }, { "s25sl016a", INFO(0x010214, 0, 64 * 1024, 32) }, @@ -370,7 +383,7 @@ static void spansion_nor_late_init(struct spi_nor *nor) nor->mtd.erasesize =3D nor->info->sector_size; } =20 - if (nor->flags & SNOR_F_USE_CLSR) + if (nor->info->mfr_flags & USE_CLSR) nor->params->ready =3D spi_nor_sr_ready_and_clear; } =20 --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD92EC433F5 for ; Fri, 18 Feb 2022 11:38:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234375AbiBRLim (ORCPT ); Fri, 18 Feb 2022 06:38:42 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234618AbiBRLgq (ORCPT ); Fri, 18 Feb 2022 06:36:46 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 67BF02B3541 for ; Fri, 18 Feb 2022 03:36:26 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id C7977223F6; Fri, 18 Feb 2022 12:36:23 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184183; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xdcZIpvWBK1SBtBZMLbCaAdxmBv2TOoluOo5rcRL+5U=; b=FO8FboQqslYP8X3SyHJNWUYRaDNirmrkkFSgU7B5kIwUmqb8/dXGL/yKrCrYb6a8X6WVwm Q6u0I/hUOXPqtf8A+pfu1iFLFOIXy3YresEGkpL7nibp5Mwpxiq+hUUozwebgmSP47xADV J3/SAiyyA3DU0lN+E37CH/NrYBKkqvw= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 30/32] mtd: spi-nor: spansion: rename vendor specific functions and defines Date: Fri, 18 Feb 2022 12:36:05 +0100 Message-Id: <20220218113607.1360020-31-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Drop the generic spi_nor prefix for all the spansion functions. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/spansion.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 061357790dde..ea695db5a4c4 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -309,10 +309,10 @@ static const struct flash_info spansion_nor_parts[] = =3D { }; =20 /** - * spi_nor_clear_sr() - Clear the Status Register. + * spansion_nor_clear_sr() - Clear the Status Register. * @nor: pointer to 'struct spi_nor'. */ -static void spi_nor_clear_sr(struct spi_nor *nor) +static void spansion_nor_clear_sr(struct spi_nor *nor) { int ret; =20 @@ -336,13 +336,13 @@ static void spi_nor_clear_sr(struct spi_nor *nor) } =20 /** - * spi_nor_sr_ready_and_clear() - Query the Status Register to see if the = flash - * is ready for new commands and clear it. + * spansion_nor_sr_ready_and_clear() - Query the Status Register to see if= the + * flash is ready for new commands and clear it. * @nor: pointer to 'struct spi_nor'. * * Return: 1 if ready, 0 if not ready, -errno on errors. */ -static int spi_nor_sr_ready_and_clear(struct spi_nor *nor) +static int spansion_nor_sr_ready_and_clear(struct spi_nor *nor) { int ret; =20 @@ -356,7 +356,7 @@ static int spi_nor_sr_ready_and_clear(struct spi_nor *n= or) else dev_err(nor->dev, "Programming Error occurred\n"); =20 - spi_nor_clear_sr(nor); + spansion_nor_clear_sr(nor); =20 /* * WEL bit remains set to one when an erase or page program @@ -384,7 +384,7 @@ static void spansion_nor_late_init(struct spi_nor *nor) } =20 if (nor->info->mfr_flags & USE_CLSR) - nor->params->ready =3D spi_nor_sr_ready_and_clear; + nor->params->ready =3D spansion_nor_sr_ready_and_clear; } =20 static const struct spi_nor_fixups spansion_nor_fixups =3D { --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87A01C433F5 for ; Fri, 18 Feb 2022 11:38:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234802AbiBRLit (ORCPT ); Fri, 18 Feb 2022 06:38:49 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44636 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234616AbiBRLgq (ORCPT ); Fri, 18 Feb 2022 06:36:46 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 676D42B1A9D for ; Fri, 18 Feb 2022 03:36:26 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 2249122498; Fri, 18 Feb 2022 12:36:24 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184184; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ckbf6Q/jmsl515Nwvytsj5VQqppc1StpRQJYAIW3rH4=; b=MF5J7O79LefZ8NaAcl6O+82N7aRVdSO/b0qmyetpC0sl22FIcKg7YwXzA9+HN1/LKaNfxm Yivk1Q/o+JEISrtwWyuNzZcT8n6/AwNu/8fTomzmiSAuVLSLGNDmkF7GmC/2nUvHCgbzcQ XA5xfLG8vw6DoGzwoND0poI6ytUBroc= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 31/32] mtd: spi-nor: slightly change code style in spi_nor_sr_ready() Date: Fri, 18 Feb 2022 12:36:06 +0100 Message-Id: <20220218113607.1360020-32-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Now that there is almost no special case code left in spi_nor_sr_ready(), the return check looks odd. Move the function call closer to the return code checking. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index f5a2f37d140e..9014008e60b3 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -563,8 +563,9 @@ int spi_nor_write_ear(struct spi_nor *nor, u8 ear) */ int spi_nor_sr_ready(struct spi_nor *nor) { - int ret =3D spi_nor_read_sr(nor, nor->bouncebuf); + int ret; =20 + ret =3D spi_nor_read_sr(nor, nor->bouncebuf); if (ret) return ret; =20 --=20 2.30.2 From nobody Sat Jun 27 23:19:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD8B1C433EF for ; Fri, 18 Feb 2022 11:38:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233463AbiBRLi2 (ORCPT ); Fri, 18 Feb 2022 06:38:28 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:44690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234595AbiBRLgq (ORCPT ); Fri, 18 Feb 2022 06:36:46 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 675D72B0B09 for ; Fri, 18 Feb 2022 03:36:26 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 87BE822499; Fri, 18 Feb 2022 12:36:24 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1645184184; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BUHjRq3B/3JjsHlcHc+UiOV+3YaaqpA1vvTF3QO9238=; b=lpT1iVQhPXm3vUE9TXeOpRJhoSe99674SILS92fQum4IZi7clBskLLUojHyhI1D5w0S7FO VgGpd9X+eq6kk/UHB1BpjMomIhMwCiKxdm/bw4/ZAHYWoN+iE7f1SD1VrABFvVw0KEyFS9 VrRziIwddC01kSe99qXPEaUDpTNAS5E= From: Michael Walle To: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , yaliang.wang@windriver.com, Michael Walle Subject: [PATCH v2 32/32] mtd: spi-nor: renumber flags Date: Fri, 18 Feb 2022 12:36:07 +0100 Message-Id: <20220218113607.1360020-33-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220218113607.1360020-1-michael@walle.cc> References: <20220218113607.1360020-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" As we have deleted some flag, lets renumber them so there are no holes. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus Reviewed-by: Pratyush Yadav --- drivers/mtd/spi-nor/core.h | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 2130a96e2044..b7fd760e3b47 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -12,20 +12,20 @@ #define SPI_NOR_MAX_ID_LEN 6 =20 enum spi_nor_option_flags { - SNOR_F_HAS_SR_TB =3D BIT(1), - SNOR_F_NO_OP_CHIP_ERASE =3D BIT(2), - SNOR_F_BROKEN_RESET =3D BIT(5), - SNOR_F_4B_OPCODES =3D BIT(6), - SNOR_F_HAS_4BAIT =3D BIT(7), - SNOR_F_HAS_LOCK =3D BIT(8), - SNOR_F_HAS_16BIT_SR =3D BIT(9), - SNOR_F_NO_READ_CR =3D BIT(10), - SNOR_F_HAS_SR_TB_BIT6 =3D BIT(11), - SNOR_F_HAS_4BIT_BP =3D BIT(12), - SNOR_F_HAS_SR_BP3_BIT6 =3D BIT(13), - SNOR_F_IO_MODE_EN_VOLATILE =3D BIT(14), - SNOR_F_SOFT_RESET =3D BIT(15), - SNOR_F_SWP_IS_VOLATILE =3D BIT(16), + SNOR_F_HAS_SR_TB =3D BIT(0), + SNOR_F_NO_OP_CHIP_ERASE =3D BIT(1), + SNOR_F_BROKEN_RESET =3D BIT(2), + SNOR_F_4B_OPCODES =3D BIT(3), + SNOR_F_HAS_4BAIT =3D BIT(4), + SNOR_F_HAS_LOCK =3D BIT(5), + SNOR_F_HAS_16BIT_SR =3D BIT(6), + SNOR_F_NO_READ_CR =3D BIT(7), + SNOR_F_HAS_SR_TB_BIT6 =3D BIT(8), + SNOR_F_HAS_4BIT_BP =3D BIT(9), + SNOR_F_HAS_SR_BP3_BIT6 =3D BIT(10), + SNOR_F_IO_MODE_EN_VOLATILE =3D BIT(11), + SNOR_F_SOFT_RESET =3D BIT(12), + SNOR_F_SWP_IS_VOLATILE =3D BIT(13), }; =20 struct spi_nor_read_command { --=20 2.30.2