From nobody Sun Sep 22 09:27:07 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D94BAC433FE for ; Fri, 18 Feb 2022 09:17:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233358AbiBRJSK (ORCPT ); Fri, 18 Feb 2022 04:18:10 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:59356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233232AbiBRJRM (ORCPT ); Fri, 18 Feb 2022 04:17:12 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9CADC10FD0; Fri, 18 Feb 2022 01:16:54 -0800 (PST) X-UUID: fae9cd7c560b4e168fd4f3cab55fe57e-20220218 X-UUID: fae9cd7c560b4e168fd4f3cab55fe57e-20220218 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1348336215; Fri, 18 Feb 2022 17:16:49 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 18 Feb 2022 17:16:48 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 18 Feb 2022 17:16:48 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , --to=Krzysztof Kozlowski CC: , , , , , Chen-Yu Tsai , Ryder Lee , Allen-KH Cheng Subject: [PATCH v2 13/23] arm64: dts: mt8192: Add mmc device nodes Date: Fri, 18 Feb 2022 17:16:23 +0800 Message-ID: <20220218091633.9368-14-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220218091633.9368-1-allen-kh.cheng@mediatek.com> References: <20220218091633.9368-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add mmc nodes for mt8192 SoC. Signed-off-by: Allen-KH Cheng --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 36 +++++++++++++++++++++--- 1 file changed, 32 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 094805db395b..cfc2db501108 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -1154,10 +1154,38 @@ #clock-cells =3D <1>; }; =20 - msdc: clock-controller@11f60000 { - compatible =3D "mediatek,mt8192-msdc"; - reg =3D <0 0x11f60000 0 0x1000>; - #clock-cells =3D <1>; + mmc0: mmc@11f60000 { + compatible =3D "mediatek,mt8192-mmc", "mediatek,mt8183-mmc"; + reg =3D <0 0x11f60000 0 0x1000>, + <0 0x11f50000 0 0x1000>; + interrupts =3D ; + clocks =3D <&topckgen CLK_TOP_MSDC50_0_SEL>, + <&msdc_top CLK_MSDC_TOP_H_MST_0P>, + <&msdc_top CLK_MSDC_TOP_SRC_0P>, + <&msdc_top CLK_MSDC_TOP_P_CFG>, + <&msdc_top CLK_MSDC_TOP_AXI>, + <&msdc_top CLK_MSDC_TOP_AHB2AXI_BRG_AXI>, + <&msdc_top CLK_MSDC_TOP_P_MSDC0>; + clock-names =3D "source", "hclk", "source_cg", "sys_cg", + "axi_cg", "ahb_cg", "pclk_cg"; + status =3D "disabled"; + }; + + mmc1: mmc@11f70000 { + compatible =3D "mediatek,mt8192-mmc", "mediatek,mt8183-mmc"; + reg =3D <0 0x11f70000 0 0x1000>, + <0 0x11c70000 0 0x1000>; + interrupts =3D ; + clocks =3D <&topckgen CLK_TOP_MSDC30_1_SEL>, + <&msdc_top CLK_MSDC_TOP_H_MST_1P>, + <&msdc_top CLK_MSDC_TOP_SRC_1P>, + <&msdc_top CLK_MSDC_TOP_P_CFG>, + <&msdc_top CLK_MSDC_TOP_AXI>, + <&msdc_top CLK_MSDC_TOP_AHB2AXI_BRG_AXI>, + <&msdc_top CLK_MSDC_TOP_P_MSDC1>; + clock-names =3D "source", "hclk", "source_cg", "sys_cg", + "axi_cg", "ahb_cg", "pclk_cg"; + status =3D "disabled"; }; =20 mfgcfg: clock-controller@13fbf000 { --=20 2.18.0