From nobody Sun Sep 22 09:23:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83F6DC433F5 for ; Thu, 17 Feb 2022 13:41:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241217AbiBQNlY (ORCPT ); Thu, 17 Feb 2022 08:41:24 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:35498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241119AbiBQNlJ (ORCPT ); Thu, 17 Feb 2022 08:41:09 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 134F52B0483; Thu, 17 Feb 2022 05:40:46 -0800 (PST) X-UUID: daf0c277bd7045d3841f1dc65923301b-20220217 X-UUID: daf0c277bd7045d3841f1dc65923301b-20220217 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 480523759; Thu, 17 Feb 2022 21:40:44 +0800 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Thu, 17 Feb 2022 21:40:43 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 17 Feb 2022 21:40:43 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 17 Feb 2022 21:40:42 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , --to=Krzysztof Kozlowski CC: , , , , , "Chen-Yu Tsai" , Ryder Lee , Allen-KH Cheng Subject: [PATCH 08/17] arm64: dts: mt8192: Add PCIe node Date: Thu, 17 Feb 2022 21:40:26 +0800 Message-ID: <20220217134027.508-9-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220217134027.508-1-allen-kh.cheng@mediatek.com> References: <20220217134027.508-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add PCIe node for mt8192 SoC. Signed-off-by: Allen-KH Cheng --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 38 ++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 92262a67ef68..723bfdc3a1aa 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -870,6 +870,44 @@ }; }; =20 + pcie: pcie@11230000 { + compatible =3D "mediatek,mt8192-pcie"; + device_type =3D "pci"; + reg =3D <0 0x11230000 0 0x2000>; + reg-names =3D "pcie-mac"; + #address-cells =3D <3>; + #size-cells =3D <2>; + clocks =3D <&infracfg CLK_INFRA_PCIE_TL_26M>, + <&infracfg CLK_INFRA_PCIE_TL_96M>, + <&infracfg CLK_INFRA_PCIE_TL_32K>, + <&infracfg CLK_INFRA_PCIE_PERI_26M>, + <&infracfg CLK_INFRA_PCIE_TOP_H_133M>, + <&infracfg CLK_INFRA_PCIE_PL_P_250M>; + clock-names =3D "sys_ck0", "ahb_ck0", "aux_ck0", + "obff_ck0", "axi_ck0", "pipe_ck0"; + assigned-clocks =3D <&topckgen CLK_TOP_TL_SEL>; + assigned-clock-parents =3D <&topckgen CLK_TOP_MAINPLL_D6_D4>; + resets =3D <&infracfg_rst 2>, + <&infracfg_rst 3>; + reset-names =3D "phy", "mac"; + interrupts =3D ; + bus-range =3D <0x00 0xff>; + ranges =3D <0x82000000 0 0x12000000 0x0 0x12000000 0 0x0800000>, + <0x81000000 0 0x12800000 0x0 0x12800000 0 0x0800000>; + + #interrupt-cells =3D <1>; + interrupt-map-mask =3D <0 0 0 7>; + interrupt-map =3D <0 0 0 1 &pcie_intc0 0>, + <0 0 0 2 &pcie_intc0 1>, + <0 0 0 3 &pcie_intc0 2>, + <0 0 0 4 &pcie_intc0 3>; + pcie_intc0: interrupt-controller { + interrupt-controller; + #address-cells =3D <0>; + #interrupt-cells =3D <1>; + }; + }; + nor_flash: spi@11234000 { compatible =3D "mediatek,mt8192-nor"; reg =3D <0 0x11234000 0 0xe0>; --=20 2.18.0