From nobody Sun Sep 22 09:31:35 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EFD29C433F5 for ; Thu, 17 Feb 2022 13:41:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241172AbiBQNla (ORCPT ); Thu, 17 Feb 2022 08:41:30 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:35450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241102AbiBQNlI (ORCPT ); Thu, 17 Feb 2022 08:41:08 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 76A4A2AFEBF; Thu, 17 Feb 2022 05:40:46 -0800 (PST) X-UUID: cc69676a449446c987785daf569bf724-20220217 X-UUID: cc69676a449446c987785daf569bf724-20220217 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 620692942; Thu, 17 Feb 2022 21:40:42 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Thu, 17 Feb 2022 21:40:40 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 17 Feb 2022 21:40:40 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , --to=Krzysztof Kozlowski CC: , , , , , "Chen-Yu Tsai" , Ryder Lee , Allen-KH Cheng Subject: [PATCH 06/17] arm64: dts: mt8192: Add xhci node Date: Thu, 17 Feb 2022 21:40:24 +0800 Message-ID: <20220217134027.508-7-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220217134027.508-1-allen-kh.cheng@mediatek.com> References: <20220217134027.508-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add xhci node for mt8192 SoC. Signed-off-by: Allen-KH Cheng --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 9d9bb67bc65d..d56ac78620ee 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include #include =20 / { @@ -717,6 +718,30 @@ status =3D "disabled"; }; =20 + xhci: xhci@11200000 { + compatible =3D "mediatek,mt8192-xhci", + "mediatek,mtk-xhci"; + reg =3D <0 0x11200000 0 0x1000>, + <0 0x11203e00 0 0x0100>; + reg-names =3D "mac", "ippc"; + interrupts-extended =3D <&gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names =3D "host"; + phys =3D <&u2port0 PHY_TYPE_USB2>, + <&u3port0 PHY_TYPE_USB3>; + assigned-clocks =3D <&topckgen CLK_TOP_USB_TOP_SEL>, + <&topckgen CLK_TOP_SSUSB_XHCI_SEL>; + assigned-clock-parents =3D <&topckgen CLK_TOP_UNIVPLL_D5_D4>, + <&topckgen CLK_TOP_UNIVPLL_D5_D4>; + clocks =3D <&infracfg CLK_INFRA_SSUSB>, + <&infracfg CLK_INFRA_SSUSB_XHCI>, + <&apmixedsys CLK_APMIXED_USBPLL>; + clock-names =3D "sys_ck", "xhci_ck", "ref_ck"; + wakeup-source; + mediatek,syscon-wakeup =3D <&pericfg 0x420 102>; + #address-cells =3D <2>; + #size-cells =3D <2>; + }; + nor_flash: spi@11234000 { compatible =3D "mediatek,mt8192-nor"; reg =3D <0 0x11234000 0 0xe0>; --=20 2.18.0