From nobody Sun Sep 22 09:41:08 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 410A5C43217 for ; Thu, 17 Feb 2022 13:41:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241158AbiBQNlM (ORCPT ); Thu, 17 Feb 2022 08:41:12 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:35370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236309AbiBQNlF (ORCPT ); Thu, 17 Feb 2022 08:41:05 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 141192AFE90; Thu, 17 Feb 2022 05:40:37 -0800 (PST) X-UUID: d954cd93e4854c6a8420958b4d747425-20220217 X-UUID: d954cd93e4854c6a8420958b4d747425-20220217 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1162966695; Thu, 17 Feb 2022 21:40:35 +0800 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 17 Feb 2022 21:40:34 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 17 Feb 2022 21:40:33 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 17 Feb 2022 21:40:33 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , --to=Krzysztof Kozlowski CC: , , , , , "Chen-Yu Tsai" , Ryder Lee , Allen-KH Cheng Subject: [PATCH 02/17] arm64: dts: mt8192: add pwrap node Date: Thu, 17 Feb 2022 21:40:20 +0800 Message-ID: <20220217134027.508-3-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220217134027.508-1-allen-kh.cheng@mediatek.com> References: <20220217134027.508-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add pwrap node for mt8192 SoC. Signed-off-by: Allen-KH Cheng --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index f10a9c75b20c..f58a13b10916 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -523,6 +523,18 @@ clock-names =3D "clk13m"; }; =20 + pwrap: pwrap@10026000 { + compatible =3D "mediatek,mt6873-pwrap"; + reg =3D <0 0x10026000 0 0x1000>; + reg-names =3D "pwrap"; + interrupts =3D ; + clocks =3D <&infracfg CLK_INFRA_PMIC_AP>, + <&infracfg CLK_INFRA_PMIC_TMR>; + clock-names =3D "spi", "wrap"; + assigned-clocks =3D <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>; + assigned-clock-parents =3D <&topckgen CLK_TOP_OSC_D10>; + }; + scp_adsp: clock-controller@10720000 { compatible =3D "mediatek,mt8192-scp_adsp"; reg =3D <0 0x10720000 0 0x1000>; --=20 2.18.0