From nobody Sun Sep 22 09:21:25 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F4DBC433F5 for ; Thu, 17 Feb 2022 11:39:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239533AbiBQLj7 (ORCPT ); Thu, 17 Feb 2022 06:39:59 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:55770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239717AbiBQLjw (ORCPT ); Thu, 17 Feb 2022 06:39:52 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B941199EC7; Thu, 17 Feb 2022 03:39:29 -0800 (PST) X-UUID: 0999b9781dcb44d197f6d29859b618d5-20220217 X-UUID: 0999b9781dcb44d197f6d29859b618d5-20220217 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1604124115; Thu, 17 Feb 2022 19:39:26 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Thu, 17 Feb 2022 19:39:24 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 17 Feb 2022 19:39:23 +0800 From: Yong Wu To: Joerg Roedel , Rob Herring , "Matthias Brugger" , Will Deacon CC: Robin Murphy , Krzysztof Kozlowski , Tomasz Figa , , , , , , , Hsin-Yi Wang , , , , , , "AngeloGioacchino Del Regno" , , , , Subject: [PATCH v5 27/34] iommu/mediatek-v1: Just rename mtk_iommu to mtk_iommu_v1 Date: Thu, 17 Feb 2022 19:34:46 +0800 Message-ID: <20220217113453.13658-28-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220217113453.13658-1-yong.wu@mediatek.com> References: <20220217113453.13658-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" No functional change. Just rename this for readable. Differentiate this from mtk_iommu.c Signed-off-by: Yong Wu Reviewed-by: AngeloGioacchino Del Regno --- drivers/iommu/mtk_iommu_v1.c | 211 +++++++++++++++++------------------ 1 file changed, 103 insertions(+), 108 deletions(-) diff --git a/drivers/iommu/mtk_iommu_v1.c b/drivers/iommu/mtk_iommu_v1.c index 96facaff6d96..29d1bc14ebf1 100644 --- a/drivers/iommu/mtk_iommu_v1.c +++ b/drivers/iommu/mtk_iommu_v1.c @@ -85,34 +85,34 @@ */ #define M2701_IOMMU_PGT_SIZE SZ_4M =20 -struct mtk_iommu_suspend_reg { +struct mtk_iommu_v1_suspend_reg { u32 standard_axi_mode; u32 dcm_dis; u32 ctrl_reg; u32 int_control0; }; =20 -struct mtk_iommu_data { +struct mtk_iommu_v1_data { void __iomem *base; int irq; struct device *dev; struct clk *bclk; phys_addr_t protect_base; /* protect memory base */ - struct mtk_iommu_domain *m4u_dom; + struct mtk_iommu_v1_domain *m4u_dom; =20 struct iommu_device iommu; struct dma_iommu_mapping *mapping; struct mtk_smi_larb_iommu larb_imu[MTK_LARB_NR_MAX]; =20 - struct mtk_iommu_suspend_reg reg; + struct mtk_iommu_v1_suspend_reg reg; }; =20 -struct mtk_iommu_domain { +struct mtk_iommu_v1_domain { spinlock_t pgtlock; /* lock for page table */ struct iommu_domain domain; u32 *pgt_va; dma_addr_t pgt_pa; - struct mtk_iommu_data *data; + struct mtk_iommu_v1_data *data; }; =20 static int compare_of(struct device *dev, void *data) @@ -125,23 +125,23 @@ static void release_of(struct device *dev, void *data) of_node_put(data); } =20 -static int mtk_iommu_bind(struct device *dev) +static int mtk_iommu_v1_bind(struct device *dev) { - struct mtk_iommu_data *data =3D dev_get_drvdata(dev); + struct mtk_iommu_v1_data *data =3D dev_get_drvdata(dev); =20 return component_bind_all(dev, &data->larb_imu); } =20 -static void mtk_iommu_unbind(struct device *dev) +static void mtk_iommu_v1_unbind(struct device *dev) { - struct mtk_iommu_data *data =3D dev_get_drvdata(dev); + struct mtk_iommu_v1_data *data =3D dev_get_drvdata(dev); =20 component_unbind_all(dev, &data->larb_imu); } =20 -static struct mtk_iommu_domain *to_mtk_domain(struct iommu_domain *dom) +static struct mtk_iommu_v1_domain *to_mtk_domain(struct iommu_domain *dom) { - return container_of(dom, struct mtk_iommu_domain, domain); + return container_of(dom, struct mtk_iommu_v1_domain, domain); } =20 static const int mt2701_m4u_in_larb[] =3D { @@ -167,7 +167,7 @@ static inline int mt2701_m4u_to_port(int id) return id - mt2701_m4u_in_larb[larb]; } =20 -static void mtk_iommu_tlb_flush_all(struct mtk_iommu_data *data) +static void mtk_iommu_v1_tlb_flush_all(struct mtk_iommu_v1_data *data) { writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0, data->base + REG_MMU_INV_SEL); @@ -175,8 +175,8 @@ static void mtk_iommu_tlb_flush_all(struct mtk_iommu_da= ta *data) wmb(); /* Make sure the tlb flush all done */ } =20 -static void mtk_iommu_tlb_flush_range(struct mtk_iommu_data *data, - unsigned long iova, size_t size) +static void mtk_iommu_v1_tlb_flush_range(struct mtk_iommu_v1_data *data, + unsigned long iova, size_t size) { int ret; u32 tmp; @@ -194,16 +194,16 @@ static void mtk_iommu_tlb_flush_range(struct mtk_iomm= u_data *data, if (ret) { dev_warn(data->dev, "Partial TLB flush timed out, falling back to full flush\n"); - mtk_iommu_tlb_flush_all(data); + mtk_iommu_v1_tlb_flush_all(data); } /* Clear the CPE status */ writel_relaxed(0, data->base + REG_MMU_CPE_DONE); } =20 -static irqreturn_t mtk_iommu_isr(int irq, void *dev_id) +static irqreturn_t mtk_iommu_v1_isr(int irq, void *dev_id) { - struct mtk_iommu_data *data =3D dev_id; - struct mtk_iommu_domain *dom =3D data->m4u_dom; + struct mtk_iommu_v1_data *data =3D dev_id; + struct mtk_iommu_v1_domain *dom =3D data->m4u_dom; u32 int_state, regval, fault_iova, fault_pa; unsigned int fault_larb, fault_port; =20 @@ -233,13 +233,13 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_i= d) regval |=3D F_INT_CLR_BIT; writel_relaxed(regval, data->base + REG_MMU_INT_CONTROL); =20 - mtk_iommu_tlb_flush_all(data); + mtk_iommu_v1_tlb_flush_all(data); =20 return IRQ_HANDLED; } =20 -static void mtk_iommu_config(struct mtk_iommu_data *data, - struct device *dev, bool enable) +static void mtk_iommu_v1_config(struct mtk_iommu_v1_data *data, + struct device *dev, bool enable) { struct mtk_smi_larb_iommu *larb_mmu; unsigned int larbid, portid; @@ -261,9 +261,9 @@ static void mtk_iommu_config(struct mtk_iommu_data *dat= a, } } =20 -static int mtk_iommu_domain_finalise(struct mtk_iommu_data *data) +static int mtk_iommu_v1_domain_finalise(struct mtk_iommu_v1_data *data) { - struct mtk_iommu_domain *dom =3D data->m4u_dom; + struct mtk_iommu_v1_domain *dom =3D data->m4u_dom; =20 spin_lock_init(&dom->pgtlock); =20 @@ -279,9 +279,9 @@ static int mtk_iommu_domain_finalise(struct mtk_iommu_d= ata *data) return 0; } =20 -static struct iommu_domain *mtk_iommu_domain_alloc(unsigned type) +static struct iommu_domain *mtk_iommu_v1_domain_alloc(unsigned type) { - struct mtk_iommu_domain *dom; + struct mtk_iommu_v1_domain *dom; =20 if (type !=3D IOMMU_DOMAIN_UNMANAGED) return NULL; @@ -293,21 +293,20 @@ static struct iommu_domain *mtk_iommu_domain_alloc(un= signed type) return &dom->domain; } =20 -static void mtk_iommu_domain_free(struct iommu_domain *domain) +static void mtk_iommu_v1_domain_free(struct iommu_domain *domain) { - struct mtk_iommu_domain *dom =3D to_mtk_domain(domain); - struct mtk_iommu_data *data =3D dom->data; + struct mtk_iommu_v1_domain *dom =3D to_mtk_domain(domain); + struct mtk_iommu_v1_data *data =3D dom->data; =20 dma_free_coherent(data->dev, M2701_IOMMU_PGT_SIZE, dom->pgt_va, dom->pgt_pa); kfree(to_mtk_domain(domain)); } =20 -static int mtk_iommu_attach_device(struct iommu_domain *domain, - struct device *dev) +static int mtk_iommu_v1_attach_device(struct iommu_domain *domain, struct = device *dev) { - struct mtk_iommu_data *data =3D dev_iommu_priv_get(dev); - struct mtk_iommu_domain *dom =3D to_mtk_domain(domain); + struct mtk_iommu_v1_data *data =3D dev_iommu_priv_get(dev); + struct mtk_iommu_v1_domain *dom =3D to_mtk_domain(domain); struct dma_iommu_mapping *mtk_mapping; int ret; =20 @@ -318,29 +317,28 @@ static int mtk_iommu_attach_device(struct iommu_domai= n *domain, =20 if (!data->m4u_dom) { data->m4u_dom =3D dom; - ret =3D mtk_iommu_domain_finalise(data); + ret =3D mtk_iommu_v1_domain_finalise(data); if (ret) { data->m4u_dom =3D NULL; return ret; } } =20 - mtk_iommu_config(data, dev, true); + mtk_iommu_v1_config(data, dev, true); return 0; } =20 -static void mtk_iommu_detach_device(struct iommu_domain *domain, - struct device *dev) +static void mtk_iommu_v1_detach_device(struct iommu_domain *domain, struct= device *dev) { - struct mtk_iommu_data *data =3D dev_iommu_priv_get(dev); + struct mtk_iommu_v1_data *data =3D dev_iommu_priv_get(dev); =20 - mtk_iommu_config(data, dev, false); + mtk_iommu_v1_config(data, dev, false); } =20 -static int mtk_iommu_map(struct iommu_domain *domain, unsigned long iova, - phys_addr_t paddr, size_t size, int prot, gfp_t gfp) +static int mtk_iommu_v1_map(struct iommu_domain *domain, unsigned long iov= a, + phys_addr_t paddr, size_t size, int prot, gfp_t gfp) { - struct mtk_iommu_domain *dom =3D to_mtk_domain(domain); + struct mtk_iommu_v1_domain *dom =3D to_mtk_domain(domain); unsigned int page_num =3D size >> MT2701_IOMMU_PAGE_SHIFT; unsigned long flags; unsigned int i; @@ -361,16 +359,15 @@ static int mtk_iommu_map(struct iommu_domain *domain,= unsigned long iova, =20 spin_unlock_irqrestore(&dom->pgtlock, flags); =20 - mtk_iommu_tlb_flush_range(dom->data, iova, size); + mtk_iommu_v1_tlb_flush_range(dom->data, iova, size); =20 return map_size =3D=3D size ? 0 : -EEXIST; } =20 -static size_t mtk_iommu_unmap(struct iommu_domain *domain, - unsigned long iova, size_t size, - struct iommu_iotlb_gather *gather) +static size_t mtk_iommu_v1_unmap(struct iommu_domain *domain, unsigned lon= g iova, + size_t size, struct iommu_iotlb_gather *gather) { - struct mtk_iommu_domain *dom =3D to_mtk_domain(domain); + struct mtk_iommu_v1_domain *dom =3D to_mtk_domain(domain); unsigned long flags; u32 *pgt_base_iova =3D dom->pgt_va + (iova >> MT2701_IOMMU_PAGE_SHIFT); unsigned int page_num =3D size >> MT2701_IOMMU_PAGE_SHIFT; @@ -379,15 +376,14 @@ static size_t mtk_iommu_unmap(struct iommu_domain *do= main, memset(pgt_base_iova, 0, page_num * sizeof(u32)); spin_unlock_irqrestore(&dom->pgtlock, flags); =20 - mtk_iommu_tlb_flush_range(dom->data, iova, size); + mtk_iommu_v1_tlb_flush_range(dom->data, iova, size); =20 return size; } =20 -static phys_addr_t mtk_iommu_iova_to_phys(struct iommu_domain *domain, - dma_addr_t iova) +static phys_addr_t mtk_iommu_v1_iova_to_phys(struct iommu_domain *domain, = dma_addr_t iova) { - struct mtk_iommu_domain *dom =3D to_mtk_domain(domain); + struct mtk_iommu_v1_domain *dom =3D to_mtk_domain(domain); unsigned long flags; phys_addr_t pa; =20 @@ -399,17 +395,16 @@ static phys_addr_t mtk_iommu_iova_to_phys(struct iomm= u_domain *domain, return pa; } =20 -static const struct iommu_ops mtk_iommu_ops; +static const struct iommu_ops mtk_iommu_v1_ops; =20 /* * MTK generation one iommu HW only support one iommu domain, and all the = client * sharing the same iova address space. */ -static int mtk_iommu_create_mapping(struct device *dev, - struct of_phandle_args *args) +static int mtk_iommu_v1_create_mapping(struct device *dev, struct of_phand= le_args *args) { struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); - struct mtk_iommu_data *data; + struct mtk_iommu_v1_data *data; struct platform_device *m4updev; struct dma_iommu_mapping *mtk_mapping; int ret; @@ -421,11 +416,11 @@ static int mtk_iommu_create_mapping(struct device *de= v, } =20 if (!fwspec) { - ret =3D iommu_fwspec_init(dev, &args->np->fwnode, &mtk_iommu_ops); + ret =3D iommu_fwspec_init(dev, &args->np->fwnode, &mtk_iommu_v1_ops); if (ret) return ret; fwspec =3D dev_iommu_fwspec_get(dev); - } else if (dev_iommu_fwspec_get(dev)->ops !=3D &mtk_iommu_ops) { + } else if (dev_iommu_fwspec_get(dev)->ops !=3D &mtk_iommu_v1_ops) { return -EINVAL; } =20 @@ -457,16 +452,16 @@ static int mtk_iommu_create_mapping(struct device *de= v, return 0; } =20 -static int mtk_iommu_def_domain_type(struct device *dev) +static int mtk_iommu_v1_def_domain_type(struct device *dev) { return IOMMU_DOMAIN_UNMANAGED; } =20 -static struct iommu_device *mtk_iommu_probe_device(struct device *dev) +static struct iommu_device *mtk_iommu_v1_probe_device(struct device *dev) { struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); struct of_phandle_args iommu_spec; - struct mtk_iommu_data *data; + struct mtk_iommu_v1_data *data; int err, idx =3D 0, larbid, larbidx; struct device_link *link; struct device *larbdev; @@ -484,7 +479,7 @@ static struct iommu_device *mtk_iommu_probe_device(stru= ct device *dev) "#iommu-cells", idx, &iommu_spec)) { =20 - err =3D mtk_iommu_create_mapping(dev, &iommu_spec); + err =3D mtk_iommu_v1_create_mapping(dev, &iommu_spec); of_node_put(iommu_spec.np); if (err) return ERR_PTR(err); @@ -494,7 +489,7 @@ static struct iommu_device *mtk_iommu_probe_device(stru= ct device *dev) idx++; } =20 - if (!fwspec || fwspec->ops !=3D &mtk_iommu_ops) + if (!fwspec || fwspec->ops !=3D &mtk_iommu_v1_ops) return ERR_PTR(-ENODEV); /* Not a iommu client device */ =20 data =3D dev_iommu_priv_get(dev); @@ -519,10 +514,10 @@ static struct iommu_device *mtk_iommu_probe_device(st= ruct device *dev) return &data->iommu; } =20 -static void mtk_iommu_probe_finalize(struct device *dev) +static void mtk_iommu_v1_probe_finalize(struct device *dev) { struct dma_iommu_mapping *mtk_mapping; - struct mtk_iommu_data *data; + struct mtk_iommu_v1_data *data; int err; =20 data =3D dev_iommu_priv_get(dev); @@ -533,14 +528,14 @@ static void mtk_iommu_probe_finalize(struct device *d= ev) dev_err(dev, "Can't create IOMMU mapping - DMA-OPS will not work\n"); } =20 -static void mtk_iommu_release_device(struct device *dev) +static void mtk_iommu_v1_release_device(struct device *dev) { struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); - struct mtk_iommu_data *data; + struct mtk_iommu_v1_data *data; struct device *larbdev; unsigned int larbid; =20 - if (!fwspec || fwspec->ops !=3D &mtk_iommu_ops) + if (!fwspec || fwspec->ops !=3D &mtk_iommu_v1_ops) return; =20 data =3D dev_iommu_priv_get(dev); @@ -551,7 +546,7 @@ static void mtk_iommu_release_device(struct device *dev) iommu_fwspec_free(dev); } =20 -static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) +static int mtk_iommu_v1_hw_init(const struct mtk_iommu_v1_data *data) { u32 regval; int ret; @@ -581,7 +576,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_dat= a *data) =20 writel_relaxed(F_MMU_DCM_ON, data->base + REG_MMU_DCM); =20 - if (devm_request_irq(data->dev, data->irq, mtk_iommu_isr, 0, + if (devm_request_irq(data->dev, data->irq, mtk_iommu_v1_isr, 0, dev_name(data->dev), (void *)data)) { writel_relaxed(0, data->base + REG_MMU_PT_BASE_ADDR); clk_disable_unprepare(data->bclk); @@ -592,36 +587,36 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_d= ata *data) return 0; } =20 -static const struct iommu_ops mtk_iommu_ops =3D { - .domain_alloc =3D mtk_iommu_domain_alloc, - .domain_free =3D mtk_iommu_domain_free, - .attach_dev =3D mtk_iommu_attach_device, - .detach_dev =3D mtk_iommu_detach_device, - .map =3D mtk_iommu_map, - .unmap =3D mtk_iommu_unmap, - .iova_to_phys =3D mtk_iommu_iova_to_phys, - .probe_device =3D mtk_iommu_probe_device, - .probe_finalize =3D mtk_iommu_probe_finalize, - .release_device =3D mtk_iommu_release_device, - .def_domain_type =3D mtk_iommu_def_domain_type, +static const struct iommu_ops mtk_iommu_v1_ops =3D { + .domain_alloc =3D mtk_iommu_v1_domain_alloc, + .domain_free =3D mtk_iommu_v1_domain_free, + .attach_dev =3D mtk_iommu_v1_attach_device, + .detach_dev =3D mtk_iommu_v1_detach_device, + .map =3D mtk_iommu_v1_map, + .unmap =3D mtk_iommu_v1_unmap, + .iova_to_phys =3D mtk_iommu_v1_iova_to_phys, + .probe_device =3D mtk_iommu_v1_probe_device, + .probe_finalize =3D mtk_iommu_v1_probe_finalize, + .release_device =3D mtk_iommu_v1_release_device, + .def_domain_type =3D mtk_iommu_v1_def_domain_type, .device_group =3D generic_device_group, .pgsize_bitmap =3D ~0UL << MT2701_IOMMU_PAGE_SHIFT, .owner =3D THIS_MODULE, }; =20 -static const struct of_device_id mtk_iommu_of_ids[] =3D { +static const struct of_device_id mtk_iommu_v1_of_ids[] =3D { { .compatible =3D "mediatek,mt2701-m4u", }, {} }; =20 -static const struct component_master_ops mtk_iommu_com_ops =3D { - .bind =3D mtk_iommu_bind, - .unbind =3D mtk_iommu_unbind, +static const struct component_master_ops mtk_iommu_v1_com_ops =3D { + .bind =3D mtk_iommu_v1_bind, + .unbind =3D mtk_iommu_v1_unbind, }; =20 -static int mtk_iommu_probe(struct platform_device *pdev) +static int mtk_iommu_v1_probe(struct platform_device *pdev) { - struct mtk_iommu_data *data; + struct mtk_iommu_v1_data *data; struct device *dev =3D &pdev->dev; struct resource *res; struct component_match *match =3D NULL; @@ -689,7 +684,7 @@ static int mtk_iommu_probe(struct platform_device *pdev) =20 platform_set_drvdata(pdev, data); =20 - ret =3D mtk_iommu_hw_init(data); + ret =3D mtk_iommu_v1_hw_init(data); if (ret) return ret; =20 @@ -698,17 +693,17 @@ static int mtk_iommu_probe(struct platform_device *pd= ev) if (ret) return ret; =20 - ret =3D iommu_device_register(&data->iommu, &mtk_iommu_ops, dev); + ret =3D iommu_device_register(&data->iommu, &mtk_iommu_v1_ops, dev); if (ret) goto out_sysfs_remove; =20 if (!iommu_present(&platform_bus_type)) { - ret =3D bus_set_iommu(&platform_bus_type, &mtk_iommu_ops); + ret =3D bus_set_iommu(&platform_bus_type, &mtk_iommu_v1_ops); if (ret) goto out_dev_unreg; } =20 - ret =3D component_master_add_with_match(dev, &mtk_iommu_com_ops, match); + ret =3D component_master_add_with_match(dev, &mtk_iommu_v1_com_ops, match= ); if (ret) goto out_bus_set_null; return ret; @@ -722,9 +717,9 @@ static int mtk_iommu_probe(struct platform_device *pdev) return ret; } =20 -static int mtk_iommu_remove(struct platform_device *pdev) +static int mtk_iommu_v1_remove(struct platform_device *pdev) { - struct mtk_iommu_data *data =3D platform_get_drvdata(pdev); + struct mtk_iommu_v1_data *data =3D platform_get_drvdata(pdev); =20 iommu_device_sysfs_remove(&data->iommu); iommu_device_unregister(&data->iommu); @@ -734,14 +729,14 @@ static int mtk_iommu_remove(struct platform_device *p= dev) =20 clk_disable_unprepare(data->bclk); devm_free_irq(&pdev->dev, data->irq, data); - component_master_del(&pdev->dev, &mtk_iommu_com_ops); + component_master_del(&pdev->dev, &mtk_iommu_v1_com_ops); return 0; } =20 -static int __maybe_unused mtk_iommu_suspend(struct device *dev) +static int __maybe_unused mtk_iommu_v1_suspend(struct device *dev) { - struct mtk_iommu_data *data =3D dev_get_drvdata(dev); - struct mtk_iommu_suspend_reg *reg =3D &data->reg; + struct mtk_iommu_v1_data *data =3D dev_get_drvdata(dev); + struct mtk_iommu_v1_suspend_reg *reg =3D &data->reg; void __iomem *base =3D data->base; =20 reg->standard_axi_mode =3D readl_relaxed(base + @@ -752,10 +747,10 @@ static int __maybe_unused mtk_iommu_suspend(struct de= vice *dev) return 0; } =20 -static int __maybe_unused mtk_iommu_resume(struct device *dev) +static int __maybe_unused mtk_iommu_v1_resume(struct device *dev) { - struct mtk_iommu_data *data =3D dev_get_drvdata(dev); - struct mtk_iommu_suspend_reg *reg =3D &data->reg; + struct mtk_iommu_v1_data *data =3D dev_get_drvdata(dev); + struct mtk_iommu_v1_suspend_reg *reg =3D &data->reg; void __iomem *base =3D data->base; =20 writel_relaxed(data->m4u_dom->pgt_pa, base + REG_MMU_PT_BASE_ADDR); @@ -768,20 +763,20 @@ static int __maybe_unused mtk_iommu_resume(struct dev= ice *dev) return 0; } =20 -static const struct dev_pm_ops mtk_iommu_pm_ops =3D { - SET_SYSTEM_SLEEP_PM_OPS(mtk_iommu_suspend, mtk_iommu_resume) +static const struct dev_pm_ops mtk_iommu_v1_pm_ops =3D { + SET_SYSTEM_SLEEP_PM_OPS(mtk_iommu_v1_suspend, mtk_iommu_v1_resume) }; =20 -static struct platform_driver mtk_iommu_driver =3D { - .probe =3D mtk_iommu_probe, - .remove =3D mtk_iommu_remove, +static struct platform_driver mtk_iommu_v1_driver =3D { + .probe =3D mtk_iommu_v1_probe, + .remove =3D mtk_iommu_v1_remove, .driver =3D { .name =3D "mtk-iommu-v1", - .of_match_table =3D mtk_iommu_of_ids, - .pm =3D &mtk_iommu_pm_ops, + .of_match_table =3D mtk_iommu_v1_of_ids, + .pm =3D &mtk_iommu_v1_pm_ops, } }; -module_platform_driver(mtk_iommu_driver); +module_platform_driver(mtk_iommu_v1_driver); =20 MODULE_DESCRIPTION("IOMMU API for MediaTek M4U v1 implementations"); MODULE_LICENSE("GPL v2"); --=20 2.18.0