From nobody Sun Sep 22 09:24:49 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66ECCC433F5 for ; Thu, 17 Feb 2022 08:27:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237537AbiBQI1R (ORCPT ); Thu, 17 Feb 2022 03:27:17 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:56174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237513AbiBQI1O (ORCPT ); Thu, 17 Feb 2022 03:27:14 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44B761C4553 for ; Thu, 17 Feb 2022 00:27:00 -0800 (PST) X-UUID: af083f50126d49318ce77df98ef42fff-20220217 X-UUID: af083f50126d49318ce77df98ef42fff-20220217 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 304949106; Thu, 17 Feb 2022 16:26:57 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 17 Feb 2022 16:26:55 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 17 Feb 2022 16:26:55 +0800 From: Rex-BC Chen To: CC: , , , , , , , , Rex-BC Chen Subject: [PATCH v2,2/2] soc: mediatek: mmsys: add mmsys reset control for MT8186 Date: Thu, 17 Feb 2022 16:26:26 +0800 Message-ID: <20220217082626.15728-3-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220217082626.15728-1-rex-bc.chen@mediatek.com> References: <20220217082626.15728-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add mmsys reset control register 0x160 for MT8186. Signed-off-by: Rex-BC Chen --- drivers/soc/mediatek/mt8186-mmsys.h | 2 ++ drivers/soc/mediatek/mtk-mmsys.c | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/soc/mediatek/mt8186-mmsys.h b/drivers/soc/mediatek/mt8= 186-mmsys.h index 7de329f2d729..c72ccf86ea28 100644 --- a/drivers/soc/mediatek/mt8186-mmsys.h +++ b/drivers/soc/mediatek/mt8186-mmsys.h @@ -52,6 +52,8 @@ #define MT8186_DPI0_FROM_DITHER0 1 #define MT8186_DPI0_FROM_RDMA0 2 =20 +#define MT8186_MMSYS_SW0_RST_B 0x160 + static const struct mtk_mmsys_routes mmsys_mt8186_routing_table[] =3D { { DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0, diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mm= sys.c index cab62c3eac05..4fc4c2c9ea20 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -63,6 +63,7 @@ static const struct mtk_mmsys_driver_data mt8186_mmsys_dr= iver_data =3D { .clk_driver =3D "clk-mt8186-mm", .routes =3D mmsys_mt8186_routing_table, .num_routes =3D ARRAY_SIZE(mmsys_mt8186_routing_table), + .sw0_rst_offset =3D MT8186_MMSYS_SW0_RST_B, }; =20 static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data =3D { --=20 2.18.0