From nobody Fri Dec 19 19:16:16 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C695C433F5 for ; Wed, 16 Feb 2022 10:27:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229900AbiBPK2G (ORCPT ); Wed, 16 Feb 2022 05:28:06 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:50076 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232878AbiBPK1H (ORCPT ); Wed, 16 Feb 2022 05:27:07 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 290FE21289A; Wed, 16 Feb 2022 02:26:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1645007215; x=1676543215; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=V0d+C3vc5G9JbEfQ78M7Sy5UGKqgtaF7SoqfhDcrxkU=; b=QJTeJjbwxwvaWL6KR6P5fukf7GbAJeEjRnbuharu39CK5S4IaHUpuLmR gyf2hFiXZA33W8qOYzo5+0BTBbn1BhSIf2gUA409u5qqrWn1CaQ6hZAv2 DgdZ3x/wZQt4Gpi1R6bAZAU6AMVxpQYMCQujq876Jx+Up83cGaiuFzZ0X nRSPJy6WFkcKNc31435IBazItFO9+8a1puYhuQW0pAMTNnTtYFbY6d/7H itxtp3eBmZg1PyPst05f1XBdlRjKPqTexClGoZ8+5/ZDmnj3CZupf5ILA Kkuwh+h3VF24WIwP4K5fTle0Yu4bATcxMXGzp/VfyJZUPIKu12vjEDZ0E Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10259"; a="250312480" X-IronPort-AV: E=Sophos;i="5.88,373,1635231600"; d="scan'208";a="250312480" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Feb 2022 02:26:51 -0800 X-IronPort-AV: E=Sophos;i="5.88,373,1635231600"; d="scan'208";a="498708624" Received: from embargo.jf.intel.com ([10.165.9.183]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Feb 2022 02:26:51 -0800 From: Yang Weijiang To: pbonzini@redhat.com, jmattson@google.com, seanjc@google.com, like.xu.linux@gmail.com, vkuznets@redhat.com, wei.w.wang@intel.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Yang Weijiang Subject: [PATCH v9 14/17] KVM: x86/vmx: Clear Arch LBREn bit before inject #DB to guest Date: Tue, 15 Feb 2022 16:25:41 -0500 Message-Id: <20220215212544.51666-15-weijiang.yang@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220215212544.51666-1-weijiang.yang@intel.com> References: <20220215212544.51666-1-weijiang.yang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" On a debug breakpoint event (#DB), IA32_LBR_CTL.LBREn is cleared. So need to clear the bit manually before inject #DB. Signed-off-by: Yang Weijiang --- arch/x86/kvm/vmx/vmx.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index d1eb1e149fea..e7969884d90e 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1617,6 +1617,27 @@ static void vmx_clear_hlt(struct kvm_vcpu *vcpu) vmcs_write32(GUEST_ACTIVITY_STATE, GUEST_ACTIVITY_ACTIVE); } =20 +static void flip_arch_lbr_ctl(struct kvm_vcpu *vcpu, bool on) +{ + struct lbr_desc *lbr_desc =3D vcpu_to_lbr_desc(vcpu); + struct kvm_pmu *pmu =3D vcpu_to_pmu(vcpu); + + if (kvm_cpu_cap_has(X86_FEATURE_ARCH_LBR) && + test_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use) && + lbr_desc->event) { + u64 old =3D vmcs_read64(GUEST_IA32_LBR_CTL); + u64 new; + + if (on) + new =3D old | ARCH_LBR_CTL_LBREN; + else + new =3D old & ~ARCH_LBR_CTL_LBREN; + + if (old !=3D new) + vmcs_write64(GUEST_IA32_LBR_CTL, new); + } +} + static void vmx_queue_exception(struct kvm_vcpu *vcpu) { struct vcpu_vmx *vmx =3D to_vmx(vcpu); @@ -1652,6 +1673,9 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu) vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info); =20 vmx_clear_hlt(vcpu); + + if (nr =3D=3D DB_VECTOR) + flip_arch_lbr_ctl(vcpu, false); } =20 static void vmx_setup_uret_msr(struct vcpu_vmx *vmx, unsigned int msr, @@ -4655,6 +4679,9 @@ static void vmx_inject_nmi(struct kvm_vcpu *vcpu) INTR_TYPE_NMI_INTR | INTR_INFO_VALID_MASK | NMI_VECTOR); =20 vmx_clear_hlt(vcpu); + + if (vcpu->arch.exception.nr =3D=3D DB_VECTOR) + flip_arch_lbr_ctl(vcpu, false); } =20 bool vmx_get_nmi_mask(struct kvm_vcpu *vcpu) --=20 2.27.0