From nobody Sun Sep 22 09:17:13 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 643CDC433F5 for ; Sat, 12 Feb 2022 10:44:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233654AbiBLKoG (ORCPT ); Sat, 12 Feb 2022 05:44:06 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:43242 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231926AbiBLKoD (ORCPT ); Sat, 12 Feb 2022 05:44:03 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 30DE62655A; Sat, 12 Feb 2022 02:43:56 -0800 (PST) X-UUID: 04a4d05820d143dd84f27c268d9e18df-20220212 X-UUID: 04a4d05820d143dd84f27c268d9e18df-20220212 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1820887181; Sat, 12 Feb 2022 18:43:53 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 12 Feb 2022 18:43:51 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 12 Feb 2022 18:43:51 +0800 From: Lecopzer Chen To: CC: Catalin Marinas , Will Deacon , Mark Rutland , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim , , Matthias Brugger , Marc Zyngier , Julien Thierry , Kees Cook , Masahiro Yamada , Petr Mladek , Andrew Morton , Wang Qing , Luis Chamberlain , Xiaoming Ni , , , , , , , , Subject: [PATCH 1/5] kernel/watchdog: remove WATCHDOG_DEFAULT Date: Sat, 12 Feb 2022 18:43:45 +0800 Message-ID: <20220212104349.14266-2-lecopzer.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220212104349.14266-1-lecopzer.chen@mediatek.com> References: <20220212104349.14266-1-lecopzer.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" No reference to WATCHDOG_DEFAULT, remove it. this commit reworks from [1]. [1] https://lore.kernel.org/lkml/20211014024155.15253-2-kernelfans@gmail.co= m/ Signed-off-by: Pingfan Liu Signed-off-by: Lecopzer Chen Reviewed-by: Petr Mladek --- kernel/watchdog.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/kernel/watchdog.c b/kernel/watchdog.c index 99afb88d2e85..db451e943a04 100644 --- a/kernel/watchdog.c +++ b/kernel/watchdog.c @@ -30,10 +30,8 @@ static DEFINE_MUTEX(watchdog_mutex); =20 #if defined(CONFIG_HARDLOCKUP_DETECTOR) || defined(CONFIG_HAVE_NMI_WATCHDO= G) -# define WATCHDOG_DEFAULT (SOFT_WATCHDOG_ENABLED | NMI_WATCHDOG_ENABLED) # define NMI_WATCHDOG_DEFAULT 1 #else -# define WATCHDOG_DEFAULT (SOFT_WATCHDOG_ENABLED) # define NMI_WATCHDOG_DEFAULT 0 #endif =20 --=20 2.25.1 From nobody Sun Sep 22 09:17:13 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2292EC433EF for ; Sat, 12 Feb 2022 10:44:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233890AbiBLKo0 (ORCPT ); Sat, 12 Feb 2022 05:44:26 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:43276 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233635AbiBLKoG (ORCPT ); Sat, 12 Feb 2022 05:44:06 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 701C526AD0; Sat, 12 Feb 2022 02:44:01 -0800 (PST) X-UUID: 8e52404fa81a47c9915abefe35a56fc9-20220212 X-UUID: 8e52404fa81a47c9915abefe35a56fc9-20220212 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 281329606; Sat, 12 Feb 2022 18:43:54 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Sat, 12 Feb 2022 18:43:52 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 12 Feb 2022 18:43:52 +0800 From: Lecopzer Chen To: CC: Catalin Marinas , Will Deacon , Mark Rutland , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim , , Matthias Brugger , "Marc Zyngier" , Julien Thierry , Kees Cook , Masahiro Yamada , Petr Mladek , Andrew Morton , Wang Qing , Luis Chamberlain , Xiaoming Ni , , , , , , , , Subject: [PATCH 2/5] kernel/watchdog: change watchdog_nmi_enable() to void Date: Sat, 12 Feb 2022 18:43:46 +0800 Message-ID: <20220212104349.14266-3-lecopzer.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220212104349.14266-1-lecopzer.chen@mediatek.com> References: <20220212104349.14266-1-lecopzer.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Nobody cares about the return value of watchdog_nmi_enable(), changing its prototype to void. This commit reworks from [1]. [1] https://lore.kernel.org/lkml/20211014024155.15253-2-kernelfans@gmail.co= m/ Signed-off-by: Pingfan Liu Signed-off-by: Lecopzer Chen Reviewed-by: Petr Mladek --- arch/sparc/kernel/nmi.c | 8 ++++---- include/linux/nmi.h | 2 +- kernel/watchdog.c | 3 +-- 3 files changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c index 060fff95a305..8dc0f4e820b0 100644 --- a/arch/sparc/kernel/nmi.c +++ b/arch/sparc/kernel/nmi.c @@ -282,11 +282,11 @@ __setup("nmi_watchdog=3D", setup_nmi_watchdog); * sparc specific NMI watchdog enable function. * Enables watchdog if it is not enabled already. */ -int watchdog_nmi_enable(unsigned int cpu) +void watchdog_nmi_enable(unsigned int cpu) { if (atomic_read(&nmi_active) =3D=3D -1) { pr_warn("NMI watchdog cannot be enabled or disabled\n"); - return -1; + return; } =20 /* @@ -295,11 +295,11 @@ int watchdog_nmi_enable(unsigned int cpu) * process first. */ if (!nmi_init_done) - return 0; + return; =20 smp_call_function_single(cpu, start_nmi_watchdog, NULL, 1); =20 - return 0; + return; } /* * sparc specific NMI watchdog disable function. diff --git a/include/linux/nmi.h b/include/linux/nmi.h index 750c7f395ca9..b7bcd63c36b4 100644 --- a/include/linux/nmi.h +++ b/include/linux/nmi.h @@ -119,7 +119,7 @@ static inline int hardlockup_detector_perf_init(void) {= return 0; } void watchdog_nmi_stop(void); void watchdog_nmi_start(void); int watchdog_nmi_probe(void); -int watchdog_nmi_enable(unsigned int cpu); +void watchdog_nmi_enable(unsigned int cpu); void watchdog_nmi_disable(unsigned int cpu); =20 /** diff --git a/kernel/watchdog.c b/kernel/watchdog.c index db451e943a04..b71d434cf648 100644 --- a/kernel/watchdog.c +++ b/kernel/watchdog.c @@ -93,10 +93,9 @@ __setup("nmi_watchdog=3D", hardlockup_panic_setup); * softlockup watchdog start and stop. The arch must select the * SOFTLOCKUP_DETECTOR Kconfig. */ -int __weak watchdog_nmi_enable(unsigned int cpu) +void __weak watchdog_nmi_enable(unsigned int cpu) { hardlockup_detector_perf_enable(); - return 0; } =20 void __weak watchdog_nmi_disable(unsigned int cpu) --=20 2.25.1 From nobody Sun Sep 22 09:17:13 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D287C433EF for ; Sat, 12 Feb 2022 10:44:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233822AbiBLKoV (ORCPT ); Sat, 12 Feb 2022 05:44:21 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:43274 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233630AbiBLKoG (ORCPT ); Sat, 12 Feb 2022 05:44:06 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6B6242657E; Sat, 12 Feb 2022 02:44:01 -0800 (PST) X-UUID: faeb3a4aad2b43dbb06de0b11b77cf61-20220212 X-UUID: faeb3a4aad2b43dbb06de0b11b77cf61-20220212 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1654401457; Sat, 12 Feb 2022 18:43:54 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Sat, 12 Feb 2022 18:43:53 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 12 Feb 2022 18:43:53 +0800 From: Lecopzer Chen To: CC: Catalin Marinas , Will Deacon , Mark Rutland , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim , , Matthias Brugger , "Marc Zyngier" , Julien Thierry , Kees Cook , Masahiro Yamada , Petr Mladek , Andrew Morton , Wang Qing , Luis Chamberlain , Xiaoming Ni , , , , , , , , Subject: [PATCH 3/5] kernel/watchdog_hld: Ensure CPU-bound context when creating hardlockup detector event Date: Sat, 12 Feb 2022 18:43:47 +0800 Message-ID: <20220212104349.14266-4-lecopzer.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220212104349.14266-1-lecopzer.chen@mediatek.com> References: <20220212104349.14266-1-lecopzer.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Pingfan Liu from: Pingfan Liu hardlockup_detector_event_create() should create perf_event on the current CPU. Preemption could not get disabled because perf_event_create_kernel_counter() allocates memory. Instead, the CPU locality is achieved by processing the code in a per-CPU bound kthread. Add a check to prevent mistakes when calling the code in another code path. Signed-off-by: Pingfan Liu Co-developed-by: Lecopzer Chen Signed-off-by: Lecopzer Chen Reviewed-by: Petr Mladek --- kernel/watchdog_hld.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/kernel/watchdog_hld.c b/kernel/watchdog_hld.c index 247bf0b1582c..96b717205952 100644 --- a/kernel/watchdog_hld.c +++ b/kernel/watchdog_hld.c @@ -165,10 +165,16 @@ static void watchdog_overflow_callback(struct perf_ev= ent *event, =20 static int hardlockup_detector_event_create(void) { - unsigned int cpu =3D smp_processor_id(); + unsigned int cpu; struct perf_event_attr *wd_attr; struct perf_event *evt; =20 + /* + * Preemption is not disabled because memory will be allocated. + * Ensure CPU-locality by calling this in per-CPU kthread. + */ + WARN_ON(!is_percpu_thread()); + cpu =3D raw_smp_processor_id(); wd_attr =3D &wd_hw_attr; wd_attr->sample_period =3D hw_nmi_get_sample_period(watchdog_thresh); =20 --=20 2.25.1 From nobody Sun Sep 22 09:17:13 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45236C433EF for ; Sat, 12 Feb 2022 10:44:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233746AbiBLKoY (ORCPT ); Sat, 12 Feb 2022 05:44:24 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:43272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233619AbiBLKoG (ORCPT ); Sat, 12 Feb 2022 05:44:06 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E51BB26573; Sat, 12 Feb 2022 02:43:58 -0800 (PST) X-UUID: 66f735713b934a70b748891a29852237-20220212 X-UUID: 66f735713b934a70b748891a29852237-20220212 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 412303626; Sat, 12 Feb 2022 18:43:55 +0800 Received: from mtkexhb02.mediatek.inc (172.21.101.103) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 12 Feb 2022 18:43:54 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 12 Feb 2022 18:43:54 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 12 Feb 2022 18:43:53 +0800 From: Lecopzer Chen To: CC: Catalin Marinas , Will Deacon , Mark Rutland , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim , , Matthias Brugger , "Marc Zyngier" , Julien Thierry , Kees Cook , Masahiro Yamada , Petr Mladek , Andrew Morton , Wang Qing , Luis Chamberlain , Xiaoming Ni , , , , , , , , Subject: [PATCH 4/5] kernel/watchdog: Adapt the watchdog_hld interface for async model Date: Sat, 12 Feb 2022 18:43:48 +0800 Message-ID: <20220212104349.14266-5-lecopzer.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220212104349.14266-1-lecopzer.chen@mediatek.com> References: <20220212104349.14266-1-lecopzer.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Pingfan Liu from: Pingfan Liu When lockup_detector_init()->watchdog_nmi_probe(), PMU may be not ready yet. E.g. on arm64, PMU is not ready until device_initcall(armv8_pmu_driver_init). And it is deeply integrated with the driver model and cpuhp. Hence it is hard to push this initialization before smp_init(). But it is easy to take an opposite approach by enabling watchdog_hld to get the capability of PMU async. The async model is achieved by expanding watchdog_nmi_probe() with -EBUSY, and a re-initializing work_struct which waits on a wait_queue_head. Signed-off-by: Pingfan Liu Co-developed-by: Lecopzer Chen Signed-off-by: Lecopzer Chen --- kernel/watchdog.c | 56 +++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 54 insertions(+), 2 deletions(-) diff --git a/kernel/watchdog.c b/kernel/watchdog.c index b71d434cf648..fa8490cfeef8 100644 --- a/kernel/watchdog.c +++ b/kernel/watchdog.c @@ -103,7 +103,11 @@ void __weak watchdog_nmi_disable(unsigned int cpu) hardlockup_detector_perf_disable(); } =20 -/* Return 0, if a NMI watchdog is available. Error code otherwise */ +/* + * Arch specific API. Return 0, if a NMI watchdog is available. -EBUSY if = not + * ready, and arch code should wake up hld_detector_wait when ready. Other + * negative value if not support. + */ int __weak __init watchdog_nmi_probe(void) { return hardlockup_detector_perf_init(); @@ -839,16 +843,64 @@ static void __init watchdog_sysctl_init(void) #define watchdog_sysctl_init() do { } while (0) #endif /* CONFIG_SYSCTL */ =20 +static void lockup_detector_delay_init(struct work_struct *work); +enum hld_detector_state detector_delay_init_state __initdata; + +struct wait_queue_head hld_detector_wait __initdata =3D + __WAIT_QUEUE_HEAD_INITIALIZER(hld_detector_wait); + +static struct work_struct detector_work __initdata =3D + __WORK_INITIALIZER(detector_work, lockup_detector_delay_init); + +static void __init lockup_detector_delay_init(struct work_struct *work) +{ + int ret; + + wait_event(hld_detector_wait, + detector_delay_init_state =3D=3D DELAY_INIT_READY); + ret =3D watchdog_nmi_probe(); + if (!ret) { + nmi_watchdog_available =3D true; + lockup_detector_setup(); + } else { + WARN_ON(ret =3D=3D -EBUSY); + pr_info("Perf NMI watchdog permanently disabled\n"); + } +} + +/* Ensure the check is called after the initialization of PMU driver */ +static int __init lockup_detector_check(void) +{ + if (detector_delay_init_state < DELAY_INIT_WAIT) + return 0; + + if (WARN_ON(detector_delay_init_state =3D=3D DELAY_INIT_WAIT)) { + detector_delay_init_state =3D DELAY_INIT_READY; + wake_up(&hld_detector_wait); + } + flush_work(&detector_work); + return 0; +} +late_initcall_sync(lockup_detector_check); + void __init lockup_detector_init(void) { + int ret; + if (tick_nohz_full_enabled()) pr_info("Disabling watchdog on nohz_full cores by default\n"); =20 cpumask_copy(&watchdog_cpumask, housekeeping_cpumask(HK_FLAG_TIMER)); =20 - if (!watchdog_nmi_probe()) + ret =3D watchdog_nmi_probe(); + if (!ret) nmi_watchdog_available =3D true; + else if (ret =3D=3D -EBUSY) { + detector_delay_init_state =3D DELAY_INIT_WAIT; + queue_work_on(smp_processor_id(), system_wq, &detector_work); + } + lockup_detector_setup(); watchdog_sysctl_init(); } --=20 2.25.1 From nobody Sun Sep 22 09:17:13 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEAF6C433F5 for ; Sat, 12 Feb 2022 10:44:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233909AbiBLKo3 (ORCPT ); Sat, 12 Feb 2022 05:44:29 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:43282 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233644AbiBLKoG (ORCPT ); Sat, 12 Feb 2022 05:44:06 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 65CB62655A; Sat, 12 Feb 2022 02:44:01 -0800 (PST) X-UUID: fd11c4b7ae1743a8acdedb2145122f3e-20220212 X-UUID: fd11c4b7ae1743a8acdedb2145122f3e-20220212 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 492079112; Sat, 12 Feb 2022 18:43:56 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 12 Feb 2022 18:43:54 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 12 Feb 2022 18:43:54 +0800 From: Lecopzer Chen To: CC: Catalin Marinas , Will Deacon , Mark Rutland , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim , , Matthias Brugger , Marc Zyngier , Julien Thierry , Kees Cook , Masahiro Yamada , Petr Mladek , Andrew Morton , Wang Qing , Luis Chamberlain , Xiaoming Ni , , , , , , , , Subject: [PATCH 5/5] arm64: Enable perf events based hard lockup detector Date: Sat, 12 Feb 2022 18:43:49 +0800 Message-ID: <20220212104349.14266-6-lecopzer.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220212104349.14266-1-lecopzer.chen@mediatek.com> References: <20220212104349.14266-1-lecopzer.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sumit Garg from: Pingfan Liu With the recent feature added to enable perf events to use pseudo NMIs as interrupts on platforms which support GICv3 or later, its now been possible to enable hard lockup detector (or NMI watchdog) on arm64 platforms. So enable corresponding support. One thing to note here is that normally lockup detector is initialized just after the early initcalls but PMU on arm64 comes up much later as device_initcall(). To cope with that, overriding watchdog_nmi_probe() to let the watchdog framework know PMU not ready, and inform the framework to re-initialize lockup detection once PMU has been initialized. [1]: http://lore.kernel.org/linux-arm-kernel/1610712101-14929-1-git-send-em= ail-sumit.garg@linaro.org Signed-off-by: Sumit Garg (Pingfan: adapt it to watchdog_hld async model based on [1]) Co-developed-by: Pingfan Liu Signed-off-by: Pingfan Liu Co-developed-by: Lecopzer Chen Signed-off-by: Lecopzer Chen --- arch/arm64/Kconfig | 2 ++ arch/arm64/kernel/Makefile | 1 + arch/arm64/kernel/perf_event.c | 11 ++++++++-- arch/arm64/kernel/watchdog_hld.c | 36 ++++++++++++++++++++++++++++++++ drivers/perf/arm_pmu.c | 5 +++++ include/linux/nmi.h | 9 ++++++++ include/linux/perf/arm_pmu.h | 2 ++ 7 files changed, 64 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/kernel/watchdog_hld.c diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 09b885cc4db5..df6fed8327ba 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -190,6 +190,8 @@ config ARM64 select HAVE_NMI select HAVE_PATA_PLATFORM select HAVE_PERF_EVENTS + select HAVE_PERF_EVENTS_NMI if ARM64_PSEUDO_NMI + select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_N= MI select HAVE_PERF_REGS select HAVE_PERF_USER_STACK_DUMP select HAVE_REGS_AND_STACK_ACCESS_API diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile index 88b3e2a21408..3e62a8877ed7 100644 --- a/arch/arm64/kernel/Makefile +++ b/arch/arm64/kernel/Makefile @@ -46,6 +46,7 @@ obj-$(CONFIG_MODULES) +=3D module.o obj-$(CONFIG_ARM64_MODULE_PLTS) +=3D module-plts.o obj-$(CONFIG_PERF_EVENTS) +=3D perf_regs.o perf_callchain.o obj-$(CONFIG_HW_PERF_EVENTS) +=3D perf_event.o +obj-$(CONFIG_HARDLOCKUP_DETECTOR_PERF) +=3D watchdog_hld.o obj-$(CONFIG_HAVE_HW_BREAKPOINT) +=3D hw_breakpoint.o obj-$(CONFIG_CPU_PM) +=3D sleep.o suspend.o obj-$(CONFIG_CPU_IDLE) +=3D cpuidle.o diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index cab678ed6618..73db9f2588d5 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -23,6 +23,7 @@ #include #include #include +#include =20 /* ARMv8 Cortex-A53 specific event types. */ #define ARMV8_A53_PERFCTR_PREF_LINEFILL 0xC2 @@ -1380,10 +1381,16 @@ static struct platform_driver armv8_pmu_driver =3D { =20 static int __init armv8_pmu_driver_init(void) { + int ret; + if (acpi_disabled) - return platform_driver_register(&armv8_pmu_driver); + ret =3D platform_driver_register(&armv8_pmu_driver); else - return arm_pmu_acpi_probe(armv8_pmuv3_pmu_init); + ret =3D arm_pmu_acpi_probe(armv8_pmuv3_pmu_init); + + detector_delay_init_state =3D DELAY_INIT_READY; + wake_up(&hld_detector_wait); + return ret; } device_initcall(armv8_pmu_driver_init) =20 diff --git a/arch/arm64/kernel/watchdog_hld.c b/arch/arm64/kernel/watchdog_= hld.c new file mode 100644 index 000000000000..85536906a186 --- /dev/null +++ b/arch/arm64/kernel/watchdog_hld.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 +#include +#include +#include + +/* + * Safe maximum CPU frequency in case a particular platform doesn't implem= ent + * cpufreq driver. Although, architecture doesn't put any restrictions on + * maximum frequency but 5 GHz seems to be safe maximum given the available + * Arm CPUs in the market which are clocked much less than 5 GHz. On the o= ther + * hand, we can't make it much higher as it would lead to a large hard-loc= kup + * detection timeout on parts which are running slower (eg. 1GHz on + * Developerbox) and doesn't possess a cpufreq driver. + */ +#define SAFE_MAX_CPU_FREQ 5000000000UL // 5 GHz +u64 hw_nmi_get_sample_period(int watchdog_thresh) +{ + unsigned int cpu =3D smp_processor_id(); + unsigned long max_cpu_freq; + + max_cpu_freq =3D cpufreq_get_hw_max_freq(cpu) * 1000UL; + if (!max_cpu_freq) + max_cpu_freq =3D SAFE_MAX_CPU_FREQ; + + return (u64)max_cpu_freq * watchdog_thresh; +} + +int __init watchdog_nmi_probe(void) +{ + if (detector_delay_init_state !=3D DELAY_INIT_READY) + return -EBUSY; + else if (!arm_pmu_irq_is_nmi()) + return -ENODEV; + + return hardlockup_detector_perf_init(); +} diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c index 295cc7952d0e..e77f4897fca2 100644 --- a/drivers/perf/arm_pmu.c +++ b/drivers/perf/arm_pmu.c @@ -697,6 +697,11 @@ static int armpmu_get_cpu_irq(struct arm_pmu *pmu, int= cpu) return per_cpu(hw_events->irq, cpu); } =20 +bool arm_pmu_irq_is_nmi(void) +{ + return has_nmi; +} + /* * PMU hardware loses all context when a CPU goes offline. * When a CPU is hotplugged back in, since some hardware registers are diff --git a/include/linux/nmi.h b/include/linux/nmi.h index b7bcd63c36b4..9def85c00bd8 100644 --- a/include/linux/nmi.h +++ b/include/linux/nmi.h @@ -118,6 +118,15 @@ static inline int hardlockup_detector_perf_init(void) = { return 0; } =20 void watchdog_nmi_stop(void); void watchdog_nmi_start(void); + +enum hld_detector_state { + DELAY_INIT_NOP, + DELAY_INIT_WAIT, + DELAY_INIT_READY +}; + +extern enum hld_detector_state detector_delay_init_state; +extern struct wait_queue_head hld_detector_wait; int watchdog_nmi_probe(void); void watchdog_nmi_enable(unsigned int cpu); void watchdog_nmi_disable(unsigned int cpu); diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index 2512e2f9cd4e..9325d01adc3e 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h @@ -169,6 +169,8 @@ void kvm_host_pmu_init(struct arm_pmu *pmu); #define kvm_host_pmu_init(x) do { } while(0) #endif =20 +bool arm_pmu_irq_is_nmi(void); + /* Internal functions only for core arm_pmu code */ struct arm_pmu *armpmu_alloc(void); struct arm_pmu *armpmu_alloc_atomic(void); --=20 2.25.1