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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id o20sm5137834wmq.35.2022.02.09.04.47.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Feb 2022 04:47:32 -0800 (PST) From: Corentin Labbe To: davem@davemloft.net, heiko@sntech.de, herbert@gondor.apana.org.au, krzysztof.kozlowski@canonical.com, robh+dt@kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Corentin Labbe Subject: [PATCH] dt-bindings: crypto: convert rockchip-crypto to yaml Date: Wed, 9 Feb 2022 12:47:25 +0000 Message-Id: <20220209124725.2080986-1-clabbe@baylibre.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert rockchip-crypto to yaml. Signed-off-by: Corentin Labbe --- .../bindings/crypto/rockchip-crypto.txt | 28 -------- .../bindings/crypto/rockchip-crypto.yaml | 64 +++++++++++++++++++ 2 files changed, 64 insertions(+), 28 deletions(-) delete mode 100644 Documentation/devicetree/bindings/crypto/rockchip-crypt= o.txt create mode 100644 Documentation/devicetree/bindings/crypto/rockchip-crypt= o.yaml diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt b= /Documentation/devicetree/bindings/crypto/rockchip-crypto.txt deleted file mode 100644 index 5e2ba385b8c9..000000000000 --- a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt +++ /dev/null @@ -1,28 +0,0 @@ -Rockchip Electronics And Security Accelerator - -Required properties: -- compatible: Should be "rockchip,rk3288-crypto" -- reg: Base physical address of the engine and length of memory mapped - region -- interrupts: Interrupt number -- clocks: Reference to the clocks about crypto -- clock-names: "aclk" used to clock data - "hclk" used to clock data - "sclk" used to clock crypto accelerator - "apb_pclk" used to clock dma -- resets: Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names: Must include the name "crypto-rst". - -Examples: - - crypto: cypto-controller@ff8a0000 { - compatible =3D "rockchip,rk3288-crypto"; - reg =3D <0xff8a0000 0x4000>; - interrupts =3D ; - clocks =3D <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>, - <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>; - clock-names =3D "aclk", "hclk", "sclk", "apb_pclk"; - resets =3D <&cru SRST_CRYPTO>; - reset-names =3D "crypto-rst"; - }; diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.yaml = b/Documentation/devicetree/bindings/crypto/rockchip-crypto.yaml new file mode 100644 index 000000000000..392d89055398 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/rockchip-crypto.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/rockchip-crypto.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip Electronics And Security Accelerator + +maintainers: + - Heiko Stuebner + +properties: + compatible: + const: rockchip,rk3288-crypto + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: clock data + - description: clock data + - description: clock crypto accelerator + - description: clock dma + + clock-names: + items: + - const: aclk + - const: hclk + - const: sclk + - const: apb_pclk + + resets: + minItems: 1 + + reset-names: + const: crypto-rst + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + +additionalProperties: false + +examples: + - | + crypto: crypto@ff8a0000 { + compatible =3D "rockchip,rk3288-crypto"; + reg =3D <0xff8a0000 0x4000>; + interrupts =3D ; + clocks =3D <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>, + <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>; + clock-names =3D "aclk", "hclk", "sclk", "apb_pclk"; + resets =3D <&cru SRST_CRYPTO>; + reset-names =3D "crypto-rst"; + }; --=20 2.34.1