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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id r10sm5125550ejy.148.2022.02.08.09.19.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Feb 2022 09:19:11 -0800 (PST) From: Krzysztof Kozlowski To: Inki Dae , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Kishon Vijay Abraham I , Vinod Koul , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: Marek Szyprowski , Sylwester Nawrocki , stable@vger.kernel.org Subject: [PATCH 01/10] ARM: dts: exynos: add missing HDMI supplies on SMDK5250 Date: Tue, 8 Feb 2022 18:18:14 +0100 Message-Id: <20220208171823.226211-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> References: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add required VDD supplies to HDMI block on SMDK5250. Without them, the HDMI driver won't probe. Because of lack of schematics, use same supplies as on Arndale 5250 board (voltage matches). Cc: # v3.15+ Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar --- arch/arm/boot/dts/exynos5250-smdk5250.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/= exynos5250-smdk5250.dts index 65d2474f83eb..21fbbf3d8684 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -118,6 +118,9 @@ &hdmi { status =3D "okay"; ddc =3D <&i2c_2>; hpd-gpios =3D <&gpx3 7 GPIO_ACTIVE_HIGH>; + vdd-supply =3D <&ldo8_reg>; + vdd_osc-supply =3D <&ldo10_reg>; + vdd_pll-supply =3D <&ldo8_reg>; }; =20 &i2c_0 { --=20 2.32.0 From nobody Mon Jun 29 15:06:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D425EC4167D for ; Tue, 8 Feb 2022 17:19:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383760AbiBHRTZ (ORCPT ); Tue, 8 Feb 2022 12:19:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49974 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352692AbiBHRTQ (ORCPT ); Tue, 8 Feb 2022 12:19:16 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 26DBDC0613C9 for ; Tue, 8 Feb 2022 09:19:16 -0800 (PST) Received: from mail-ej1-f72.google.com (mail-ej1-f72.google.com [209.85.218.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 7061540060 for ; Tue, 8 Feb 2022 17:19:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1644340754; bh=VHcPmkTeJVNyntx2kBlzhzsUutabuRvxOsRCpNXtu84=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=eE06Fj4wsqL95Vd+feFDIykqxaN7KL2zmkLVutUvtJFuC1G/3vQiFAMOY7AuREyle 22aMTq1RepW7dXoFMxxhYYs/rA0M424g/3puGRengNeLOvqP15OZY80NoB4a9zvvbs e6e8Pe/NkcuSFdigFayGrq9hFt5ui/pHH8qz1bNcbaAuP0nb/asGXMSxQpVFmoysq7 L5vbblG1Czn5LC0/PxM13Zo/nTd0w/aP43vGIib0Baz07kVIkyoy4z4o/LFYIQe9fG 5ZYLd7fxCIg9PiQ2P5equNqHeqe56eps8JguIYE3SovCg6XvfQIL9Dh4kSQewXJbVo iQx2deKWRg0zg== Received: by mail-ej1-f72.google.com with SMTP id l18-20020a1709063d3200b006a93f7d4941so6064029ejf.1 for ; Tue, 08 Feb 2022 09:19:14 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VHcPmkTeJVNyntx2kBlzhzsUutabuRvxOsRCpNXtu84=; b=r7ID5zxFhS1YFjs/kwGTIukz0gWHU7Epr21SVjcGQG+enuMDiTSsHkoaOs+6wprBgR 3HiXctWniWjPXOgiftjIjCfIby/1vRYdi6SIiYznIzy4SoxELfvuMre2oBblkq689zXy nCYsJ344YiFtzxMXMfLRer5hEL1L8mSuuSpIdrZeJbbDFkmRQyzb9XqB97/tQeI0nRmQ cYTkBRA/ZogzxAliv9flQX2rObxTmm3daZ9CA68gbpFfuV8+ruQMOCTY439fpFMoBwkB LZLQmcdUb8OuDvUqH+wJ6x+ReqZ0xGHh2+HAMMSWJMveNzZFWpbi9OnPNCdePB5Oksyo lRsg== X-Gm-Message-State: AOAM531lhZnsg3lUHiRbwHAdUXFYjH6/PLBCGssPuCWnWHdC0PoNsYz4 S4h7d2nh7TnB0EZPDCKBcgcj/haX47rWVyKyTLzicxHVmMoqCMyyFaogz0K5BCIf3uAVXaax34F 74M3JSxRQmCcuqGm3aE0+vs5FADESSM8nXAkeFdzS0w== X-Received: by 2002:aa7:dd88:: with SMTP id g8mr5421151edv.437.1644340753083; Tue, 08 Feb 2022 09:19:13 -0800 (PST) X-Google-Smtp-Source: ABdhPJzu+cFFUCenp9+7nbzSzHf1p2aHa5gSlHKLF75wAskvl768sx1e6yjGcesa9sVQ2V3f6PILbQ== X-Received: by 2002:aa7:dd88:: with SMTP id g8mr5421132edv.437.1644340752936; Tue, 08 Feb 2022 09:19:12 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id r10sm5125550ejy.148.2022.02.08.09.19.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Feb 2022 09:19:12 -0800 (PST) From: Krzysztof Kozlowski To: Inki Dae , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Kishon Vijay Abraham I , Vinod Koul , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: Marek Szyprowski , Sylwester Nawrocki , stable@vger.kernel.org Subject: [PATCH 02/10] ARM: dts: exynos: add missing HDMI supplies on SMDK5420 Date: Tue, 8 Feb 2022 18:18:15 +0100 Message-Id: <20220208171823.226211-3-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> References: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add required VDD supplies to HDMI block on SMDK5420. Without them, the HDMI driver won't probe. Because of lack of schematics, use same supplies as on Arndale Octa and Odroid XU3 boards (voltage matches). Cc: # v3.15+ Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420-smdk5420.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/= exynos5420-smdk5420.dts index 2978b5775a6d..4d7b6d9008a7 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -124,6 +124,9 @@ &hdmi { hpd-gpios =3D <&gpx3 7 GPIO_ACTIVE_HIGH>; pinctrl-names =3D "default"; pinctrl-0 =3D <&hdmi_hpd_irq>; + vdd-supply =3D <&ldo6_reg>; + vdd_osc-supply =3D <&ldo7_reg>; + vdd_pll-supply =3D <&ldo6_reg>; }; =20 &hsi2c_4 { --=20 2.32.0 From nobody Mon Jun 29 15:06:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20A0CC43217 for ; Tue, 8 Feb 2022 17:19:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383810AbiBHRT2 (ORCPT ); Tue, 8 Feb 2022 12:19:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383494AbiBHRTR (ORCPT ); Tue, 8 Feb 2022 12:19:17 -0500 Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 07651C061578 for ; Tue, 8 Feb 2022 09:19:16 -0800 (PST) Received: from mail-ed1-f70.google.com (mail-ed1-f70.google.com [209.85.208.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id CEF7D3F33A for ; Tue, 8 Feb 2022 17:19:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1644340754; bh=lAYCF0oFl9nGAtjZLrRDfxUB8PgsnopuWgeZlWJgjg4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Ek+iYDMzT8ce/HbDOjD5ibzDNR3F7CFtm30L6O55yePTHRKywz3yn2e3XUU4E9isl 9Y5+E4yQ0ClpTn6u/X0XOSgXAUciWNm8Zm4fyiVntl5ipx3wR24gblQFxfUyHV5bNX L5KaeKG96siruNrrx0FvMrubJhxwyKRh4DSviRLk5pOXMxGq3QURAuujKi8UApjYNI Y5AjthOjFYKLhpiTzLjjLaPfi0xO13Sr64Afc+fKBXeskyLxss+b5m5S4eVAuCuH0q 5fsavOLMi3AL9xSRjgU66jbZYGoAwdH7aSe2dFCIGNE492Ifw0uz9/+3lb4JdxhWll atmCqyq0t+JqA== Received: by mail-ed1-f70.google.com with SMTP id f6-20020a0564021e8600b0040f662b99ffso4112258edf.7 for ; Tue, 08 Feb 2022 09:19:14 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lAYCF0oFl9nGAtjZLrRDfxUB8PgsnopuWgeZlWJgjg4=; b=bzJa3XQAOvyI3lQBl1nQvTOWFTGg739QN1X0wuisv5aq0NFpEU4vIW5zV3cxAqxy1D Aj0tPqsJyZFEogM0K27sqGNsAfxzLbdQCfeskzOxBgTvkr6c2HjYDna5oULeyG5ADXk5 SzGXH3Z1NBWGg+hOo2J8p22YpRl6bht8B7vhnXieagb19IzAT+GqFYTTVvCp1Kz9mkbP RlYNGLhb18Qz932GlxapR7TFAnjNGmYPZkPDRF63Dib6Bd+P+XXqu94nGm9Cqx0FON4c ENQZmAjDjjZmeEvr0grcqNqVXhEUtB4YRsfNbXDIJLAMSiyBDg2deruB6js9mzIEZBb1 jG/w== X-Gm-Message-State: AOAM531tXemvf1mLakcDMKFZPtUMkLQr6dBbiHqGo0SJG0JmYm6p1j1a QPRllujAzE8ORyWu9k89203u5uTL/huccFxZVA2WJ7AF2gQn99EC5GdPMhunr2G6sbm23md/PGW NLekPYAYiNkjDmIu6XNXV0MSK9Ypg9yBHwQ/62CTUNw== X-Received: by 2002:a05:6402:26c8:: with SMTP id x8mr5675183edd.80.1644340754544; Tue, 08 Feb 2022 09:19:14 -0800 (PST) X-Google-Smtp-Source: ABdhPJyGbFLwRrBY5BwHpSgBbXGOoRElSE/B0TmO0zX/pZeqJzCVowi5xXNxxbrl6PdvIGlV9Er9gw== X-Received: by 2002:a05:6402:26c8:: with SMTP id x8mr5675152edd.80.1644340754363; Tue, 08 Feb 2022 09:19:14 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id r10sm5125550ejy.148.2022.02.08.09.19.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Feb 2022 09:19:13 -0800 (PST) From: Krzysztof Kozlowski To: Inki Dae , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Kishon Vijay Abraham I , Vinod Koul , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: Marek Szyprowski , Sylwester Nawrocki Subject: [PATCH 03/10] dt-bindings: phy: samsung,exynos-hdmi-phy: convert to dtschema Date: Tue, 8 Feb 2022 18:18:16 +0100 Message-Id: <20220208171823.226211-4-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> References: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert the Exynos HDMI PHY bindings to DT schema format and put them next to other PHYs. Signed-off-by: Krzysztof Kozlowski --- .../display/exynos/exynos_hdmiphy.txt | 15 ------- .../bindings/phy/samsung,exynos-hdmi-phy.yaml | 44 +++++++++++++++++++ 2 files changed, 44 insertions(+), 15 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/exynos/exynos= _hdmiphy.txt create mode 100644 Documentation/devicetree/bindings/phy/samsung,exynos-hd= mi-phy.yaml diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_hdmiph= y.txt b/Documentation/devicetree/bindings/display/exynos/exynos_hdmiphy.txt deleted file mode 100644 index 162f641f7639..000000000000 --- a/Documentation/devicetree/bindings/display/exynos/exynos_hdmiphy.txt +++ /dev/null @@ -1,15 +0,0 @@ -Device-Tree bindings for hdmiphy driver - -Required properties: -- compatible: value should be one of the following: - 1) "samsung,exynos5-hdmiphy" - 2) "samsung,exynos4210-hdmiphy". - 3) "samsung,exynos4212-hdmiphy". -- reg: I2C address of the hdmiphy device. - -Example: - - hdmiphy { - compatible =3D "samsung,exynos4210-hdmiphy"; - reg =3D <0x38>; - }; diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos-hdmi-phy.= yaml b/Documentation/devicetree/bindings/phy/samsung,exynos-hdmi-phy.yaml new file mode 100644 index 000000000000..c61574e10b2a --- /dev/null +++ b/Documentation/devicetree/bindings/phy/samsung,exynos-hdmi-phy.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/samsung,exynos-hdmi-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC HDMI PHY + +maintainers: + - Inki Dae + - Joonyoung Shim + - Seung-Woo Kim + - Kyungmin Park + - Krzysztof Kozlowski + +properties: + compatible: + oneOf: + - enum: + - samsung,exynos4210-hdmiphy + - samsung,exynos4212-hdmiphy + - const: samsung,exynos5-hdmiphy + deprecated: true + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + hdmi-phy@38 { + compatible =3D "samsung,exynos4210-hdmiphy"; + reg =3D <0x38>; + }; + }; --=20 2.32.0 From nobody Mon Jun 29 15:06:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F333C4167E for ; Tue, 8 Feb 2022 17:19:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383769AbiBHRTb (ORCPT ); Tue, 8 Feb 2022 12:19:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359824AbiBHRTS (ORCPT ); Tue, 8 Feb 2022 12:19:18 -0500 Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AD24AC06157B for ; Tue, 8 Feb 2022 09:19:17 -0800 (PST) Received: from mail-ej1-f70.google.com (mail-ej1-f70.google.com [209.85.218.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 6C67A3FFFC for ; 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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id r10sm5125550ejy.148.2022.02.08.09.19.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Feb 2022 09:19:15 -0800 (PST) From: Krzysztof Kozlowski To: Inki Dae , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Kishon Vijay Abraham I , Vinod Koul , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: Marek Szyprowski , Sylwester Nawrocki Subject: [PATCH 04/10] dt-bindings: display: samsung,exynos5433-decon: convert to dtschema Date: Tue, 8 Feb 2022 18:18:17 +0100 Message-Id: <20220208171823.226211-5-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> References: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert the Exynos5433 DECON display controller bindings to DT schema format. The conversion includes also updates to the bindings, matching the current DTS and Linux driver: 1. Require "fifo" interrupt. 2. Add "dsd" as a last clock. 3. Document "power-domains" and "iommus" properties. Signed-off-by: Krzysztof Kozlowski --- .../display/exynos/exynos5433-decon.txt | 60 ------- .../samsung/samsung,exynos5433-decon.yaml | 148 ++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 149 insertions(+), 60 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/exynos/exynos= 5433-decon.txt create mode 100644 Documentation/devicetree/bindings/display/samsung/samsu= ng,exynos5433-decon.yaml diff --git a/Documentation/devicetree/bindings/display/exynos/exynos5433-de= con.txt b/Documentation/devicetree/bindings/display/exynos/exynos5433-decon= .txt deleted file mode 100644 index 775193e1c641..000000000000 --- a/Documentation/devicetree/bindings/display/exynos/exynos5433-decon.txt +++ /dev/null @@ -1,60 +0,0 @@ -Device-Tree bindings for Samsung Exynos SoC display controller (DECON) - -DECON (Display and Enhancement Controller) is the Display Controller for t= he -Exynos series of SoCs which transfers the image data from a video memory -buffer to an external LCD interface. - -Required properties: -- compatible: value should be one of: - "samsung,exynos5433-decon", "samsung,exynos5433-decon-tv"; -- reg: physical base address and length of the DECON registers set. -- interrupt-names: should contain the interrupt names depending on mode of= work: - video mode: "vsync", - command mode: "lcd_sys", - command mode with software trigger: "lcd_sys", "te". -- interrupts or interrupts-extended: list of interrupt specifiers correspo= nding - to names privided in interrupt-names, as described in - interrupt-controller/interrupts.txt -- clocks: must include clock specifiers corresponding to entries in the - clock-names property. -- clock-names: list of clock names sorted in the same order as the clocks - property. Must contain "pclk", "aclk_decon", "aclk_smmu_decon0x", - "aclk_xiu_decon0x", "pclk_smmu_decon0x", "aclk_smmu_decon1x", - "aclk_xiu_decon1x", "pclk_smmu_decon1x", clk_decon_vclk", - "sclk_decon_eclk" -- ports: contains a port which is connected to mic node. address-cells and - size-cells must 1 and 0, respectively. -- port: contains an endpoint node which is connected to the endpoint in th= e mic - node. The reg value muset be 0. - -Example: -SoC specific DT entry: -decon: decon@13800000 { - compatible =3D "samsung,exynos5433-decon"; - reg =3D <0x13800000 0x2104>; - clocks =3D <&cmu_disp CLK_ACLK_DECON>, <&cmu_disp CLK_ACLK_SMMU_DECON0X>, - <&cmu_disp CLK_ACLK_XIU_DECON0X>, - <&cmu_disp CLK_PCLK_SMMU_DECON0X>, - <&cmu_disp CLK_ACLK_SMMU_DECON1X>, - <&cmu_disp CLK_ACLK_XIU_DECON1X>, - <&cmu_disp CLK_PCLK_SMMU_DECON1X>, - <&cmu_disp CLK_SCLK_DECON_VCLK>, - <&cmu_disp CLK_SCLK_DECON_ECLK>; - clock-names =3D "aclk_decon", "aclk_smmu_decon0x", "aclk_xiu_decon0x", - "pclk_smmu_decon0x", "aclk_smmu_decon1x", "aclk_xiu_decon1x", - "pclk_smmu_decon1x", "sclk_decon_vclk", "sclk_decon_eclk"; - interrupt-names =3D "vsync", "lcd_sys"; - interrupts =3D <0 202 0>, <0 203 0>; - - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - - port@0 { - reg =3D <0>; - decon_to_mic: endpoint { - remote-endpoint =3D <&mic_to_decon>; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exyn= os5433-decon.yaml b/Documentation/devicetree/bindings/display/samsung/samsu= ng,exynos5433-decon.yaml new file mode 100644 index 000000000000..6f796835ea03 --- /dev/null +++ b/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-= decon.yaml @@ -0,0 +1,148 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/samsung/samsung,exynos5433-deco= n.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos5433 SoC Display and Enhancement Controller (DECON) + +maintainers: + - Inki Dae + - Joonyoung Shim + - Seung-Woo Kim + - Kyungmin Park + - Krzysztof Kozlowski + +description: | + DECON (Display and Enhancement Controller) is the Display Controller for= the + Exynos5433 series of SoCs which transfers the image data from a video me= mory + buffer to an external LCD interface. + +properties: + compatible: + enum: + - samsung,exynos5433-decon + - samsung,exynos5433-decon-tv + + clocks: + minItems: 11 + maxItems: 11 + + clock-names: + items: + - const: pclk + - const: aclk_decon + - const: aclk_smmu_decon0x + - const: aclk_xiu_decon0x + - const: pclk_smmu_decon0x + - const: aclk_smmu_decon1x + - const: aclk_xiu_decon1x + - const: pclk_smmu_decon1x + - const: sclk_decon_vclk + - const: sclk_decon_eclk + - const: dsd + + interrupts: + minItems: 3 + maxItems: 4 + description: | + Interrupts depend on mode of work: + - video mode: vsync + - command mode: lcd_sys + - command mode with software trigger: lcd_sys, te + + interrupt-names: + minItems: 3 + items: + - const: fifo + - const: vsync + - const: lcd_sys + - const: te + + iommus: + minItems: 2 + maxItems: 2 + + iommu-names: + items: + - const: m0 + - const: m1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: + Contains a port which is connected to mic node. + + power-domains: + maxItems: 1 + + reg: + maxItems: 1 + + samsung,disp-sysreg: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to DISP system controller interface. + +required: + - compatible + - clocks + - clock-names + - interrupts + - interrupt-names + - ports + - reg + +additionalProperties: false + +examples: + - | + #include + #include + + display-controller@13800000 { + compatible =3D "samsung,exynos5433-decon"; + reg =3D <0x13800000 0x2104>; + clocks =3D <&cmu_disp CLK_PCLK_DECON>, + <&cmu_disp CLK_ACLK_DECON>, + <&cmu_disp CLK_ACLK_SMMU_DECON0X>, + <&cmu_disp CLK_ACLK_XIU_DECON0X>, + <&cmu_disp CLK_PCLK_SMMU_DECON0X>, + <&cmu_disp CLK_ACLK_SMMU_DECON1X>, + <&cmu_disp CLK_ACLK_XIU_DECON1X>, + <&cmu_disp CLK_PCLK_SMMU_DECON1X>, + <&cmu_disp CLK_SCLK_DECON_VCLK>, + <&cmu_disp CLK_SCLK_DECON_ECLK>, + <&cmu_disp CLK_SCLK_DSD>; + clock-names =3D "pclk", + "aclk_decon", + "aclk_smmu_decon0x", + "aclk_xiu_decon0x", + "pclk_smmu_decon0x", + "aclk_smmu_decon1x", + "aclk_xiu_decon1x", + "pclk_smmu_decon1x", + "sclk_decon_vclk", + "sclk_decon_eclk", + "dsd"; + power-domains =3D <&pd_disp>; + interrupt-names =3D "fifo", "vsync", "lcd_sys"; + interrupts =3D , + , + ; + samsung,disp-sysreg =3D <&syscon_disp>; + iommus =3D <&sysmmu_decon0x>, <&sysmmu_decon1x>; + iommu-names =3D "m0", "m1"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + decon_to_mic: endpoint { + remote-endpoint =3D <&mic_to_decon>; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index ddcee331dc09..a0ad276b3159 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6417,6 +6417,7 @@ L: dri-devel@lists.freedesktop.org S: Supported T: git git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git F: Documentation/devicetree/bindings/display/exynos/ +F: Documentation/devicetree/bindings/display/samsung/ F: drivers/gpu/drm/exynos/ F: include/uapi/drm/exynos_drm.h =20 --=20 2.32.0 From nobody Mon Jun 29 15:06:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07A82C433F5 for ; Tue, 8 Feb 2022 17:19:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383896AbiBHRTe (ORCPT ); Tue, 8 Feb 2022 12:19:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50068 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358775AbiBHRTW (ORCPT ); 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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id r10sm5125550ejy.148.2022.02.08.09.19.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Feb 2022 09:19:16 -0800 (PST) From: Krzysztof Kozlowski To: Inki Dae , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Kishon Vijay Abraham I , Vinod Koul , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: Marek Szyprowski , Sylwester Nawrocki Subject: [PATCH 05/10] dt-bindings: display: samsung,exynos7-decon: convert to dtschema Date: Tue, 8 Feb 2022 18:18:18 +0100 Message-Id: <20220208171823.226211-6-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> References: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert the Exynos7 DECON display controller bindings to DT schema format. Signed-off-by: Krzysztof Kozlowski --- .../bindings/display/exynos/exynos7-decon.txt | 65 ---------- .../samsung/samsung,exynos7-decon.yaml | 120 ++++++++++++++++++ 2 files changed, 120 insertions(+), 65 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/exynos/exynos= 7-decon.txt create mode 100644 Documentation/devicetree/bindings/display/samsung/samsu= ng,exynos7-decon.yaml diff --git a/Documentation/devicetree/bindings/display/exynos/exynos7-decon= .txt b/Documentation/devicetree/bindings/display/exynos/exynos7-decon.txt deleted file mode 100644 index 53912c99ec38..000000000000 --- a/Documentation/devicetree/bindings/display/exynos/exynos7-decon.txt +++ /dev/null @@ -1,65 +0,0 @@ -Device-Tree bindings for Samsung Exynos7 SoC display controller (DECON) - -DECON (Display and Enhancement Controller) is the Display Controller for t= he -Exynos7 series of SoCs which transfers the image data from a video memory -buffer to an external LCD interface. - -Required properties: -- compatible: value should be "samsung,exynos7-decon"; - -- reg: physical base address and length of the DECON registers set. - -- interrupts: should contain a list of all DECON IP block interrupts in the - order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier - format depends on the interrupt controller used. - -- interrupt-names: should contain the interrupt names: "fifo", "vsync", - "lcd_sys", in the same order as they were listed in the interrupts - property. - -- pinctrl-0: pin control group to be used for this controller. - -- pinctrl-names: must contain a "default" entry. - -- clocks: must include clock specifiers corresponding to entries in the - clock-names property. - -- clock-names: list of clock names sorted in the same order as the clocks - property. Must contain "pclk_decon0", "aclk_decon0", - "decon0_eclk", "decon0_vclk". -- i80-if-timings: timing configuration for lcd i80 interface support. - -Optional Properties: -- power-domains: a phandle to DECON power domain node. -- display-timings: timing settings for DECON, as described in document [1]. - Can be used in case timings cannot be provided otherwise - or to override timings provided by the panel. - -[1]: Documentation/devicetree/bindings/display/panel/display-timing.txt - -Example: - -SoC specific DT entry: - - decon@13930000 { - compatible =3D "samsung,exynos7-decon"; - interrupt-parent =3D <&combiner>; - reg =3D <0x13930000 0x1000>; - interrupt-names =3D "lcd_sys", "vsync", "fifo"; - interrupts =3D <0 188 0>, <0 189 0>, <0 190 0>; - clocks =3D <&clock_disp PCLK_DECON_INT>, - <&clock_disp ACLK_DECON_INT>, - <&clock_disp SCLK_DECON_INT_ECLK>, - <&clock_disp SCLK_DECON_INT_EXTCLKPLL>; - clock-names =3D "pclk_decon0", "aclk_decon0", "decon0_eclk", - "decon0_vclk"; - status =3D "disabled"; - }; - -Board specific DT entry: - - decon@13930000 { - pinctrl-0 =3D <&lcd_clk &pwm1_out>; - pinctrl-names =3D "default"; - status =3D "okay"; - }; diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exyn= os7-decon.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,= exynos7-decon.yaml new file mode 100644 index 000000000000..afa137d47922 --- /dev/null +++ b/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-dec= on.yaml @@ -0,0 +1,120 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/samsung/samsung,exynos7-decon.y= aml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos7 SoC Display and Enhancement Controller (DECON) + +maintainers: + - Inki Dae + - Joonyoung Shim + - Seung-Woo Kim + - Kyungmin Park + - Krzysztof Kozlowski + +description: | + DECON (Display and Enhancement Controller) is the Display Controller for= the + Exynos7 series of SoCs which transfers the image data from a video memory + buffer to an external LCD interface. + +properties: + compatible: + const: samsung,exynos7-decon + + clocks: + minItems: 4 + maxItems: 4 + + clock-names: + items: + - const: pclk_decon0 + - const: aclk_decon0 + - const: decon0_eclk + - const: decon0_vclk + + display-timings: + $ref: ../panel/display-timings.yaml# + + i80-if-timings: + type: object + description: timing configuration for lcd i80 interface support + properties: + cs-setup: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Clock cycles for the active period of address signal is enabled = until + chip select is enabled. + default: 0 + + wr-active: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Clock cycles for the active period of CS is enabled. + default: 1 + + wr-hold: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Clock cycles for the active period of CS is disabled until write + signal is disabled. + default: 0 + + wr-setup: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Clock cycles for the active period of CS signal is enabled until + write signal is enabled. + default: 0 + + interrupts: + items: + - description: FIFO level + - description: VSYNC + - description: LCD system + + interrupt-names: + items: + - const: fifo + - const: vsync + - const: lcd_sys + + power-domains: + maxItems: 1 + + reg: + maxItems: 1 + +required: + - compatible + - clocks + - clock-names + - interrupts + - interrupt-names + - reg + +additionalProperties: false + +examples: + - | + #include + #include + + display-controller@13930000 { + compatible =3D "samsung,exynos7-decon"; + reg =3D <0x13930000 0x1000>; + interrupt-names =3D "fifo", "vsync", "lcd_sys"; + interrupts =3D , + , + ; + clocks =3D <&clock_disp 100>, /* PCLK_DECON_INT */ + <&clock_disp 101>, /* ACLK_DECON_INT */ + <&clock_disp 102>, /* SCLK_DECON_INT_ECLK */ + <&clock_disp 103>; /* SCLK_DECON_INT_EXTCLKPLL */ + clock-names =3D "pclk_decon0", + "aclk_decon0", + "decon0_eclk", + "decon0_vclk"; + pinctrl-0 =3D <&lcd_clk &pwm1_out>; + pinctrl-names =3D "default"; + }; --=20 2.32.0 From nobody Mon Jun 29 15:06:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81C2AC433EF for ; Tue, 8 Feb 2022 17:19:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383961AbiBHRTm (ORCPT ); Tue, 8 Feb 2022 12:19:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383635AbiBHRTX (ORCPT ); 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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id r10sm5125550ejy.148.2022.02.08.09.19.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Feb 2022 09:19:17 -0800 (PST) From: Krzysztof Kozlowski To: Inki Dae , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Kishon Vijay Abraham I , Vinod Koul , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: Marek Szyprowski , Sylwester Nawrocki Subject: [PATCH 06/10] dt-bindings: display: samsung,exynos-hdmi-ddc: convert to dtschema Date: Tue, 8 Feb 2022 18:18:19 +0100 Message-Id: <20220208171823.226211-7-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> References: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert the Exynos HDMI DDC bindings to DT schema format. Signed-off-by: Krzysztof Kozlowski --- .../display/exynos/exynos_hdmiddc.txt | 15 ------- .../samsung/samsung,exynos-hdmi-ddc.yaml | 42 +++++++++++++++++++ 2 files changed, 42 insertions(+), 15 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/exynos/exynos= _hdmiddc.txt create mode 100644 Documentation/devicetree/bindings/display/samsung/samsu= ng,exynos-hdmi-ddc.yaml diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_hdmidd= c.txt b/Documentation/devicetree/bindings/display/exynos/exynos_hdmiddc.txt deleted file mode 100644 index 41eee971562b..000000000000 --- a/Documentation/devicetree/bindings/display/exynos/exynos_hdmiddc.txt +++ /dev/null @@ -1,15 +0,0 @@ -Device-Tree bindings for hdmiddc driver - -Required properties: -- compatible: value should be one of the following - 1) "samsung,exynos5-hdmiddc" - 2) "samsung,exynos4210-hdmiddc" - -- reg: I2C address of the hdmiddc device. - -Example: - - hdmiddc { - compatible =3D "samsung,exynos4210-hdmiddc"; - reg =3D <0x50>; - }; diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exyn= os-hdmi-ddc.yaml b/Documentation/devicetree/bindings/display/samsung/samsun= g,exynos-hdmi-ddc.yaml new file mode 100644 index 000000000000..f998a3a5b71f --- /dev/null +++ b/Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi= -ddc.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi-ddc= .yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC HDMI DDC + +maintainers: + - Inki Dae + - Joonyoung Shim + - Seung-Woo Kim + - Kyungmin Park + - Krzysztof Kozlowski + +properties: + compatible: + oneOf: + - const: samsung,exynos4210-hdmiddc + - const: samsung,exynos5-hdmiddc + deprecated: true + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + ddc@50 { + compatible =3D "samsung,exynos4210-hdmiddc"; + reg =3D <0x50>; + }; + }; --=20 2.32.0 From nobody Mon Jun 29 15:06:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88153C433FE for ; Tue, 8 Feb 2022 17:19:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383918AbiBHRTh (ORCPT ); Tue, 8 Feb 2022 12:19:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50000 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383653AbiBHRTX (ORCPT ); Tue, 8 Feb 2022 12:19:23 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F22D5C06129A for ; Tue, 8 Feb 2022 09:19:21 -0800 (PST) Received: from mail-ed1-f69.google.com (mail-ed1-f69.google.com [209.85.208.69]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id D00794003D for ; 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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id r10sm5125550ejy.148.2022.02.08.09.19.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Feb 2022 09:19:19 -0800 (PST) From: Krzysztof Kozlowski To: Inki Dae , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Kishon Vijay Abraham I , Vinod Koul , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: Marek Szyprowski , Sylwester Nawrocki Subject: [PATCH 07/10] dt-bindings: display: samsung,exynos-mixer: convert to dtschema Date: Tue, 8 Feb 2022 18:18:20 +0100 Message-Id: <20220208171823.226211-8-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> References: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert the Exynos Mixer bindings to DT schema format. The conversion includes also updates to the bindings, matching the current DTS and Linux driver: 1. Add clocks required on Exynos4210 and Exynos4212 types of Mixer. 2. Add second memory range on Exynos4210 and Exynos4212. 3. Add interconnects, iommus and power-domains. Signed-off-by: Krzysztof Kozlowski --- .../bindings/display/exynos/exynos_mixer.txt | 26 ---- .../display/samsung/samsung,exynos-mixer.yaml | 143 ++++++++++++++++++ 2 files changed, 143 insertions(+), 26 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/exynos/exynos= _mixer.txt create mode 100644 Documentation/devicetree/bindings/display/samsung/samsu= ng,exynos-mixer.yaml diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_mixer.= txt b/Documentation/devicetree/bindings/display/exynos/exynos_mixer.txt deleted file mode 100644 index 3e38128f866b..000000000000 --- a/Documentation/devicetree/bindings/display/exynos/exynos_mixer.txt +++ /dev/null @@ -1,26 +0,0 @@ -Device-Tree bindings for mixer driver - -Required properties: -- compatible: value should be one of the following: - 1) "samsung,exynos5-mixer" - 2) "samsung,exynos4210-mixer" - 3) "samsung,exynos4212-mixer" - 4) "samsung,exynos5250-mixer" - 5) "samsung,exynos5420-mixer" - -- reg: physical base address of the mixer and length of memory mapped - region. -- interrupts: interrupt number to the cpu. -- clocks: list of clock IDs from SoC clock driver. - a) mixer: Gate of Mixer IP bus clock. - b) sclk_hdmi: HDMI Special clock, one of the two possible inputs of - mixer mux. - c) hdmi: Gate of HDMI IP bus clock, needed together with sclk_hdmi. - -Example: - - mixer { - compatible =3D "samsung,exynos5250-mixer"; - reg =3D <0x14450000 0x10000>; - interrupts =3D <0 94 0>; - }; diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exyn= os-mixer.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,e= xynos-mixer.yaml new file mode 100644 index 000000000000..ba40284ac66f --- /dev/null +++ b/Documentation/devicetree/bindings/display/samsung/samsung,exynos-mixe= r.yaml @@ -0,0 +1,143 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/samsung/samsung,exynos-mixer.ya= ml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC Mixer + +maintainers: + - Inki Dae + - Joonyoung Shim + - Seung-Woo Kim + - Kyungmin Park + - Krzysztof Kozlowski + +description: + Samsung Exynos SoC Mixer is responsible for mixing and blending multiple= data + inputs before passing it to an output device. The output is passed to H= DMI. + +properties: + compatible: + oneOf: + - enum: + - samsung,exynos4210-mixer + - samsung,exynos4212-mixer + - samsung,exynos5250-mixer + - samsung,exynos5420-mixer + - const: samsung,exynos5-mixer + deprecated: true + + clocks: + minItems: 3 + items: + - description: Gate of Mixer IP bus clock. + - description: Gate of HDMI IP bus clock, needed together with sclk_= hdmi. + - description: HDMI Special clock, one of the two possible inputs of + mixer mux. + - description: Video Processor clock. + - description: Mixer mux clock. + - description: Mixer Special clock. + + clock-names: + minItems: 3 + items: + - const: mixer + - const: hdmi + - const: sclk_hdmi + - const: vp + - const: mout_mixer + - const: sclk_mixer + + interconnects: + maxItems: 1 + + interrupts: + maxItems: 1 + + iommus: + maxItems: 1 + + power-domains: + maxItems: 1 + + reg: + minItems: 1 + items: + - description: Mixer memory region. + - description: Video Processor memory region. + +required: + - compatible + - clocks + - clock-names + - interrupts + - reg + +allOf: + - if: + properties: + compatible: + contains: + const: samsung,exynos4210-mixer + - samsung,exynos4212-mixer + then: + properties: + clocks: + minItems: 6 + maxItems: 6 + regs: + minItems: 2 + maxItems: 2 + + - if: + properties: + compatible: + contains: + const: samsung,exynos4212-mixer + then: + properties: + clocks: + minItems: 4 + maxItems: 4 + regs: + minItems: 2 + maxItems: 2 + + - if: + properties: + compatible: + contains: + enum: + - samsung,exynos5-mixer + - samsung,exynos5250-mixer + - samsung,exynos5420-mixer + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + regs: + minItems: 1 + maxItems: 1 + +additionalProperties: false + +examples: + - | + #include + #include + + mixer@14450000 { + compatible =3D "samsung,exynos5250-mixer"; + reg =3D <0x14450000 0x10000>; + interrupts =3D ; + clocks =3D <&clock CLK_MIXER>, + <&clock CLK_HDMI>, + <&clock CLK_SCLK_HDMI>; + clock-names =3D "mixer", + "hdmi", + "sclk_hdmi"; + iommus =3D <&sysmmu_tv>; + power-domains =3D <&pd_disp1>; + }; --=20 2.32.0 From nobody Mon Jun 29 15:06:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B2F8C433F5 for ; Tue, 8 Feb 2022 17:19:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383868AbiBHRTq (ORCPT ); Tue, 8 Feb 2022 12:19:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383496AbiBHRT0 (ORCPT ); Tue, 8 Feb 2022 12:19:26 -0500 Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CB9CDC061578 for ; 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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id r10sm5125550ejy.148.2022.02.08.09.19.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Feb 2022 09:19:21 -0800 (PST) From: Krzysztof Kozlowski To: Inki Dae , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Kishon Vijay Abraham I , Vinod Koul , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: Marek Szyprowski , Sylwester Nawrocki Subject: [PATCH 08/10] dt-bindings: display: samsung,exynos-hdmi: convert to dtschema Date: Tue, 8 Feb 2022 18:18:21 +0100 Message-Id: <20220208171823.226211-9-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> References: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert the Exynos HDMI bindings to DT schema format. The conversion includes also updates to the bindings, matching the current DTS and Linux driver: 1. Add required properties: VDD supplies, power-domains. 2. Add optional properties: HDMI-EN supply, ports. Signed-off-by: Krzysztof Kozlowski --- .../bindings/display/exynos/exynos_hdmi.txt | 64 ----- .../display/samsung/samsung,exynos-hdmi.yaml | 227 ++++++++++++++++++ 2 files changed, 227 insertions(+), 64 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/exynos/exynos= _hdmi.txt create mode 100644 Documentation/devicetree/bindings/display/samsung/samsu= ng,exynos-hdmi.yaml diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.t= xt b/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt deleted file mode 100644 index 58b12e25bbb1..000000000000 --- a/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt +++ /dev/null @@ -1,64 +0,0 @@ -Device-Tree bindings for drm hdmi driver - -Required properties: -- compatible: value should be one among the following: - 1) "samsung,exynos4210-hdmi" - 2) "samsung,exynos4212-hdmi" - 3) "samsung,exynos5420-hdmi" - 4) "samsung,exynos5433-hdmi" -- reg: physical base address of the hdmi and length of memory mapped - region. -- interrupts: interrupt number to the cpu. -- hpd-gpios: following information about the hotplug gpio pin. - a) phandle of the gpio controller node. - b) pin number within the gpio controller. - c) optional flags and pull up/down. -- ddc: phandle to the hdmi ddc node -- phy: phandle to the hdmi phy node -- samsung,syscon-phandle: phandle for system controller node for PMU. -- #sound-dai-cells: should be 0. - -Required properties for Exynos 4210, 4212, 5420 and 5433: -- clocks: list of clock IDs from SoC clock driver. - a) hdmi: Gate of HDMI IP bus clock. - b) sclk_hdmi: Gate of HDMI special clock. - c) sclk_pixel: Pixel special clock, one of the two possible inputs of - HDMI clock mux. - d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of - HDMI clock mux. - e) mout_hdmi: It is required by the driver to switch between the 2 - parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable - after configuration, parent is set to sclk_hdmiphy else - sclk_pixel. -- clock-names: aliases as per driver requirements for above clock IDs: - "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi". - -Required properties for Exynos 5433: -- clocks: list of clock specifiers according to common clock bindings. - a) hdmi_pclk: Gate of HDMI IP APB bus. - b) hdmi_i_pclk: Gate of HDMI-PHY IP APB bus. - d) i_tmds_clk: Gate of HDMI TMDS clock. - e) i_pixel_clk: Gate of HDMI pixel clock. - f) i_spdif_clk: Gate of HDMI SPDIF clock. - g) oscclk: Oscillator clock, used as parent of following *_user clocks - in case HDMI-PHY is not operational. - h) tmds_clko: TMDS clock generated by HDMI-PHY. - i) tmds_clko_user: MUX used to switch between oscclk and tmds_clko, - respectively if HDMI-PHY is off and operational. - j) pixel_clko: Pixel clock generated by HDMI-PHY. - k) pixel_clko_user: MUX used to switch between oscclk and pixel_clko, - respectively if HDMI-PHY is off and operational. -- clock-names: aliases for above clock specfiers. -- samsung,sysreg: handle to syscon used to control the system registers. - -Example: - - hdmi { - compatible =3D "samsung,exynos4212-hdmi"; - reg =3D <0x14530000 0x100000>; - interrupts =3D <0 95 0>; - hpd-gpios =3D <&gpx3 7 1>; - ddc =3D <&hdmi_ddc_node>; - phy =3D <&hdmi_phy_node>; - samsung,syscon-phandle =3D <&pmu_system_controller>; - }; diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exyn= os-hdmi.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,ex= ynos-hdmi.yaml new file mode 100644 index 000000000000..cb8e735ce3bd --- /dev/null +++ b/Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi= .yaml @@ -0,0 +1,227 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yam= l# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos SoC HDMI + +maintainers: + - Inki Dae + - Joonyoung Shim + - Seung-Woo Kim + - Kyungmin Park + - Krzysztof Kozlowski + +properties: + compatible: + enum: + - samsung,exynos4210-hdmi + - samsung,exynos4212-hdmi + - samsung,exynos5420-hdmi + - samsung,exynos5433-hdmi + + clocks: + minItems: 5 + maxItems: 10 + + clock-names: + minItems: 5 + maxItems: 10 + + ddc: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the HDMI DDC node. + + hdmi-en-supply: + description: + Provides voltage source for DCC lines available on HDMI connector. W= hen + there is no power provided for DDC epprom, some TV-sets do not pulls= up + HPD (hot plug detect) line, what causes HDMI block to stay turned of= f. + When provided, the regulator allows TV-set correctly signal HPD even= t. + + hpd-gpios: + maxItems: 1 + description: + A GPIO line connected to HPD + + interrupts: + maxItems: 1 + + phy: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to the HDMI PHY node. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: + Contains a port which is connected to mic node. + + power-domains: + maxItems: 1 + + reg: + maxItems: 1 + + samsung,syscon-phandle: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the PMU system controller node. + + samsung,sysreg-phandle: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to DISP system controller interface. + + '#sound-dai-cells': + const: 0 + + vdd-supply: + description: + VDD 1.0V HDMI TX. + + vdd_osc-supply: + description: + VDD 1.8V HDMI OSC. + + vdd_pll-supply: + description: + VDD 1.0V HDMI PLL. + +required: + - compatible + - clocks + - clock-names + - ddc + - hpd-gpios + - interrupts + - phy + - reg + - samsung,syscon-phandle + - '#sound-dai-cells' + - vdd-supply + - vdd_osc-supply + - vdd_pll-supply + +allOf: + - if: + properties: + compatible: + contains: + const: samsung,exynos5433-hdmi + then: + properties: + clocks: + items: + - description: Gate of HDMI IP APB bus. + - description: Gate of HDMI-PHY IP APB bus. + - description: Gate of HDMI TMDS clock. + - description: Gate of HDMI pixel clock. + - description: TMDS clock generated by HDMI-PHY. + - description: MUX used to switch between oscclk and tmds_clko, + respectively if HDMI-PHY is off and operational. + - description: Pixel clock generated by HDMI-PHY. + - description: MUX used to switch between oscclk and pixel_clk= o, + respectively if HDMI-PHY is off and operational. + - description: Oscillator clock, used as parent of following *= _user + clocks in case HDMI-PHY is not operational. + - description: Gate of HDMI SPDIF clock. + clock-names: + items: + - const: hdmi_pclk + - const: hdmi_i_pclk + - const: i_tmds_clk + - const: i_pixel_clk + - const: tmds_clko + - const: tmds_clko_user + - const: pixel_clko + - const: pixel_clko_user + - const: oscclk + - const: i_spdif_clk + required: + - samsung,sysreg-phandle + else: + properties: + clocks: + items: + - description: Gate of HDMI IP bus clock. + - description: Gate of HDMI special clock. + - description: Pixel special clock, one of the two possible in= puts + of HDMI clock mux. + - description: HDMI PHY clock output, one of two possible inpu= ts of + HDMI clock mux. + - description: It is required by the driver to switch between = the 2 + parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is st= able + after configuration, parent is set to sclk_hdmiphy else + sclk_pixel. + clock-names: + items: + - const: hdmi + - const: sclk_hdmi + - const: sclk_pixel + - const: sclk_hdmiphy + - const: mout_hdmi + +additionalProperties: false + +examples: + - | + #include + #include + #include + + hdmi@13970000 { + compatible =3D "samsung,exynos5433-hdmi"; + reg =3D <0x13970000 0x70000>; + interrupts =3D ; + clocks =3D <&cmu_disp CLK_PCLK_HDMI>, + <&cmu_disp CLK_PCLK_HDMIPHY>, + <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO>, + <&cmu_disp CLK_PHYCLK_HDMI_PIXEL>, + <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY>, + <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_TMDS_CLKO_USER>, + <&cmu_disp CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY>, + <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_PIXEL_CLKO_USER>, + <&xxti>, + <&cmu_disp CLK_SCLK_HDMI_SPDIF>; + clock-names =3D "hdmi_pclk", + "hdmi_i_pclk", + "i_tmds_clk", + "i_pixel_clk", + "tmds_clko", + "tmds_clko_user", + "pixel_clko", + "pixel_clko_user", + "oscclk", + "i_spdif_clk"; + phy =3D <&hdmiphy>; + ddc =3D <&hsi2c_11>; + samsung,syscon-phandle =3D <&pmu_system_controller>; + samsung,sysreg-phandle =3D <&syscon_disp>; + #sound-dai-cells =3D <0>; + + hpd-gpios =3D <&gpa3 0 GPIO_ACTIVE_HIGH>; + vdd-supply =3D <&ldo6_reg>; + vdd_osc-supply =3D <&ldo7_reg>; + vdd_pll-supply =3D <&ldo6_reg>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + hdmi_to_tv: endpoint { + remote-endpoint =3D <&tv_to_hdmi>; + }; + }; + + port@1 { + reg =3D <1>; + hdmi_to_mhl: endpoint { + remote-endpoint =3D <&mhl_to_hdmi>; + }; + }; + }; + }; --=20 2.32.0 From nobody Mon Jun 29 15:06:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53D1FC433FE for ; Tue, 8 Feb 2022 17:19:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1384110AbiBHRTt (ORCPT ); Tue, 8 Feb 2022 12:19:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383765AbiBHRT0 (ORCPT ); Tue, 8 Feb 2022 12:19:26 -0500 Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66FCDC0613C9 for ; Tue, 8 Feb 2022 09:19:25 -0800 (PST) Received: from mail-ej1-f72.google.com (mail-ej1-f72.google.com [209.85.218.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 1F80940052 for ; Tue, 8 Feb 2022 17:19:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1644340764; bh=kMaTNaBI2iO4IYdjvaEgTk0fgCfiFl3MO+VYGfyVvmE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=S8YUe039q0V1YHkmtynFNIq+AVYiyRPZRKPsc4cX0Wql8lXdj56wkiWRzxBA//XjA u6eIfs63mdd8r46ODSZRRV0nsOs1NwADKjFq5hsUgbtY/6q+C/N2lSa3xVx6ZVBvM8 4292xgIwkOBZcgelQtcRg40B+WgCEiB2Y0Ac5nn8RmWrO4u2Bam2ECb/ky6OFXFiXe kEjTWhFr3kuDdRbEus/d8gatLLVKwAWBT2Uz5tQ2GcztMzUOLp2lkl7+f19ly2Icdg cd0LTOys6T89DJIMgmpI1/euGHvTXTrCN2CR84mj9VJFUXvVFLLEKNMw8iVj9XbfWy AYhPpzCx3OWtw== Received: by mail-ej1-f72.google.com with SMTP id 13-20020a170906328d00b006982d0888a4so5990471ejw.9 for ; Tue, 08 Feb 2022 09:19:24 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kMaTNaBI2iO4IYdjvaEgTk0fgCfiFl3MO+VYGfyVvmE=; b=P8TTCsQFxUSfcLKTmd6ylXlwsCMjPzi7RzK4ZMnX9CGhVsBdb7KsdIZeAx2CXcmxrn oFuZmbcMm+ZJx8XKFwfbvBAzWu0wiZEOLHHQ1vvkVnkrHQvGKPJ80NSizn2wmIzNKB11 eCHi94kdK9gIOv37RVtwyk7Ubdx3Lk0pcJoD/3omhaf45ut8WHFaKV2Tjrn+4rIvNi0k xVp2ingz/I73RmnIAsCKr2qVTw+Zee5f7e3NQ74ZWIt4BmKgzQz1cIOfc0DrTeYznpZO vgmKCMzhjQaX8+pikRdLc5/VIHCF5/o68394rZWIcbWTz51bRTkjkXooTddUhzTdKM1A wj5w== X-Gm-Message-State: AOAM531jEC6a1lPJRYGZcIwv80SM2txCB9Q3EesLnVMqE/EdytTopRaa i2HF7gXzhhK8A6US2fHILlau28tKPdoDhY8MqW9a0bBKIA3s2mBDQwwXF38qxx6Tqpjfxpx82tV iNTECXq8SeQLzPwPkFWHTcbXSDO3FCdK/WAZrWir0bw== X-Received: by 2002:aa7:d809:: with SMTP id v9mr5652415edq.2.1644340763449; Tue, 08 Feb 2022 09:19:23 -0800 (PST) X-Google-Smtp-Source: ABdhPJwlLGYgUd+Cr4yCQlVE0VWHIHMy+r8JCbb5AQJa47VNi9iyYKn2B1Q1E+kn15abkGcHd22WRg== X-Received: by 2002:aa7:d809:: with SMTP id v9mr5652400edq.2.1644340763212; Tue, 08 Feb 2022 09:19:23 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id r10sm5125550ejy.148.2022.02.08.09.19.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Feb 2022 09:19:22 -0800 (PST) From: Krzysztof Kozlowski To: Inki Dae , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Kishon Vijay Abraham I , Vinod Koul , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: Marek Szyprowski , Sylwester Nawrocki Subject: [PATCH 09/10] dt-bindings: display: samsung,exynos5433-mic: convert to dtschema Date: Tue, 8 Feb 2022 18:18:22 +0100 Message-Id: <20220208171823.226211-10-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> References: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert the Exynos5433 MIC bindings to DT schema format. The conversion includes also updates to the bindings, matching the current DTS and Linux driver: adding optional power-domains. Signed-off-by: Krzysztof Kozlowski --- .../bindings/display/exynos/exynos-mic.txt | 51 ---------- .../samsung/samsung,exynos5433-mic.yaml | 95 +++++++++++++++++++ 2 files changed, 95 insertions(+), 51 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/exynos/exynos= -mic.txt create mode 100644 Documentation/devicetree/bindings/display/samsung/samsu= ng,exynos5433-mic.yaml diff --git a/Documentation/devicetree/bindings/display/exynos/exynos-mic.tx= t b/Documentation/devicetree/bindings/display/exynos/exynos-mic.txt deleted file mode 100644 index 0fba2ee6440a..000000000000 --- a/Documentation/devicetree/bindings/display/exynos/exynos-mic.txt +++ /dev/null @@ -1,51 +0,0 @@ -Device-Tree bindings for Samsung Exynos SoC mobile image compressor (MIC) - -MIC (mobile image compressor) resides between decon and mipi dsi. Mipi dsi= is -not capable to transfer high resoltuion frame data as decon can send. MIC -solves this problem by compressing the frame data by 1/2 before it is -transferred through mipi dsi. The compressed frame data must be uncompress= ed in -the panel PCB. - -Required properties: -- compatible: value should be "samsung,exynos5433-mic". -- reg: physical base address and length of the MIC registers set and system - register of mic. -- clocks: must include clock specifiers corresponding to entries in the - clock-names property. -- clock-names: list of clock names sorted in the same order as the clocks - property. Must contain "pclk_mic0", "sclk_rgb_vclk_to_mic0". -- samsung,disp-syscon: the reference node for syscon for DISP block. -- ports: contains a port which is connected to decon node and dsi node. - address-cells and size-cells must 1 and 0, respectively. -- port: contains an endpoint node which is connected to the endpoint in the - decon node or dsi node. The reg value must be 0 and 1 respectively. - -Example: -SoC specific DT entry: -mic: mic@13930000 { - compatible =3D "samsung,exynos5433-mic"; - reg =3D <0x13930000 0x48>; - clocks =3D <&cmu_disp CLK_PCLK_MIC0>, - <&cmu_disp CLK_SCLK_RGB_VCLK_TO_MIC0>; - clock-names =3D "pclk_mic0", "sclk_rgb_vclk_to_mic0"; - samsung,disp-syscon =3D <&syscon_disp>; - - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - - port@0 { - reg =3D <0>; - mic_to_decon: endpoint { - remote-endpoint =3D <&decon_to_mic>; - }; - }; - - port@1 { - reg =3D <1>; - mic_to_dsi: endpoint { - remote-endpoint =3D <&dsi_to_mic>; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exyn= os5433-mic.yaml b/Documentation/devicetree/bindings/display/samsung/samsung= ,exynos5433-mic.yaml new file mode 100644 index 000000000000..01fccb138ebd --- /dev/null +++ b/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-= mic.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/samsung/samsung,exynos5433-mic.= yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos5433 SoC Mobile Image Compressor (MIC) + +maintainers: + - Inki Dae + - Joonyoung Shim + - Seung-Woo Kim + - Kyungmin Park + - Krzysztof Kozlowski + +description: | + MIC (Mobile Image Compressor) resides between DECON and MIPI DSI. MIPI D= SI is + not capable of transferring high resoltuion frame data as DECON can send= . MIC + solves this problem by compressing the frame data by 1/2 before it is + transferred through MIPI DSI. The compressed frame data must be uncompre= ssed + in the panel PCB. + +properties: + compatible: + const: samsung,exynos5433-mic + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: pclk_mic0 + - const: sclk_rgb_vclk_to_mic0 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: + Contains a port which is connected to mic node. + + power-domains: + maxItems: 1 + + reg: + maxItems: 1 + + samsung,disp-syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to DISP system controller interface. + +required: + - compatible + - clocks + - clock-names + - ports + - reg + - samsung,disp-syscon + +additionalProperties: false + +examples: + - | + #include + #include + + image-processor@13930000 { + compatible =3D "samsung,exynos5433-mic"; + reg =3D <0x13930000 0x48>; + clocks =3D <&cmu_disp CLK_PCLK_MIC0>, + <&cmu_disp CLK_SCLK_RGB_VCLK_TO_MIC0>; + clock-names =3D "pclk_mic0", + "sclk_rgb_vclk_to_mic0"; + power-domains =3D <&pd_disp>; + samsung,disp-syscon =3D <&syscon_disp>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + mic_to_decon: endpoint { + remote-endpoint =3D <&decon_to_mic>; + }; + }; + + port@1 { + reg =3D <1>; + mic_to_dsi: endpoint { + remote-endpoint =3D <&dsi_to_mic>; + }; + }; + }; + }; --=20 2.32.0 From nobody Mon Jun 29 15:06:21 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 242F8C433EF for ; Tue, 8 Feb 2022 17:19:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1381363AbiBHRTw (ORCPT ); Tue, 8 Feb 2022 12:19:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50210 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383870AbiBHRTa (ORCPT ); Tue, 8 Feb 2022 12:19:30 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CDEECC061579 for ; Tue, 8 Feb 2022 09:19:28 -0800 (PST) Received: from mail-ej1-f71.google.com (mail-ej1-f71.google.com [209.85.218.71]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id AB36240050 for ; Tue, 8 Feb 2022 17:19:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1644340767; bh=4Kqc6L6Q9tC6aVZ4IcSd8iWDDGh3wUIB157CLAeaaFw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=UFWEQ/Dv+i3gLblZjeZWbvQMWKUiPylCrm2wrHUCUDD/xBOAA8A0KG7TfZ83jNiuk 902GqxA561IEplS8FPoA6liEWnbsr4y0YLPuQ+PzK0k+pDSGwHgT4RLTx8WzKP2HPM wy9pbQEg1bY7v7QAiybExC65OQXhUUn+QqPBxzYveo/EgBwmXxfFYL7mzefMrMrmxk jlut7Oo8llCe3FrivAjS74VkjTtGgseTopz+2EiH7JlT2LYQTAEGSkvGGTpSrIljw5 M/WBFzpP8jabCvxnbyuayS9RF7IZ5vYjp2nbJT/mK8GGvCcZgo1BKyHxiQFKLMACZe jm/obUqbigSzg== Received: by mail-ej1-f71.google.com with SMTP id aj9-20020a1709069a4900b006cd205be806so1145690ejc.18 for ; Tue, 08 Feb 2022 09:19:27 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4Kqc6L6Q9tC6aVZ4IcSd8iWDDGh3wUIB157CLAeaaFw=; b=GZYgsN78RrHQ2dpUAWg2AfkrlCkJwSzdfeq8FgggM2VNxAJKKr3NDwsZXrSjJfOAAk /k/mUA3icft6aSOSKtxrwRK8aQjP19UQY2IFRWvgoc03sEoJwpvT96zGkyYsriUvTK4u xzTswdHt5VuwYcoUGUzm65e8g65uHHnY8mNC5aZo1KyB/gkvUVCc+UKG17/gvJ7s7tWG bSqzGh39CuOioRSYpABD7R1C+KlbvN2S0uYzDzBaS4k9HbA1caqOYDvtThm8MRbeybDE fRJkLPfBX3yHyNsO1GzsYRO98nrgbq9QwsywcIP0s/Ek+pS/SA75uFjum/qCUTr9gp1c JZuw== X-Gm-Message-State: AOAM533gCjMRwGq6u+1voAFScw3EhtvOIqkkpKK6u5VDkXBs5KVusxSv tEOZ+VqkcLFbvTO+HCfiKdHMtFUyOOSic8XGWbG8w2n07GzsNnHOA/qZWe4v1HZpfOJ3tGFRTPu alJT+clmT5hX7pKrfn6sDsurPOIPHDsF44hZ6LiCA3A== X-Received: by 2002:a05:6402:510b:: with SMTP id m11mr5597645edd.290.1644340765084; Tue, 08 Feb 2022 09:19:25 -0800 (PST) X-Google-Smtp-Source: ABdhPJxRZNXcZzMs0TAC2gPdxKPihRqli2IMBZU42Ls1ax0iChpkOJ4tgyVxzgjOsC0cDw2k6wkGXQ== X-Received: by 2002:a05:6402:510b:: with SMTP id m11mr5597617edd.290.1644340764811; Tue, 08 Feb 2022 09:19:24 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id r10sm5125550ejy.148.2022.02.08.09.19.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Feb 2022 09:19:24 -0800 (PST) From: Krzysztof Kozlowski To: Inki Dae , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Kishon Vijay Abraham I , Vinod Koul , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: Marek Szyprowski , Sylwester Nawrocki Subject: [PATCH 10/10] dt-bindings: display: samsung,exynos-fimd: convert to dtschema Date: Tue, 8 Feb 2022 18:18:23 +0100 Message-Id: <20220208171823.226211-11-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> References: <20220208171823.226211-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert the S3C/S5P/Exynos FIMD bindings to DT schema format. The conversion includes also updates to the bindings, matching the current DTS and Linux driver: adding optional iommus and power-domains. Signed-off-by: Krzysztof Kozlowski --- .../bindings/display/exynos/samsung-fimd.txt | 107 ---------- .../display/samsung/samsung,fimd.yaml | 198 ++++++++++++++++++ 2 files changed, 198 insertions(+), 107 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/exynos/samsun= g-fimd.txt create mode 100644 Documentation/devicetree/bindings/display/samsung/samsu= ng,fimd.yaml diff --git a/Documentation/devicetree/bindings/display/exynos/samsung-fimd.= txt b/Documentation/devicetree/bindings/display/exynos/samsung-fimd.txt deleted file mode 100644 index b3096421d42b..000000000000 --- a/Documentation/devicetree/bindings/display/exynos/samsung-fimd.txt +++ /dev/null @@ -1,107 +0,0 @@ -Device-Tree bindings for Samsung SoC display controller (FIMD) - -FIMD (Fully Interactive Mobile Display) is the Display Controller for the -Samsung series of SoCs which transfers the image data from a video memory -buffer to an external LCD interface. - -Required properties: -- compatible: value should be one of the following - "samsung,s3c2443-fimd"; /* for S3C24XX SoCs */ - "samsung,s3c6400-fimd"; /* for S3C64XX SoCs */ - "samsung,s5pv210-fimd"; /* for S5PV210 SoC */ - "samsung,exynos3250-fimd"; /* for Exynos3250/3472 SoCs */ - "samsung,exynos4210-fimd"; /* for Exynos4 SoCs */ - "samsung,exynos5250-fimd"; /* for Exynos5250 SoCs */ - "samsung,exynos5420-fimd"; /* for Exynos5420/5422/5800 SoCs */ - -- reg: physical base address and length of the FIMD registers set. - -- interrupts: should contain a list of all FIMD IP block interrupts in the - order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier - format depends on the interrupt controller used. - -- interrupt-names: should contain the interrupt names: "fifo", "vsync", - "lcd_sys", in the same order as they were listed in the interrupts - property. - -- pinctrl-0: pin control group to be used for this controller. - -- pinctrl-names: must contain a "default" entry. - -- clocks: must include clock specifiers corresponding to entries in the - clock-names property. - -- clock-names: list of clock names sorted in the same order as the clocks - property. Must contain "sclk_fimd" and "fimd". - -Optional Properties: -- power-domains: a phandle to FIMD power domain node. -- samsung,invert-vden: video enable signal is inverted -- samsung,invert-vclk: video clock signal is inverted -- display-timings: timing settings for FIMD, as described in document [1]. - Can be used in case timings cannot be provided otherwise - or to override timings provided by the panel. -- samsung,sysreg: handle to syscon used to control the system registers -- i80-if-timings: timing configuration for lcd i80 interface support. - - cs-setup: clock cycles for the active period of address signal is enab= led - until chip select is enabled. - If not specified, the default value(0) will be used. - - wr-setup: clock cycles for the active period of CS signal is enabled u= ntil - write signal is enabled. - If not specified, the default value(0) will be used. - - wr-active: clock cycles for the active period of CS is enabled. - If not specified, the default value(1) will be used. - - wr-hold: clock cycles for the active period of CS is disabled until wr= ite - signal is disabled. - If not specified, the default value(0) will be used. - - The parameters are defined as: - - VCLK(internal) __|??????|_____|??????|_____|??????|_____|??????|_____= |?? - : : : : : - Address Output --:| : : : - Chip Select ???????????????|____________:____________:____________= |?? - | wr-setup+1 | | wr-hold+1 | - |<---------->| |<---------->| - Write Enable ????????????????????????????|____________|????????????= ??? - | wr-active+1| - |<---------->| - Video Data ------------------------------ - -The device node can contain 'port' child nodes according to the bindings d= efined -in [2]. The following are properties specific to those nodes: -- reg: (required) port index, can be: - 0 - for CAMIF0 input, - 1 - for CAMIF1 input, - 2 - for CAMIF2 input, - 3 - for parallel output, - 4 - for write-back interface - -[1]: Documentation/devicetree/bindings/display/panel/display-timing.txt -[2]: Documentation/devicetree/bindings/media/video-interfaces.txt - -Example: - -SoC specific DT entry: - - fimd@11c00000 { - compatible =3D "samsung,exynos4210-fimd"; - interrupt-parent =3D <&combiner>; - reg =3D <0x11c00000 0x20000>; - interrupt-names =3D "fifo", "vsync", "lcd_sys"; - interrupts =3D <11 0>, <11 1>, <11 2>; - clocks =3D <&clock 140>, <&clock 283>; - clock-names =3D "sclk_fimd", "fimd"; - power-domains =3D <&pd_lcd0>; - status =3D "disabled"; - }; - -Board specific DT entry: - - fimd@11c00000 { - pinctrl-0 =3D <&lcd_clk &lcd_data24 &pwm1_out>; - pinctrl-names =3D "default"; - status =3D "okay"; - }; diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,fimd= .yaml b/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml new file mode 100644 index 000000000000..9cf5f120d516 --- /dev/null +++ b/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml @@ -0,0 +1,198 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/samsung/samsung,fimd.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S3C/S5P/Exynos SoC Fully Interactive Mobile Display (FIMD) + +maintainers: + - Inki Dae + - Joonyoung Shim + - Seung-Woo Kim + - Kyungmin Park + - Krzysztof Kozlowski + +properties: + compatible: + enum: + - samsung,s3c2443-fimd + - samsung,s3c6400-fimd + - samsung,s5pv210-fimd + - samsung,exynos3250-fimd + - samsung,exynos4210-fimd + - samsung,exynos5250-fimd + - samsung,exynos5420-fimd + + '#address-cells': + const: 1 + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: sclk_fimd + - const: fimd + + display-timings: + $ref: ../panel/display-timings.yaml# + + i80-if-timings: + type: object + description: | + Timing configuration for lcd i80 interface support. + The parameters are defined as:: + VCLK(internal) __|??????|_____|??????|_____|??????|_____|??????|___= __|?? + : : : : = : + Address Output --:| : : = : + Chip Select ???????????????|____________:____________:__________= __|?? + | wr-setup+1 | | wr-hold+1= | + |<---------->| |<---------= ->| + Write Enable ????????????????????????????|____________|??????????= ????? + | wr-active+1| + |<---------->| + Video Data ------------------------------ + + properties: + cs-setup: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Clock cycles for the active period of address signal is enabled = until + chip select is enabled. + default: 0 + + wr-active: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Clock cycles for the active period of CS is enabled. + default: 1 + + wr-hold: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Clock cycles for the active period of CS is disabled until write + signal is disabled. + default: 0 + + wr-setup: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Clock cycles for the active period of CS signal is enabled until + write signal is enabled. + default: 0 + + iommus: + minItems: 1 + maxItems: 2 + + iommu-names: + items: + - const: m0 + - const: m1 + + interrupts: + items: + - description: FIFO level + - description: VSYNC + - description: LCD system + + interrupt-names: + items: + - const: fifo + - const: vsync + - const: lcd_sys + + power-domains: + maxItems: 1 + + reg: + maxItems: 1 + + samsung,invert-vden: + type: boolean + description: + Video enable signal is inverted. + + samsung,invert-vclk: + type: boolean + description: + Video clock signal is inverted. + + samsung,sysreg: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to System Register syscon. + + '#size-cells': + const: 0 + +patternProperties: + "^port@[0-4]+$": + $ref: /schemas/graph.yaml#/properties/port + description: | + Contains ports with port with index:: + 0 - for CAMIF0 input, + 1 - for CAMIF1 input, + 2 - for CAMIF2 input, + 3 - for parallel output, + 4 - for write-back interface + +required: + - compatible + - clocks + - clock-names + - interrupts + - interrupt-names + - reg + +allOf: + - if: + properties: + compatible: + contains: + const: samsung,exynos5420-fimd + then: + properties: + iommus: + minItems: 2 + maxItems: 2 + +additionalProperties: false + +examples: + - | + #include + + fimd@11c00000 { + compatible =3D "samsung,exynos4210-fimd"; + interrupt-parent =3D <&combiner>; + reg =3D <0x11c00000 0x20000>; + interrupt-names =3D "fifo", "vsync", "lcd_sys"; + interrupts =3D <11 0>, <11 1>, <11 2>; + clocks =3D <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>; + clock-names =3D "sclk_fimd", "fimd"; + power-domains =3D <&pd_lcd0>; + iommus =3D <&sysmmu_fimd0>; + samsung,sysreg =3D <&sys_reg>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + samsung,invert-vden; + samsung,invert-vclk; + + pinctrl-0 =3D <&lcd_clk>, <&lcd_data24>; + pinctrl-names =3D "default"; + + port@3 { + reg =3D <3>; + + fimd_dpi_ep: endpoint { + remote-endpoint =3D <&lcd_ep>; + }; + }; + }; --=20 2.32.0