From nobody Mon Jun 29 16:45:35 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB70DC4167D for ; Mon, 7 Feb 2022 09:37:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351618AbiBGJgA (ORCPT ); Mon, 7 Feb 2022 04:36:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57168 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351369AbiBGJ3E (ORCPT ); Mon, 7 Feb 2022 04:29:04 -0500 Received: from mail-ej1-x62e.google.com (mail-ej1-x62e.google.com [IPv6:2a00:1450:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 77172C0401C9 for ; Mon, 7 Feb 2022 01:29:03 -0800 (PST) Received: by mail-ej1-x62e.google.com with SMTP id ka4so40037305ejc.11 for ; Mon, 07 Feb 2022 01:29:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bo43NL5WgxumOcYzft9YAYcZtXZd3PhX1zRfnI8bjDk=; b=S7RBonqahTYRFKv7WG0mmEYJJUzc1lgwjVMm8b+J3T/EUN6iZ8uhtXgqlWMh/1b02H ziD4Jceqsrha8UsKrCqJLi6sYRh3v0gX03YdSTgjoYTGIFrTkz4d8NsCzgrZmMvLkhSS IJFIIqbi2s4GUNqR4ybTImL1wVgby+8h+spx97Hjjnzw+uoE+8haTHw246kq6cKBJa2m EO3tp78lnmVbiKHkTbGRKyfaaIx+BOPYpje3NoZIi/x3Im8yggUgGsrUI4dj0oD189Lk isHgXScgpluL5s1p2TdqTuZYiLN1MDPjLN2bzfRw8b/HCb0xMyn8N6Z+3sGdjoN6cX03 BNuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bo43NL5WgxumOcYzft9YAYcZtXZd3PhX1zRfnI8bjDk=; b=RlsWZ6Ww1AAuhwMfUWCg/zS4lUfdR1vZ/7+/oVhc82HyP7QQipNktK2M0YGy44dEbr rnlk4NJOpACUxSZumnjhAiqfhBvPA50GVzb/QIAMBf3PMg6OzQjw/njO1HPHYtoehsJ+ 15/vOUuK4N9PcFSoC779GUtxEHNjU1h8Tfu6UzP3KIce0maJXKjCDIcqVNt2P4lDmoy+ UjyoR6npEqPCXOraK+iiN7frnT6uItvPHaYsor0qPoqfnRdgc24wfahcsS41vt+oU48l 4WXvF4R0qHgP9ItNdQMfgb1AUf74tB0Ch4Q/BfiER75ZfuHPPfqmqWADOYuMwJKrkkBo oOlQ== X-Gm-Message-State: AOAM533v0PRdUyXKT/xNNXpdulei4eIVb+je4NUSYFO2/Lj1GkIRKWw5 /UoZMc6OnFurjzqnZJdwVnom3uJ8m3RiyQ== X-Google-Smtp-Source: ABdhPJwCNcxbMgelqPsgWm8NLd9TU9xw8/NWgJ2eG5AoiN83uWaWirK6U4CMqrjTGzjaanZoefwM7g== X-Received: by 2002:a17:906:2bd9:: with SMTP id n25mr9298896ejg.359.1644226142042; Mon, 07 Feb 2022 01:29:02 -0800 (PST) Received: from fedora.. (ip-088-153-139-166.um27.pools.vodafone-ip.de. [88.153.139.166]) by smtp.gmail.com with ESMTPSA id g9sm3487059ejm.152.2022.02.07.01.29.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Feb 2022 01:29:01 -0800 (PST) From: Patrick Rudolph To: Peter Rosin , Laurent Pinchart Cc: Patrick Rudolph , Rob Herring , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [v4 1/3] dt-bindings: i2c: Add Maxim MAX735x/MAX736x variants Date: Mon, 7 Feb 2022 10:28:24 +0100 Message-Id: <20220207092827.104978-2-patrick.rudolph@9elements.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220207092827.104978-1-patrick.rudolph@9elements.com> References: <20220207092827.104978-1-patrick.rudolph@9elements.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Update the pca954x bindings to add support for the Maxim MAX735x/MAX736x chips. The functionality will be provided by the exisintg pca954x driver. While on it make the interrupts support conditionally as not all of the existing chips have interrupts. For chips that are powered off by default add an optional regulator called vdd-supply. Signed-off-by: Patrick Rudolph Reviewed-by: Rob Herring --- .../bindings/i2c/i2c-mux-pca954x.yaml | 44 ++++++++++++++----- 1 file changed, 34 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml b/D= ocumentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml index 9f1726d0356b..8d90127b06ce 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml @@ -4,21 +4,48 @@ $id: http://devicetree.org/schemas/i2c/i2c-mux-pca954x.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: NXP PCA954x I2C bus switch +title: NXP PCA954x I2C and compatible bus switches =20 maintainers: - Laurent Pinchart =20 description: - The binding supports NXP PCA954x and PCA984x I2C mux/switch devices. + The binding supports NXP PCA954x and PCA984x I2C mux/switch devices, + and the Maxim MAX735x and MAX736x I2C mux/switch devices. =20 allOf: - $ref: /schemas/i2c/i2c-mux.yaml# + - if: + properties: + compatible: + contains: + enum: + - maxim,max7367 + - maxim,max7369 + - nxp,pca9542 + - nxp,pca9543 + - nxp,pca9544 + - nxp,pca9545 + then: + properties: + interrupts: + maxitems: 1 + + "#interrupt-cells": + const: 2 + + interrupt-controller: true =20 properties: compatible: oneOf: - enum: + - maxim,max7356 + - maxim,max7357 + - maxim,max7358 + - maxim,max7367 + - maxim,max7368 + - maxim,max7369 - nxp,pca9540 - nxp,pca9542 - nxp,pca9543 @@ -38,14 +65,6 @@ properties: reg: maxItems: 1 =20 - interrupts: - maxItems: 1 - - "#interrupt-cells": - const: 2 - - interrupt-controller: true - reset-gpios: maxItems: 1 =20 @@ -59,6 +78,9 @@ properties: description: if present, overrides i2c-mux-idle-disconnect $ref: /schemas/mux/mux-controller.yaml#/properties/idle-state =20 + vdd-supply: + description: A voltage regulator supplying power to the chip. + required: - compatible - reg @@ -79,6 +101,8 @@ examples: #size-cells =3D <0>; reg =3D <0x74>; =20 + vdd-supply =3D <&p3v3>; + interrupt-parent =3D <&ipic>; interrupts =3D <17 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; --=20 2.34.1 From nobody Mon Jun 29 16:45:35 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45F49C433FE for ; Mon, 7 Feb 2022 09:37:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241855AbiBGJfo (ORCPT ); Mon, 7 Feb 2022 04:35:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351397AbiBGJ3G (ORCPT ); Mon, 7 Feb 2022 04:29:06 -0500 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E2B62C043185 for ; Mon, 7 Feb 2022 01:29:05 -0800 (PST) Received: by mail-ej1-x62d.google.com with SMTP id p15so40142195ejc.7 for ; Mon, 07 Feb 2022 01:29:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=O0k8KhFMdBtBZFFVKWcjCSCyxGIr4s4QCXxRmW6v5O8=; b=dMUN3by6U4hZHRUiyZbQB88dim8pVI3xH+nIf5rpOYvAVUV2YKffWyoloOS8+mSB9B VI6r88auKKMD2YhbE78umjv84fl3CCk+r3EnrAeD8tF9Ca0ZVHfMW17eJdpoIRV9LRaP VUHRr07wnma+mo5Xvj8TB1AdmiDCsugE5j83JS52b+LcR13tHhWI7V6RT6oi0k5LYULg eVNuNr2NuH6M/WAyANBxUH0r81Fb/FwgmXP2OnbrR1YtQFe/BDlglDpzwlzEBMhannX4 hYFPz3gSmH7kR4oSFLFCUKJ7La8fSc6MlWFIEb56ivEKO/ZaemdxjcoI3r4QzqqGkhV5 +V1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=O0k8KhFMdBtBZFFVKWcjCSCyxGIr4s4QCXxRmW6v5O8=; b=Uk8ZVP4nY6mTIb9OETb5wu2JjScNEelEZPj0fAXBSxRNMLSPZHmNNQ3xBpo6N7u8bn 3atBEVk0G2yM7+dwhh2GZyLV+UsBOXE6VlPeWApryj5BGdxFqsrswxWmwneRlCXrAooJ d0PAX8YplW/JwEArKaE6FShExPbrN79p2FXbUk4CVuufcMLGtt/H9O/ymyUgctEXJnDJ nGoE5IW0a9n5gD6zySdheaiU34dC5f+yD2KiLxSD6PhUxIJG2ml38CvqmrUKL8HT1gRk Num+K+n44LzpfGKAcNjZHBsfko0l0+ShrFug8LsVhMc2zbrhUI2qZgZwJIp1COZliz96 yIsg== X-Gm-Message-State: AOAM531E1r3vqFO/H1VjpA2hNbXzOkNlfcRbEWajZc9Rde+laPy6WNmS E2KVNiQ7bNWAMVuxykxVB2i/UA== X-Google-Smtp-Source: ABdhPJz+aQNvytf0rYMcnO0YPZsmW4+5G3DWaE54m44kEpckybhe3lTAjf9Li2zm6+YgM+bcv+O10w== X-Received: by 2002:a17:907:8a27:: with SMTP id sc39mr9354396ejc.314.1644226144461; Mon, 07 Feb 2022 01:29:04 -0800 (PST) Received: from fedora.. (ip-088-153-139-166.um27.pools.vodafone-ip.de. [88.153.139.166]) by smtp.gmail.com with ESMTPSA id g9sm3487059ejm.152.2022.02.07.01.29.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Feb 2022 01:29:04 -0800 (PST) From: Patrick Rudolph To: Peter Rosin Cc: Patrick Rudolph , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [v4 2/3] i2c: muxes: pca954x: Add MAX735x/MAX736x support Date: Mon, 7 Feb 2022 10:28:25 +0100 Message-Id: <20220207092827.104978-3-patrick.rudolph@9elements.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220207092827.104978-1-patrick.rudolph@9elements.com> References: <20220207092827.104978-1-patrick.rudolph@9elements.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support for the following Maxim chips using the existing PCA954x driver: - MAX7356 - MAX7357 - MAX7358 - MAX7367 - MAX7368 - MAX7369 All added Maxim chips behave like the PCA954x, where a single SMBUS byte write selects up to 8 channels to be bridged to the primary bus. The MAX7357 exposes 6 additional registers at Power-On-Reset and is configured to: - Disabled interrupts on bus locked up detection - Enable bus locked-up clearing - Disconnect only locked bus instead of all channels While the MAX7357/MAX7358 have interrupt support, they don't act as interrupt controller like the PCA9545 does. Thus don't enable IRQ support and handle them like the PCA9548. Tested using the MAX7357 and verified that the stalled bus is disconnected while the other channels remain operational. Signed-off-by: Patrick Rudolph --- drivers/i2c/muxes/Kconfig | 4 +- drivers/i2c/muxes/i2c-mux-pca954x.c | 92 +++++++++++++++++++++++++++-- 2 files changed, 90 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig index 1708b1a82da2..2ac99d044199 100644 --- a/drivers/i2c/muxes/Kconfig +++ b/drivers/i2c/muxes/Kconfig @@ -65,11 +65,11 @@ config I2C_MUX_PCA9541 will be called i2c-mux-pca9541. =20 config I2C_MUX_PCA954x - tristate "NXP PCA954x and PCA984x I2C Mux/switches" + tristate "NXP PCA954x/PCA984x and Maxim MAX735x/MAX736x I2C Mux/switches" depends on GPIOLIB || COMPILE_TEST help If you say yes here you get support for the NXP PCA954x - and PCA984x I2C mux/switch devices. + and PCA984x and Maxim MAX735x/MAX736x I2C mux/switch devices. =20 This driver can also be built as a module. If so, the module will be called i2c-mux-pca954x. diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mu= x-pca954x.c index 4ad665757dd8..33b9a6a1fffa 100644 --- a/drivers/i2c/muxes/i2c-mux-pca954x.c +++ b/drivers/i2c/muxes/i2c-mux-pca954x.c @@ -4,6 +4,7 @@ * * Copyright (c) 2008-2009 Rodolfo Giometti * Copyright (c) 2008-2009 Eurotech S.p.A. + * Copyright (c) 2022 Patrick Rudolph * * This module supports the PCA954x and PCA984x series of I2C multiplexer/= switch * chips made by NXP Semiconductors. @@ -11,6 +12,12 @@ * PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547, * PCA9548, PCA9846, PCA9847, PCA9848 and PCA9849. * + * It's also compatible to Maxims MAX735x I2C switch chips, which are cont= rolled + * as the NXP PCA9548 and the MAX736x chips that act like the PCA9544. + * + * This includes the: + * MAX7356, MAX7357, MAX7358, MAX7367, MAX7368 and MAX7369 + * * These chips are all controlled via the I2C bus itself, and all have a * single 8-bit register. The upstream "parent" bus fans out to two, * four, or eight downstream busses or channels; which of these @@ -50,7 +57,30 @@ =20 #define PCA954X_IRQ_OFFSET 4 =20 +/* + * MAX7357 exposes 7 registers on POR which allow to configure additional + * features. Disable interrupts, enable bus locked-up clearing, + * isolate only the locked channel instead of all channels. + */ +#define MAX7357_CONF_INT_ENABLE BIT(0) +#define MAX7357_CONF_FLUSH_OUT BIT(1) +#define MAX7357_CONF_RELEASE_INT BIT(2) +#define MAX7357_CONF_LOCK_UP_CLEAR BIT(3) +#define MAX7357_CONF_DISCON_SINGLE_CHAN BIT(4) +#define MAX7357_CONF_BUS_LOCKUP_DETECTION BIT(5) +#define MAX7357_CONF_ENABLE_BASIC_MODE BIT(6) +#define MAX7357_CONF_PRECONNECT_TEST BIT(7) + +#define MAX7357_CONF_DEFAULTS (MAX7357_CONF_FLUSH_OUT | \ + MAX7357_CONF_DISCON_SINGLE_CHAN) + enum pca_type { + max_7367, + max_7368, + max_7369, + max_7356, + max_7357, + max_7358, pca_9540, pca_9542, pca_9543, @@ -69,6 +99,7 @@ struct chip_desc { u8 nchans; u8 enable; /* used for muxes only */ u8 has_irq; + u8 max7357; enum muxtype { pca954x_ismux =3D 0, pca954x_isswi @@ -90,8 +121,42 @@ struct pca954x { raw_spinlock_t lock; }; =20 -/* Provide specs for the PCA954x types we know about */ +/* Provide specs for the PCA954x and MAX735x types we know about */ static const struct chip_desc chips[] =3D { + [max_7356] =3D { + .nchans =3D 8, + .muxtype =3D pca954x_isswi, + .id =3D { .manufacturer_id =3D I2C_DEVICE_ID_NONE }, + }, + [max_7357] =3D { + .nchans =3D 8, + .muxtype =3D pca954x_isswi, + .max7357 =3D 1, + .id =3D { .manufacturer_id =3D I2C_DEVICE_ID_NONE }, + }, + [max_7358] =3D { + .nchans =3D 8, + .muxtype =3D pca954x_isswi, + .id =3D { .manufacturer_id =3D I2C_DEVICE_ID_NONE }, + }, + [max_7367] =3D { + .nchans =3D 4, + .muxtype =3D pca954x_isswi, + .has_irq =3D 1, + .id =3D { .manufacturer_id =3D I2C_DEVICE_ID_NONE }, + }, + [max_7368] =3D { + .nchans =3D 4, + .muxtype =3D pca954x_isswi, + .id =3D { .manufacturer_id =3D I2C_DEVICE_ID_NONE }, + }, + [max_7369] =3D { + .nchans =3D 4, + .enable =3D 0x4, + .muxtype =3D pca954x_ismux, + .has_irq =3D 1, + .id =3D { .manufacturer_id =3D I2C_DEVICE_ID_NONE }, + }, [pca_9540] =3D { .nchans =3D 2, .enable =3D 0x4, @@ -177,6 +242,12 @@ static const struct chip_desc chips[] =3D { }; =20 static const struct i2c_device_id pca954x_id[] =3D { + { "max7356", max_7356 }, + { "max7357", max_7357 }, + { "max7358", max_7358 }, + { "max7367", max_7367 }, + { "max7368", max_7368 }, + { "max7369", max_7369 }, { "pca9540", pca_9540 }, { "pca9542", pca_9542 }, { "pca9543", pca_9543 }, @@ -194,6 +265,12 @@ static const struct i2c_device_id pca954x_id[] =3D { MODULE_DEVICE_TABLE(i2c, pca954x_id); =20 static const struct of_device_id pca954x_of_match[] =3D { + { .compatible =3D "maxim,max7356", .data =3D &chips[max_7356] }, + { .compatible =3D "maxim,max7357", .data =3D &chips[max_7357] }, + { .compatible =3D "maxim,max7358", .data =3D &chips[max_7358] }, + { .compatible =3D "maxim,max7367", .data =3D &chips[max_7367] }, + { .compatible =3D "maxim,max7368", .data =3D &chips[max_7368] }, + { .compatible =3D "maxim,max7369", .data =3D &chips[max_7369] }, { .compatible =3D "nxp,pca9540", .data =3D &chips[pca_9540] }, { .compatible =3D "nxp,pca9542", .data =3D &chips[pca_9542] }, { .compatible =3D "nxp,pca9543", .data =3D &chips[pca_9543] }, @@ -401,9 +478,16 @@ static int pca954x_init(struct i2c_client *client, str= uct pca954x *data) else data->last_chan =3D 0; /* Disconnect multiplexer */ =20 - ret =3D i2c_smbus_write_byte(client, data->last_chan); - if (ret < 0) - data->last_chan =3D 0; + if (data->chip->max7357) { + ret =3D i2c_smbus_write_byte_data(client, data->last_chan, + MAX7357_CONF_DEFAULTS); + if (ret < 0) + data->last_chan =3D 0; + } else { + ret =3D i2c_smbus_write_byte(client, data->last_chan); + if (ret < 0) + data->last_chan =3D 0; + } =20 return ret; } --=20 2.34.1 From nobody Mon Jun 29 16:45:35 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B412C4321E for ; Mon, 7 Feb 2022 09:37:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351372AbiBGJfz (ORCPT ); Mon, 7 Feb 2022 04:35:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57236 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351407AbiBGJ3I (ORCPT ); Mon, 7 Feb 2022 04:29:08 -0500 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 24057C043181 for ; Mon, 7 Feb 2022 01:29:08 -0800 (PST) Received: by mail-ed1-x534.google.com with SMTP id cz16so10350092edb.8 for ; Mon, 07 Feb 2022 01:29:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=esc1uJ/1b1Bl5sIRdBGqAaIciPpRZPZmuwi/GvPIASI=; b=Kq7bxOK0EXnru4hWpt1BGbQD5x4elFR7kZIzwLbqjeBN3yWqt4iBQOeArytKJZQpf9 E4N7dJ0mOWMz9kp2XDwsxS/1K2k7ZpoqR+3BH/1md8ux2ayeH0kt4WHInqwdSbfJfSY5 6JWSfLb99OPJZyawEm11RCO/iLITTvYRylyRwd8ELCXeDnMf749ux5AvqPvofnRaI0eQ 3Ca13gb8SNaecWc+CHEgW4BwLibXanZR5CgtdLC6hnTipxW3Hy61ZJ9fTjhZ4Tn1wrPo oCy+FzSPRhxKqYKPrxO8pY7moA2slRp3//1BpaZUfgqSBpgwUClZlXEToOK2mdznQBtp q46A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=esc1uJ/1b1Bl5sIRdBGqAaIciPpRZPZmuwi/GvPIASI=; b=AhPc8mXqYqUfRMCTawIjZ548wUE4VZIxnjAo90hhzPQcPeAVzMAkKqfGDDckF9pF1L Qa5dYlFpqYPeNx2T7D1XLdhcx/I23pZ28ZojqjjEpvLKgj9qirEMVtdT60xuJCbg2Mde DAJ7DzC6+BL+h2vA5mCQZkqCq3GyomSr6mCR/MztPH70g4B6z+EPReon1ngvPmMfr5lZ na4fjMIPNlznsiFHbZj4sz45mvzQvJYTdalbZaZfVSytgDYybQJ1OCdIPUcUakPt75l8 +/J4i8QM0K9aiKzj9aWVotvaOFBhRz/+vqj1DTZIYCNZVubOpzkqPNwEIogNxfI50uA5 Cm5w== X-Gm-Message-State: AOAM530RBs6D0blwyMfABzZAoU0qi46LaPrOmWbe2trCpQtfmlHCXb6E 2i6litzxsi1Z2A2veIb446rM8w== X-Google-Smtp-Source: ABdhPJz6ga72M9Fh/6kWosxb2MY91mI/eDTayZjisNyDXZdtus2V/AVbaeSGGoDuxA4tsjwqhiy16g== X-Received: by 2002:a50:ee16:: with SMTP id g22mr5850857eds.434.1644226146737; Mon, 07 Feb 2022 01:29:06 -0800 (PST) Received: from fedora.. (ip-088-153-139-166.um27.pools.vodafone-ip.de. [88.153.139.166]) by smtp.gmail.com with ESMTPSA id g9sm3487059ejm.152.2022.02.07.01.29.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Feb 2022 01:29:06 -0800 (PST) From: Patrick Rudolph To: Peter Rosin , Liam Girdwood , Mark Brown Cc: Patrick Rudolph , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [v4 3/3] i2c: muxes: pca954x: Add regulator support Date: Mon, 7 Feb 2022 10:28:26 +0100 Message-Id: <20220207092827.104978-4-patrick.rudolph@9elements.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220207092827.104978-1-patrick.rudolph@9elements.com> References: <20220207092827.104978-1-patrick.rudolph@9elements.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add an optional vdd regulator and enable it when found for devices that are powered off by default. Signed-off-by: Patrick Rudolph --- drivers/i2c/muxes/i2c-mux-pca954x.c | 32 ++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mu= x-pca954x.c index 33b9a6a1fffa..086647193ea9 100644 --- a/drivers/i2c/muxes/i2c-mux-pca954x.c +++ b/drivers/i2c/muxes/i2c-mux-pca954x.c @@ -49,6 +49,7 @@ #include #include #include +#include #include #include #include @@ -119,6 +120,7 @@ struct pca954x { struct irq_domain *irq; unsigned int irq_mask; raw_spinlock_t lock; + struct regulator *supply; }; =20 /* Provide specs for the PCA954x and MAX735x types we know about */ @@ -459,6 +461,9 @@ static void pca954x_cleanup(struct i2c_mux_core *muxc) struct pca954x *data =3D i2c_mux_priv(muxc); int c, irq; =20 + if (!IS_ERR_OR_NULL(data->supply)) + regulator_disable(data->supply); + if (data->irq) { for (c =3D 0; c < data->chip->nchans; c++) { irq =3D irq_find_mapping(data->irq, c); @@ -513,15 +518,30 @@ static int pca954x_probe(struct i2c_client *client, pca954x_select_chan, pca954x_deselect_mux); if (!muxc) return -ENOMEM; + data =3D i2c_mux_priv(muxc); =20 i2c_set_clientdata(client, muxc); data->client =3D client; =20 + data->supply =3D devm_regulator_get_optional(dev, "vdd"); + if (IS_ERR(data->supply)) { + if ((PTR_ERR(data->supply) =3D=3D -EPROBE_DEFER)) + return -EPROBE_DEFER; + } else { + ret =3D regulator_enable(data->supply); + if (ret) { + dev_err(dev, "Failed to enable regulator vdd: %d\n", ret); + return ret; + } + } + /* Reset the mux if a reset GPIO is specified. */ gpio =3D devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); - if (IS_ERR(gpio)) - return PTR_ERR(gpio); + if (IS_ERR(gpio)) { + ret =3D PTR_ERR(gpio); + goto fail_cleanup; + } if (gpio) { udelay(1); gpiod_set_value_cansleep(gpio, 0); @@ -538,7 +558,7 @@ static int pca954x_probe(struct i2c_client *client, =20 ret =3D i2c_get_device_id(client, &id); if (ret && ret !=3D -EOPNOTSUPP) - return ret; + goto fail_cleanup; =20 if (!ret && (id.manufacturer_id !=3D data->chip->id.manufacturer_id || @@ -546,7 +566,8 @@ static int pca954x_probe(struct i2c_client *client, dev_warn(dev, "unexpected device id %03x-%03x-%x\n", id.manufacturer_id, id.part_id, id.die_revision); - return -ENODEV; + ret =3D -ENODEV; + goto fail_cleanup; } } =20 @@ -565,7 +586,8 @@ static int pca954x_probe(struct i2c_client *client, ret =3D pca954x_init(client, data); if (ret < 0) { dev_warn(dev, "probe failed\n"); - return -ENODEV; + ret =3D -ENODEV; + goto fail_cleanup; } =20 ret =3D pca954x_irq_setup(muxc); --=20 2.34.1