From nobody Mon Jun 29 16:50:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7AE90C433EF for ; Sun, 6 Feb 2022 13:59:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242711AbiBFN7I (ORCPT ); Sun, 6 Feb 2022 08:59:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241147AbiBFN62 (ORCPT ); Sun, 6 Feb 2022 08:58:28 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A7414C0401C8 for ; Sun, 6 Feb 2022 05:58:21 -0800 (PST) Received: from mail-wm1-f71.google.com (mail-wm1-f71.google.com [209.85.128.71]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id C42B240038 for ; Sun, 6 Feb 2022 13:58:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1644155893; bh=LVkBfcJOPMoVnmBu9J91WfcjMU5SYQeGsSEAA+YrpAs=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=AryksRk+2D1zcf/s3e1Cc4eEvYNcB/g713wOdiXa95tLNeOeadiuZamVXLs3glpjU IYPRrR1bjTxMjYJ7VTQl2Yfcda3dhFU4aSMf3xpV0CfF+Vw2vHBUG6Z0UNSX2Juk8V xnD2YrhELNHpLZwyYIup2Qc210nH/5y5ouU3b/pgY6TH4sjpI6aj/naM2Vf/8toGv0 zN31A0MfSKoOKEg8KHa6JLbQK0o/KrM9tf4wlLzVXFKqCh69UYtr1+EPmxgOGV9Uot 0hFfm8ZTMBYnJzn/cBowcQw4AZv96DHf2TJhg31C/j8YE9pK/TKIMscwmS4raqpZG6 0zIMzHLXWgbDQ== Received: by mail-wm1-f71.google.com with SMTP id s187-20020a1ca9c4000000b0037bb8547d64so1850931wme.0 for ; Sun, 06 Feb 2022 05:58:13 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LVkBfcJOPMoVnmBu9J91WfcjMU5SYQeGsSEAA+YrpAs=; b=hCCO8nGxN9fbj43ODJbxW090lJjRvK0hY5u0NUt0Q530RQq0aKdlPU9tpafLsPCjvW b5p5hP2U4hkBfUYBUAjZKRICZfU2SDCgfGk8mr5c16dh6uP8mF9G1R15RKQ7Df+6h60c KmvUXvz75FQPG39YvApsNykk4yLQAvgTtWIKc+V+xiq3/DzA1PZamVHt/KCRCmqrp+y/ AoD/CeTv4KLAtN+LCPiQZxcRtsXAlyt2dzq8Y2aGl/Lwd/zeQ4cvFv0MGyTP5/zX/+pq gFI46xHQYS/fSAwpTjFrBVW5dhKxNFIWI1KjM+j7LkdbR1xd+fsYcm0/fg3l5eBq5P22 vbqw== X-Gm-Message-State: AOAM530orZiIMpuao7fc9GpR3sl7rIXWQlAp5Ekn66HRnfdq74HS5V56 aw5BqXfX0XK71Ms9GcirKWtflUaFYl5w0jXavjurzsWmfjCihI7Hoac87/AfFpBbDJjTJDXeVgt aoLFLA1juhrmOFi5Jc/1WZGBsZoYef6ZqgSnXgBzb1g== X-Received: by 2002:a05:600c:1f06:: with SMTP id bd6mr10672607wmb.117.1644155893034; Sun, 06 Feb 2022 05:58:13 -0800 (PST) X-Google-Smtp-Source: ABdhPJxYAnQuw3LCcmq/e4CR+JXZGoGIgFwhwnXz5ZwEcWLTAFqDgscNcdXs2ZRPGLL13HutYDee4Q== X-Received: by 2002:a05:600c:1f06:: with SMTP id bd6mr10672589wmb.117.1644155892812; Sun, 06 Feb 2022 05:58:12 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id e9sm8296888wrg.60.2022.02.06.05.58.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Feb 2022 05:58:12 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Lukasz Luba , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/8] dt-bindings: memory: lpddr2-timings: convert to dtschema Date: Sun, 6 Feb 2022 14:58:00 +0100 Message-Id: <20220206135807.211767-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> References: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert the LPDDR2 memory timings bindings to DT schema format. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Dmitry Osipenko --- .../ddr/jedec,lpddr2-timings.yaml | 135 ++++++++++++++++++ .../memory-controllers/ddr/jedec,lpddr2.yaml | 6 +- .../memory-controllers/ddr/lpddr2-timings.txt | 52 ------- 3 files changed, 137 insertions(+), 56 deletions(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/dd= r/jedec,lpddr2-timings.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/dd= r/lpddr2-timings.txt diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec= ,lpddr2-timings.yaml b/Documentation/devicetree/bindings/memory-controllers= /ddr/jedec,lpddr2-timings.yaml new file mode 100644 index 000000000000..f3e62ee07126 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2= -timings.yaml @@ -0,0 +1,135 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2-tim= ings.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LPDDR2 SDRAM AC timing parameters for a given speed-bin + +maintainers: + - Krzysztof Kozlowski + +properties: + compatible: + const: jedec,lpddr2-timings + + max-freq: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Maximum DDR clock frequency for the speed-bin, in Hz. + + min-freq: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Minimum DDR clock frequency for the speed-bin, in Hz. + + tCKESR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + CKE minimum pulse width during SELF REFRESH (low pulse width during + SELF REFRESH) in pico seconds. + + tDQSCK-max: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + DQS output data access time from CK_t/CK_c in pico seconds. + + tDQSCK-max-derated: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + DQS output data access time from CK_t/CK_c, temperature de-rated, in= pico + seconds. + + tFAW: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Four-bank activate window in pico seconds. + + tRAS-max-ns: + description: | + Row active time in nano seconds. + + tRAS-min: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Row active time in pico seconds. + + tRCD: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + RAS-to-CAS delay in pico seconds. + + tRPab: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Row precharge time (all banks) in pico seconds. + + tRRD: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Active bank A to active bank B in pico seconds. + + tRTP: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Internal READ to PRECHARGE command delay in pico seconds. + + tWR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + WRITE recovery time in pico seconds. + + tWTR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Internal WRITE-to-READ command delay in pico seconds. + + tXP: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Exit power-down to next valid command delay in pico seconds. + + tZQCL: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Long calibration time in pico seconds. + + tZQCS: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Short calibration time in pico seconds. + + tZQinit: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Initialization calibration time in pico seconds. + +required: + - compatible + - min-freq + - max-freq + +additionalProperties: false + +examples: + - | + timings { + compatible =3D "jedec,lpddr2-timings"; + min-freq =3D <10000000>; + max-freq =3D <400000000>; + tCKESR =3D <15000>; + tDQSCK-max =3D <5500>; + tFAW =3D <50000>; + tRAS-max-ns =3D <70000>; + tRAS-min =3D <42000>; + tRPab =3D <21000>; + tRCD =3D <18000>; + tRRD =3D <10000>; + tRTP =3D <7500>; + tWR =3D <15000>; + tWTR =3D <7500>; + tXP =3D <7500>; + tZQCL =3D <360000>; + tZQCS =3D <90000>; + tZQinit =3D <1000000>; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec= ,lpddr2.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jed= ec,lpddr2.yaml index 25ed0266f6dd..2d8a701e2a05 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2= .yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2= .yaml @@ -142,14 +142,12 @@ properties: =20 patternProperties: "^lpddr2-timings": - type: object + $ref: jedec,lpddr2-timings.yaml description: | The lpddr2 node may have one or more child nodes of type "lpddr2-tim= ings". "lpddr2-timings" provides AC timing parameters of the device for a given speed-bin. The user may provide the timings for as many - speed-bins as is required. Please see Documentation/devicetree/ - bindings/memory-controllers/ddr/lpddr2-timings.txt for more informat= ion - on "lpddr2-timings". + speed-bins as is required. =20 required: - compatible diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr= 2-timings.txt b/Documentation/devicetree/bindings/memory-controllers/ddr/lp= ddr2-timings.txt deleted file mode 100644 index 9ceb19e0c7fd..000000000000 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr2-timin= gs.txt +++ /dev/null @@ -1,52 +0,0 @@ -* AC timing parameters of LPDDR2(JESD209-2) memories for a given speed-bin - -Required properties: -- compatible : Should be "jedec,lpddr2-timings" -- min-freq : minimum DDR clock frequency for the speed-bin. Type is -- max-freq : maximum DDR clock frequency for the speed-bin. Type is - -Optional properties: - -The following properties represent AC timing parameters from the memory -data-sheet of the device for a given speed-bin. All these properties are -of type and the default unit is ps (pico seconds). Parameters with -a different unit have a suffix indicating the unit such as 'tRAS-max-ns' -- tRCD -- tWR -- tRAS-min -- tRRD -- tWTR -- tXP -- tRTP -- tDQSCK-max -- tFAW -- tZQCS -- tZQinit -- tRPab -- tZQCL -- tCKESR -- tRAS-max-ns -- tDQSCK-max-derated - -Example: - -timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 { - compatible =3D "jedec,lpddr2-timings"; - min-freq =3D <10000000>; - max-freq =3D <400000000>; - tRPab =3D <21000>; - tRCD =3D <18000>; - tWR =3D <15000>; - tRAS-min =3D <42000>; - tRRD =3D <10000>; - tWTR =3D <7500>; - tXP =3D <7500>; - tRTP =3D <7500>; - tCKESR =3D <15000>; - tDQSCK-max =3D <5500>; - tFAW =3D <50000>; - tZQCS =3D <90000>; - tZQCL =3D <360000>; - tZQinit =3D <1000000>; - tRAS-max-ns =3D <70000>; -}; --=20 2.32.0 From nobody Mon Jun 29 16:50:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 319C3C433EF for ; Sun, 6 Feb 2022 13:58:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241858AbiBFN6i (ORCPT ); Sun, 6 Feb 2022 08:58:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51678 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241119AbiBFN62 (ORCPT ); Sun, 6 Feb 2022 08:58:28 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E308C0401C5 for ; Sun, 6 Feb 2022 05:58:21 -0800 (PST) Received: from mail-wm1-f70.google.com (mail-wm1-f70.google.com [209.85.128.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 9F25040041 for ; Sun, 6 Feb 2022 13:58:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1644155894; bh=lOiKlVY+li7+FmiBN2L8P4Y/x6OELAmIkj/zsUkdPsw=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=k0Rfp2/5WDHPc0bLLLn9cyz/70mefXYyLY9R2lBhGUcQ+7JRt1S4GBFanY9On9+f/ 5iKA39yR1QBUkcndsZuqkRGKe6UduOCqixw9WtxjdPQNlxMfQRJ+sb9wLRgstZnvPr FwK76U9+/Nq8z1rhX3Bx3eHxxoaZ8ilLtUcfgSKbq9pUo6y5CYfOlDLvpGHnmOCeU6 BON1Qj2isCQ+qYwKIFXYXc1VNvajneSE9jBi7J1eBNhbNjKCHuGETfHxAQZKgPZhj9 imvmcKoeG33/O6sHRm1dSaKxWvoLTf2dkrH47KISihGf0WxjwqiC9zHVd7t4HSS+Mp 0qhnO18k76Kug== Received: by mail-wm1-f70.google.com with SMTP id n3-20020a05600c294300b0037bc685b717so156128wmd.8 for ; Sun, 06 Feb 2022 05:58:14 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lOiKlVY+li7+FmiBN2L8P4Y/x6OELAmIkj/zsUkdPsw=; b=CC+Jjr3GxDLGMkWbNq+tswQzU1slkR7TboybILEACXuslaqL6EklqrX1KYmo5l35d/ VnK6s+n285EPsZuJNOSZdttLlasMc24bgxCq8mczfW7F2bc5CBSA6CTcZKvHzpGyTN/K Vo/KhK6Rbi1TVp5Q7DzSCrB5bYfUVTUCWqp1ObUTE7KFeNnARPHNEXe/U15KVRfX2jI6 u/b23OXgUmMOSMBk8AMMsstgyxl0nPMmJzbxd7f+c+qScfkeA5n0HqE9855AlystBftg Y9lGKCjCdGo7sjAcgNSmDb0zmkbDBK6tihTD24l+2hCJh5CbGQXotx9aOooLOzNVO7QC nZtA== X-Gm-Message-State: AOAM532OoZbMoGaKafbb/r/8SwW9q1CHvyCJmP4IbXmjDE8mMNi5nfzf BSDTGXqcHCrPSHKDj7dfH1ovxrg0BaYqAwfoOEVtlscKsRmcwWp67XI0tBZse5voi6didROz5ee gVdT8McXoCufI8ORa8qPmGTWtNuefWwVwlo5zcjdTZQ== X-Received: by 2002:a1c:a187:: with SMTP id k129mr10736759wme.194.1644155894248; Sun, 06 Feb 2022 05:58:14 -0800 (PST) X-Google-Smtp-Source: ABdhPJwlhe4nNbdnLxL2YSPguLC5yr1KsrO1jPoWlnLroSOGauoLKGrgo4Z8u8tDCDm7WLYdWBcOgw== X-Received: by 2002:a1c:a187:: with SMTP id k129mr10736749wme.194.1644155894090; Sun, 06 Feb 2022 05:58:14 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id e9sm8296888wrg.60.2022.02.06.05.58.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Feb 2022 05:58:13 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Lukasz Luba , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 2/8] dt-bindings: memory: lpddr3-timings: convert to dtschema Date: Sun, 6 Feb 2022 14:58:01 +0100 Message-Id: <20220206135807.211767-3-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> References: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert the LPDDR3 memory timings bindings to DT schema format. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Dmitry Osipenko --- .../ddr/jedec,lpddr3-timings.yaml | 153 ++++++++++++++++++ .../memory-controllers/ddr/lpddr3-timings.txt | 58 ------- 2 files changed, 153 insertions(+), 58 deletions(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/dd= r/jedec,lpddr3-timings.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/dd= r/lpddr3-timings.txt diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec= ,lpddr3-timings.yaml b/Documentation/devicetree/bindings/memory-controllers= /ddr/jedec,lpddr3-timings.yaml new file mode 100644 index 000000000000..98bc219e8a25 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3= -timings.yaml @@ -0,0 +1,153 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3-tim= ings.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LPDDR3 SDRAM AC timing parameters for a given speed-bin + +maintainers: + - Krzysztof Kozlowski + +properties: + compatible: + const: jedec,lpddr3-timings + + reg: + maxItems: 1 + description: | + Maximum DDR clock frequency for the speed-bin, in Hz. + + min-freq: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Minimum DDR clock frequency for the speed-bin, in Hz. + + tCKE: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + CKE minimum pulse width (HIGH and LOW pulse width) in pico seconds. + + tCKESR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + CKE minimum pulse width during SELF REFRESH (low pulse width during + SELF REFRESH) in pico seconds. + + tFAW: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Four-bank activate window in pico seconds. + + tMRD: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Mode register set command delay in pico seconds. + + tR2R-C2C: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Additional READ-to-READ delay in chip-to-chip cases in pico seconds. + + tRAS: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Row active time in pico seconds. + + tRC: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + ACTIVATE-to-ACTIVATE command period in pico seconds. + + tRCD: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + RAS-to-CAS delay in pico seconds. + + tRFC: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Refresh Cycle time in pico seconds. + + tRPab: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Row precharge time (all banks) in pico seconds. + + tRPpb: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Row precharge time (single banks) in pico seconds. + + tRRD: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Active bank A to active bank B in pico seconds. + + tRTP: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Internal READ to PRECHARGE command delay in pico seconds. + + tW2W-C2C: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Additional WRITE-to-WRITE delay in chip-to-chip cases in pico second= s. + + tWR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + WRITE recovery time in pico seconds. + + tWTR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Internal WRITE-to-READ command delay in pico seconds. + + tXP: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Exit power-down to next valid command delay in pico seconds. + + tXSR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SELF REFRESH exit to next valid command delay in pico seconds. + +required: + - compatible + - min-freq + - reg + +additionalProperties: false + +examples: + - | + lpddr3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + + timings@800000000 { + compatible =3D "jedec,lpddr3-timings"; + reg =3D <800000000>; + min-freq =3D <100000000>; + tCKE =3D <3750>; + tCKESR =3D <3750>; + tFAW =3D <25000>; + tMRD =3D <7000>; + tR2R-C2C =3D <0>; + tRAS =3D <23000>; + tRC =3D <33750>; + tRCD =3D <10000>; + tRFC =3D <65000>; + tRPab =3D <12000>; + tRPpb =3D <12000>; + tRRD =3D <6000>; + tRTP =3D <3750>; + tW2W-C2C =3D <0>; + tWR =3D <7500>; + tWTR =3D <3750>; + tXP =3D <3750>; + tXSR =3D <70000>; + }; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr= 3-timings.txt b/Documentation/devicetree/bindings/memory-controllers/ddr/lp= ddr3-timings.txt deleted file mode 100644 index 84705e50a3fd..000000000000 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3-timin= gs.txt +++ /dev/null @@ -1,58 +0,0 @@ -* AC timing parameters of LPDDR3 memories for a given speed-bin. - -The structures are based on LPDDR2 and extended where needed. - -Required properties: -- compatible : Should be "jedec,lpddr3-timings" -- min-freq : minimum DDR clock frequency for the speed-bin. Type is -- reg : maximum DDR clock frequency for the speed-bin. Type is - -Optional properties: - -The following properties represent AC timing parameters from the memory -data-sheet of the device for a given speed-bin. All these properties are -of type and the default unit is ps (pico seconds). -- tRFC -- tRRD -- tRPab -- tRPpb -- tRCD -- tRC -- tRAS -- tWTR -- tWR -- tRTP -- tW2W-C2C -- tR2R-C2C -- tFAW -- tXSR -- tXP -- tCKE -- tCKESR -- tMRD - -Example: - -timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 { - compatible =3D "jedec,lpddr3-timings"; - reg =3D <800000000>; /* workaround: it shows max-freq */ - min-freq =3D <100000000>; - tRFC =3D <65000>; - tRRD =3D <6000>; - tRPab =3D <12000>; - tRPpb =3D <12000>; - tRCD =3D <10000>; - tRC =3D <33750>; - tRAS =3D <23000>; - tWTR =3D <3750>; - tWR =3D <7500>; - tRTP =3D <3750>; - tW2W-C2C =3D <0>; - tR2R-C2C =3D <0>; - tFAW =3D <25000>; - tXSR =3D <70000>; - tXP =3D <3750>; - tCKE =3D <3750>; - tCKESR =3D <3750>; - tMRD =3D <7000>; -}; --=20 2.32.0 From nobody Mon Jun 29 16:50:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0FCCCC433FE for ; Sun, 6 Feb 2022 13:59:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242621AbiBFN7E (ORCPT ); Sun, 6 Feb 2022 08:59:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241292AbiBFN62 (ORCPT ); Sun, 6 Feb 2022 08:58:28 -0500 Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 846B8C0401CE for ; Sun, 6 Feb 2022 05:58:22 -0800 (PST) Received: from mail-wm1-f72.google.com (mail-wm1-f72.google.com [209.85.128.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 14E3640329 for ; Sun, 6 Feb 2022 13:58:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1644155896; bh=rFw9l+85dJtOxzK1IePAzxypjCG9mduHp5NIQ70SgQY=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=k9IVOEpp+QjShU0hv9yfDtjs+2u4p6QaepxjLZS6Ej7BzDPrcYGY+HXlVQer3F03E eIk0vloihPLNmw4TjHUl9qS6D2rPGOZD69riGEFmzqwvsFMX0tUPTPYKkx7q6uIQ6t 93jixoe0+HYHRi//q4bZyh3dAnFRLH598611zVh4tVx0F3h7dzy0e0ogV+oqaXQUL2 jIha36EXZUIM+XVWS9XMnD1JrrtX2RGrUP7mGxwKh4QV9uR28s7a1EyCmSTAYl+WWl QnwiKd7TssWT/84ynyJeeC2uN4kpXoQ1yFvLvxuqFOtSnCFDiz2tewhjp72Yaiuz/o 5oaD1s+7ZHw5w== Received: by mail-wm1-f72.google.com with SMTP id h82-20020a1c2155000000b003552c13626cso6186259wmh.3 for ; Sun, 06 Feb 2022 05:58:16 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rFw9l+85dJtOxzK1IePAzxypjCG9mduHp5NIQ70SgQY=; b=5Rep0ac7JzIHh2P+RWqhno/7QM+SFOi7hVdc1HfcZ4eab8Ci88+Kb5dnKwOh6v9JyJ Eqk5OIL2u/IECwCN627R+RkNo2EE2xqMvpp14UPpr/QMHGf10DiiAa9Te+FwHbLlhbHn A+Oh2U0Qcc9sdrN8tio5h9cSnnpF9fFDAmgiBai9QGxD7tq7Bep+LSXvLokq6FvoXU5/ WuNDWfAL7g/KhTJjIuxUaSY6jRgpEaMpT/VP4gTudeyP311Xh7LKHHoy0vxiT0GXghA4 GcVB7AwHTrUTcRd5ToMBhY1IhHorpDBB4HX/nAKzHSwFW9hr6SxXAg4UBU6Nv2rflObt 7jqQ== X-Gm-Message-State: AOAM533uTzvvKT6vpUeqD0AFvcfmWvb8H482v0pFPQW6mGtDprwKar6j w0SixdAzE2/SKW6MK9E9fQnc3NNYvQXXnAVvicK5/FRDtfCQmVk5ARXh67WT3HggMgq7YzwtBFL pBzkIZaw6BCCS9lIKH2NijNDeHJjFRQC6xZKj8HW1gw== X-Received: by 2002:a05:600c:491:: with SMTP id d17mr10092576wme.130.1644155895566; Sun, 06 Feb 2022 05:58:15 -0800 (PST) X-Google-Smtp-Source: ABdhPJw1IZBDNXRWJ0qWdLWUtZri4Y1fEcK37M2Hc8URD6XUC5A9Ckq9s/y+aIikyLKZ0ScCl082xw== X-Received: by 2002:a05:600c:491:: with SMTP id d17mr10092552wme.130.1644155895343; Sun, 06 Feb 2022 05:58:15 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id e9sm8296888wrg.60.2022.02.06.05.58.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Feb 2022 05:58:14 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Lukasz Luba , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 3/8] dt-bindings: memory: lpddr3: convert to dtschema Date: Sun, 6 Feb 2022 14:58:02 +0100 Message-Id: <20220206135807.211767-4-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> References: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert the LPDDR3 memory bindings to DT schema format. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Dmitry Osipenko --- .../memory-controllers/ddr/jedec,lpddr3.yaml | 265 ++++++++++++++++++ .../memory-controllers/ddr/lpddr3.txt | 107 ------- .../samsung,exynos5422-dmc.yaml | 3 +- 3 files changed, 266 insertions(+), 109 deletions(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/dd= r/jedec,lpddr3.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/dd= r/lpddr3.txt diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec= ,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jed= ec,lpddr3.yaml new file mode 100644 index 000000000000..e36f3607e25a --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3= .yaml @@ -0,0 +1,265 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3.yam= l# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LPDDR3 SDRAM compliant to JEDEC JESD209-3 + +maintainers: + - Krzysztof Kozlowski + +properties: + compatible: + items: + - enum: + - samsung,K3QF2F20DB + - const: jedec,lpddr3 + + '#address-cells': + const: 1 + + density: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Density in megabits of SDRAM chip. + enum: + - 4096 + - 8192 + - 16384 + - 32768 + + io-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + IO bus width in bits of SDRAM chip. + enum: + - 64 + - 32 + - 16 + - 8 + + manufacturer-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Manufacturer ID value read from Mode Register 5. + + revision-id: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 2 + items: + maximum: 255 + description: | + Revision value of SDRAM chip read from Mode Registers 6 and 7. + + '#size-cells': + const: 0 + + tCKE-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + CKE minimum pulse width (HIGH and LOW pulse width) in terms of number + of clock cycles. + + tCKESR-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + CKE minimum pulse width during SELF REFRESH (low pulse width during + SELF REFRESH) in terms of number of clock cycles. + + tDQSCK-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + DQS output data access time from CK_t/CK_c in terms of number of clo= ck + cycles. + + tFAW-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 63 + description: | + Four-bank activate window in terms of number of clock cycles. + + tMRD-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + Mode register set command delay in terms of number of clock cycles. + + tR2R-C2C-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + Additional READ-to-READ delay in chip-to-chip cases in terms of numb= er + of clock cycles. + + tRAS-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 63 + description: | + Row active time in terms of number of clock cycles. + + tRC-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 63 + description: | + ACTIVATE-to-ACTIVATE command period in terms of number of clock cycl= es. + + tRCD-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + RAS-to-CAS delay in terms of number of clock cycles. + + tRFC-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 255 + description: | + Refresh Cycle time in terms of number of clock cycles. + + tRL-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + READ data latency in terms of number of clock cycles. + + tRPab-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + Row precharge time (all banks) in terms of number of clock cycles. + + tRPpb-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + Row precharge time (single banks) in terms of number of clock cycles. + + tRRD-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + Active bank A to active bank B in terms of number of clock cycles. + + tRTP-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + Internal READ to PRECHARGE command delay in terms of number of clock + cycles. + + tW2W-C2C-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + Additional WRITE-to-WRITE delay in chip-to-chip cases in terms of nu= mber + of clock cycles. + + tWL-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + WRITE data latency in terms of number of clock cycles. + + tWR-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + WRITE recovery time in terms of number of clock cycles. + + tWTR-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + Internal WRITE-to-READ command delay in terms of number of clock cyc= les. + + tXP-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 255 + description: | + Exit power-down to next valid command delay in terms of number of cl= ock + cycles. + + tXSR-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 1023 + description: | + SELF REFRESH exit to next valid command delay in terms of number of = clock + cycles. + +patternProperties: + "^timings@[0-9a-f]+$": + $ref: jedec,lpddr3-timings.yaml + description: | + The lpddr3 node may have one or more child nodes with timings. + Each timing node provides AC timing parameters of the device for a g= iven + speed-bin. The user may provide the timings for as many speed-bins a= s is + required. + +required: + - compatible + - '#address-cells' + - density + - io-width + - '#size-cells' + +additionalProperties: false + +examples: + - | + lpddr3 { + compatible =3D "samsung,K3QF2F20DB", "jedec,lpddr3"; + density =3D <16384>; + io-width =3D <32>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + tCKE-min-tck =3D <2>; + tCKESR-min-tck =3D <2>; + tDQSCK-min-tck =3D <5>; + tFAW-min-tck =3D <5>; + tMRD-min-tck =3D <5>; + tR2R-C2C-min-tck =3D <0>; + tRAS-min-tck =3D <5>; + tRC-min-tck =3D <6>; + tRCD-min-tck =3D <3>; + tRFC-min-tck =3D <17>; + tRL-min-tck =3D <14>; + tRPab-min-tck =3D <2>; + tRPpb-min-tck =3D <2>; + tRRD-min-tck =3D <2>; + tRTP-min-tck =3D <2>; + tW2W-C2C-min-tck =3D <0>; + tWL-min-tck =3D <8>; + tWR-min-tck =3D <7>; + tWTR-min-tck =3D <2>; + tXP-min-tck =3D <2>; + tXSR-min-tck =3D <12>; + + timings@800000000 { + compatible =3D "jedec,lpddr3-timings"; + reg =3D <800000000>; + min-freq =3D <100000000>; + tCKE =3D <3750>; + tCKESR =3D <3750>; + tFAW =3D <25000>; + tMRD =3D <7000>; + tR2R-C2C =3D <0>; + tRAS =3D <23000>; + tRC =3D <33750>; + tRCD =3D <10000>; + tRFC =3D <65000>; + tRPab =3D <12000>; + tRPpb =3D <12000>; + tRRD =3D <6000>; + tRTP =3D <3750>; + tW2W-C2C =3D <0>; + tWR =3D <7500>; + tWTR =3D <3750>; + tXP =3D <3750>; + tXSR =3D <70000>; + }; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr= 3.txt b/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3.txt deleted file mode 100644 index 031af5fb0379..000000000000 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3.txt +++ /dev/null @@ -1,107 +0,0 @@ -* LPDDR3 SDRAM memories compliant to JEDEC JESD209-3C - -Required properties: -- compatible : Should be ",", and generic value "jedec,lpddr= 3". - Example "," values: - "samsung,K3QF2F20DB" - -- density : representing density in Mb (Mega bits) -- io-width : representing bus width. Possible values are 8, 16, 32, = 64 -- #address-cells: Must be set to 1 -- #size-cells: Must be set to 0 - -Optional properties: - -- manufacturer-id : Manufacturer ID value read from Mode Registe= r 5 -- revision-id : Revision IDs read from Mode Registers 6 and 7 - -The following optional properties represent the minimum value of some AC -timing parameters of the DDR device in terms of number of clock cycles. -These values shall be obtained from the device data-sheet. -- tRFC-min-tck -- tRRD-min-tck -- tRPab-min-tck -- tRPpb-min-tck -- tRCD-min-tck -- tRC-min-tck -- tRAS-min-tck -- tWTR-min-tck -- tWR-min-tck -- tRTP-min-tck -- tW2W-C2C-min-tck -- tR2R-C2C-min-tck -- tWL-min-tck -- tDQSCK-min-tck -- tRL-min-tck -- tFAW-min-tck -- tXSR-min-tck -- tXP-min-tck -- tCKE-min-tck -- tCKESR-min-tck -- tMRD-min-tck - -Child nodes: -- The lpddr3 node may have one or more child nodes of type "lpddr3-timings= ". - "lpddr3-timings" provides AC timing parameters of the device for - a given speed-bin. Please see - Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3-timings.= txt - for more information on "lpddr3-timings" - -Example: - -samsung_K3QF2F20DB: lpddr3 { - compatible =3D "samsung,K3QF2F20DB", "jedec,lpddr3"; - density =3D <16384>; - io-width =3D <32>; - manufacturer-id =3D <1>; - revision-id =3D <123 234>; - #address-cells =3D <1>; - #size-cells =3D <0>; - - tRFC-min-tck =3D <17>; - tRRD-min-tck =3D <2>; - tRPab-min-tck =3D <2>; - tRPpb-min-tck =3D <2>; - tRCD-min-tck =3D <3>; - tRC-min-tck =3D <6>; - tRAS-min-tck =3D <5>; - tWTR-min-tck =3D <2>; - tWR-min-tck =3D <7>; - tRTP-min-tck =3D <2>; - tW2W-C2C-min-tck =3D <0>; - tR2R-C2C-min-tck =3D <0>; - tWL-min-tck =3D <8>; - tDQSCK-min-tck =3D <5>; - tRL-min-tck =3D <14>; - tFAW-min-tck =3D <5>; - tXSR-min-tck =3D <12>; - tXP-min-tck =3D <2>; - tCKE-min-tck =3D <2>; - tCKESR-min-tck =3D <2>; - tMRD-min-tck =3D <5>; - - timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 { - compatible =3D "jedec,lpddr3-timings"; - /* workaround: 'reg' shows max-freq */ - reg =3D <800000000>; - min-freq =3D <100000000>; - tRFC =3D <65000>; - tRRD =3D <6000>; - tRPab =3D <12000>; - tRPpb =3D <12000>; - tRCD =3D <10000>; - tRC =3D <33750>; - tRAS =3D <23000>; - tWTR =3D <3750>; - tWR =3D <7500>; - tRTP =3D <3750>; - tW2W-C2C =3D <0>; - tR2R-C2C =3D <0>; - tFAW =3D <25000>; - tXSR =3D <70000>; - tXP =3D <3750>; - tCKE =3D <3750>; - tCKESR =3D <3750>; - tMRD =3D <7000>; - }; -} diff --git a/Documentation/devicetree/bindings/memory-controllers/samsung,e= xynos5422-dmc.yaml b/Documentation/devicetree/bindings/memory-controllers/s= amsung,exynos5422-dmc.yaml index 895c3b5c9aaa..f152243f6b18 100644 --- a/Documentation/devicetree/bindings/memory-controllers/samsung,exynos54= 22-dmc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/samsung,exynos54= 22-dmc.yaml @@ -53,8 +53,7 @@ properties: $ref: '/schemas/types.yaml#/definitions/phandle' description: | phandle of the connected DRAM memory device. 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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id e9sm8296888wrg.60.2022.02.06.05.58.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Feb 2022 05:58:15 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Lukasz Luba , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 4/8] dt-bindings: memory: lpddr3: adjust IO width to spec Date: Sun, 6 Feb 2022 14:58:03 +0100 Message-Id: <20220206135807.211767-5-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> References: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" According to JEDEC Standard No. 209-3 (table 3.4.1 "Mode Register Assignment and Definition in LPDDR3 SDRAM"), the LPDDR3 supports only 16- and 32-bit IO width. Drop the unsupported others. Signed-off-by: Krzysztof Kozlowski --- .../bindings/memory-controllers/ddr/jedec,lpddr3.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec= ,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jed= ec,lpddr3.yaml index e36f3607e25a..d6787b5190ee 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3= .yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3= .yaml @@ -34,10 +34,8 @@ properties: description: | IO bus width in bits of SDRAM chip. enum: - - 64 - 32 - 16 - - 8 =20 manufacturer-id: $ref: /schemas/types.yaml#/definitions/uint32 --=20 2.32.0 From nobody Mon Jun 29 16:50:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81609C433F5 for ; Sun, 6 Feb 2022 13:58:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241913AbiBFN6o (ORCPT ); Sun, 6 Feb 2022 08:58:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51688 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241181AbiBFN62 (ORCPT ); Sun, 6 Feb 2022 08:58:28 -0500 Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA6E5C0401CF for ; Sun, 6 Feb 2022 05:58:22 -0800 (PST) Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id D4A9A40300 for ; Sun, 6 Feb 2022 13:58:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1644155897; bh=lowbJ9HbAqgBRMehsHM/qhZ+cS05q8+wNRQlqfDefTM=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=o2MxFSVwYa6MfR7CycRimKSeVpmHjhOxn1ann4TKe8VgMgOmtEsqISRIj6XHdMP6p LFZjO82mO6cIOf46wTmJ0k/Zx0m7ehqADuhhAxgRoiKDztYfI1R0pEyNIVphlonCuh vXXfd7ZRBXAnXDEpqAKDeF6szbO/gzEGIOKDnM8rPl9jzs/nNOCqGM3tC7Lxwp2W4y 3ROQHpTHyHLPGGKpE69zVHOboJLHgz6zgQMGlGWGbfaq9Dqs/4V9X7IXCxG0RisAp3 kwPrwDepDK95tzaWVn3VqQQI3dNP2R0t7uh/lir+JbYQgMetD3SYEoCUsICaZN34s6 9zz2hIqpFKIrg== Received: by mail-wm1-f69.google.com with SMTP id a8-20020a7bc1c8000000b0037bc4c62e97so502934wmj.0 for ; Sun, 06 Feb 2022 05:58:17 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lowbJ9HbAqgBRMehsHM/qhZ+cS05q8+wNRQlqfDefTM=; b=Ps7jbBFI8VrZ2hpi94JnDlenk+vo5Kuf7g0pX8bzOQMzOjo5sBP0ULtcFqvszYY0tE jN2SKFzfEkBqSkfkwNc/idgQFrDWjK16pgVlY23qn9U8G6eetHdNRitfiugl7Gy5B1mA wYBqhiGoQElTn8ZJ/pd2Wi8uoeBkV71gHPC77t8U3Tc3AsM/SRKf5ZyJsgpezQIacZbO fa1O/wFX6SugxsVH7sj01S0fQB87nHkMabio2tX5/9oJYjW/FKdxh4jEAIwbffUUiLZ6 KpBbc9Kp8evO4ZrQWsLhoaFe2g1If2N/fC+0BLH2OjCOTrYesmdLQByIDz/cj1tb3Ytb oTmQ== X-Gm-Message-State: AOAM531iQiB0Gl+If6D7YXhv4qBNQm7WqAzncWcngT3FOfflBf6GElRm PglRDL0PjFvz9GFHXFdWFN3JANJc/pYN2rFQsp68FlRFj6TUyjIUfORRoYXTqhmKvc+g5TO1hOw ZyreQLZOUI6A4J6V38QMZGffaTfcKcaMp3nrjcbOS4g== X-Received: by 2002:a05:600c:218:: with SMTP id 24mr7316481wmi.95.1644155897619; Sun, 06 Feb 2022 05:58:17 -0800 (PST) X-Google-Smtp-Source: ABdhPJzFbHkfXy9mwKBU3YQJK1xswUXUcJeL2qs8UreyNLnbIswkcL4WL2NExoBBoPLmzdhlDF7SCw== X-Received: by 2002:a05:600c:218:: with SMTP id 24mr7316471wmi.95.1644155897470; Sun, 06 Feb 2022 05:58:17 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id e9sm8296888wrg.60.2022.02.06.05.58.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Feb 2022 05:58:16 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Lukasz Luba , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 5/8] dt-bindings: memory: lpddr3: deprecate manufacturer ID Date: Sun, 6 Feb 2022 14:58:04 +0100 Message-Id: <20220206135807.211767-6-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> References: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The memory manufacturer should be described in vendor part of compatible, so there is no need to duplicate it in a separate property. Similarly is done in LPDDR2 bindings. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar --- .../bindings/memory-controllers/ddr/jedec,lpddr3.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec= ,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jed= ec,lpddr3.yaml index d6787b5190ee..3bcba15098ea 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3= .yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3= .yaml @@ -40,7 +40,9 @@ properties: manufacturer-id: $ref: /schemas/types.yaml#/definitions/uint32 description: | - Manufacturer ID value read from Mode Register 5. + Manufacturer ID value read from Mode Register 5. The property is + deprecated, manufacturer should be derived from the compatible. + deprecated: true =20 revision-id: $ref: /schemas/types.yaml#/definitions/uint32-array --=20 2.32.0 From nobody Mon Jun 29 16:50:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 026D0C433F5 for ; Sun, 6 Feb 2022 13:58:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241532AbiBFN6t (ORCPT ); Sun, 6 Feb 2022 08:58:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51678 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229948AbiBFN62 (ORCPT ); Sun, 6 Feb 2022 08:58:28 -0500 Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E0BEFC0401D8 for ; Sun, 6 Feb 2022 05:58:23 -0800 (PST) Received: from mail-wm1-f70.google.com (mail-wm1-f70.google.com [209.85.128.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 3BDA7405B1 for ; Sun, 6 Feb 2022 13:58:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1644155899; bh=GcS0xegk3NQr2qe7EYMZRqdHDgP4+x6pJzM+iYNNW+Q=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fK7YGXoZw7whQSqSIlcZ8H4Ge6aCzZ+9ffaHbS/nikueLqjXdLqITHx10YO2xMo4c 2Yv49GUAOFLAWGbl5BAtJW6QeupE5MIEfhcw4tbzWSWhjTjjBhPFRRWns7I3f8pCWi K4P+GDqbz2WZkAU7ausNbO0jRtwMcK2gkH2DquKMSYsnPoNvnfQHjPgV2mFO/SI0IH wMYwN6PevhrVVArOluw8TbH6AdNVF9IYfrZ2ZIhTeijOU5/h5vHvUW8mr/60T7g9jP VWn+LJbl85+tR8XR5Vx3WqXWSXI2s6+SgYSzaZ6q7h4odLAWVjbUctf9T+rJc0tNT4 OhJ8GcWTkFbdQ== Received: by mail-wm1-f70.google.com with SMTP id v185-20020a1cacc2000000b0034906580813so10569931wme.1 for ; Sun, 06 Feb 2022 05:58:19 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GcS0xegk3NQr2qe7EYMZRqdHDgP4+x6pJzM+iYNNW+Q=; b=GpDtoyZ+yi5ffZnRthDFKMGu3+UvG7kIog3vh4d4iiQtiWeep9FktfczF91LjFiiEn YGlY4iLz4QnjFlcYfcLByE3TE14Bz/DNhAn2wx5eKKkjObXWp52N3aLR1kbjTTidBZqm 46MJlBZ3xadEdlWC7HiCn1dvnNNAupkY9GdKtuFfSUBDCdH8yN0yhcwnzUBl41P5jPdU bN0aIN0YcptvGiFrnfwHFnmbR0+O4kCx8WhPja2zRx1GwuhnUi64rxg9j2y+wROFZvrB wOz4ctqdCRjTSntwn1or0voUrOZTeaH0gyOgBQhUUI+JEpJ7BpAeLouz8Ylchp1Wo8dK +xTQ== X-Gm-Message-State: AOAM533/xzJszdRSt9hwy+6CfWOzjT5DIGf+nAvVtPNuQPA54yVDSRlb lj28uf+8PcyEQ2q4Eh4qdEVb1Nj+58lQkKux1fF3MDSlfzt8rkpTm0LumhyKUBkO7Nypq8kHeWu Lxkx0Ib/jiEBU1nmdUWqm1SnLVrbUEpzhhV6bGTkUQw== X-Received: by 2002:adf:e344:: with SMTP id n4mr6504861wrj.630.1644155898924; Sun, 06 Feb 2022 05:58:18 -0800 (PST) X-Google-Smtp-Source: ABdhPJxuSNQjrLfrOqkh1Zg9vi10v0k1NU7kRQCyj0/HiRY2zJfNZaKNZISedgt1YjEhCjtZ2SdmJg== X-Received: by 2002:adf:e344:: with SMTP id n4mr6504852wrj.630.1644155898708; Sun, 06 Feb 2022 05:58:18 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id e9sm8296888wrg.60.2022.02.06.05.58.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Feb 2022 05:58:18 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Lukasz Luba , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 6/8] dt-bindings: memory: lpddr3: deprecate passing timings frequency as unit address Date: Sun, 6 Feb 2022 14:58:05 +0100 Message-Id: <20220206135807.211767-7-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> References: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The timings node maximum frequency was passed as an unit address, which is actually a workaround. Such workaround and unit address are not needed at all, because the device memory node (parent) can contain multiple timing nodes without unit addresses but with suffix used for nodenames, e.g. timings-1. LPDDR2 bindings already use such version, so unify the LPDDR3 with them. Suggested-by: Dmitry Osipenko Signed-off-by: Krzysztof Kozlowski Reviewed-by: Dmitry Osipenko --- .../ddr/jedec,lpddr3-timings.yaml | 16 ++++++++++------ .../memory-controllers/ddr/jedec,lpddr3.yaml | 12 +++++------- 2 files changed, 15 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec= ,lpddr3-timings.yaml b/Documentation/devicetree/bindings/memory-controllers= /ddr/jedec,lpddr3-timings.yaml index 98bc219e8a25..97c3e988af5f 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3= -timings.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3= -timings.yaml @@ -17,6 +17,13 @@ properties: maxItems: 1 description: | Maximum DDR clock frequency for the speed-bin, in Hz. + Property is deprecated, use max-freq. + deprecated: true + + max-freq: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Maximum DDR clock frequency for the speed-bin, in Hz. =20 min-freq: $ref: /schemas/types.yaml#/definitions/uint32 @@ -117,19 +124,16 @@ properties: required: - compatible - min-freq - - reg + - max-freq =20 additionalProperties: false =20 examples: - | lpddr3 { - #address-cells =3D <1>; - #size-cells =3D <0>; - - timings@800000000 { + timings { compatible =3D "jedec,lpddr3-timings"; - reg =3D <800000000>; + max-freq =3D <800000000>; min-freq =3D <100000000>; tCKE =3D <3750>; tCKESR =3D <3750>; diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec= ,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jed= ec,lpddr3.yaml index 3bcba15098ea..c542f32c39fa 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3= .yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3= .yaml @@ -18,6 +18,7 @@ properties: =20 '#address-cells': const: 1 + deprecated: true =20 density: $ref: /schemas/types.yaml#/definitions/uint32 @@ -55,6 +56,7 @@ properties: =20 '#size-cells': const: 0 + deprecated: true =20 tCKE-min-tck: $ref: /schemas/types.yaml#/definitions/uint32 @@ -191,7 +193,7 @@ properties: cycles. =20 patternProperties: - "^timings@[0-9a-f]+$": + "^timings((-[0-9])+|(@[0-9a-f]+))?$": $ref: jedec,lpddr3-timings.yaml description: | The lpddr3 node may have one or more child nodes with timings. @@ -201,10 +203,8 @@ patternProperties: =20 required: - compatible - - '#address-cells' - density - io-width - - '#size-cells' =20 additionalProperties: false =20 @@ -214,8 +214,6 @@ examples: compatible =3D "samsung,K3QF2F20DB", "jedec,lpddr3"; density =3D <16384>; io-width =3D <32>; - #address-cells =3D <1>; - #size-cells =3D <0>; =20 tCKE-min-tck =3D <2>; tCKESR-min-tck =3D <2>; @@ -239,9 +237,9 @@ examples: tXP-min-tck =3D <2>; tXSR-min-tck =3D <12>; =20 - timings@800000000 { + timings { compatible =3D "jedec,lpddr3-timings"; - reg =3D <800000000>; + max-freq =3D <800000000>; min-freq =3D <100000000>; tCKE =3D <3750>; tCKESR =3D <3750>; --=20 2.32.0 From nobody Mon Jun 29 16:50:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53581C433FE for ; Sun, 6 Feb 2022 13:58:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242144AbiBFN6x (ORCPT ); Sun, 6 Feb 2022 08:58:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51670 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241329AbiBFN62 (ORCPT ); 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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id e9sm8296888wrg.60.2022.02.06.05.58.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Feb 2022 05:58:19 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Lukasz Luba , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 7/8] memory: of: parse max-freq property Date: Sun, 6 Feb 2022 14:58:06 +0100 Message-Id: <20220206135807.211767-8-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> References: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Passing the memory timings maximum frequency as an unit address was a workaround and instead 'max-freq' is preferred. Look for 'max-freq' first and then fallback to 'reg'. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar Reviewed-by: Dmitry Osipenko --- drivers/memory/of_memory.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/memory/of_memory.c b/drivers/memory/of_memory.c index b94408954d85..bac5c7f34936 100644 --- a/drivers/memory/of_memory.c +++ b/drivers/memory/of_memory.c @@ -212,8 +212,10 @@ static int of_lpddr3_do_get_timings(struct device_node= *np, { int ret; =20 - /* The 'reg' param required since DT has changed, used as 'max-freq' */ - ret =3D of_property_read_u32(np, "reg", &tim->max_freq); + ret =3D of_property_read_u32(np, "max-freq", &tim->max_freq); + if (ret) + /* Deprecated way of passing max-freq as 'reg' */ + ret =3D of_property_read_u32(np, "reg", &tim->max_freq); ret |=3D of_property_read_u32(np, "min-freq", &tim->min_freq); ret |=3D of_property_read_u32(np, "tRFC", &tim->tRFC); ret |=3D of_property_read_u32(np, "tRRD", &tim->tRRD); --=20 2.32.0 From nobody Mon Jun 29 16:50:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1F1FC4332F for ; Sun, 6 Feb 2022 13:59:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241919AbiBFN7q (ORCPT ); Sun, 6 Feb 2022 08:59:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229910AbiBFN7h (ORCPT ); Sun, 6 Feb 2022 08:59:37 -0500 Received: from smtp-relay-internal-1.canonical.com (smtp-relay-internal-1.canonical.com [185.125.188.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3FBDC0401E5 for ; Sun, 6 Feb 2022 05:59:23 -0800 (PST) Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id D821D40040 for ; Sun, 6 Feb 2022 13:59:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1644155962; bh=SJklMGC7T/EUcj3Xgr8zoxCnRlerqEqIREG1cOIIgnU=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=YW11ea5uXVN444CaJ2jZT7W4kgqT1ZRyL2/QzBK50Z2ItGNbp+ceYLP6v8vYtNBK6 U2JdUAWg1IE3U0PzRMjfB6AMOibK7+VGFN28FFIBwGG4XvqwgkrWDxZgkHIIXSf/X+ A5QHfOxl6UR1iRdWZqi/iKhGRmqC5s9IlN+8Z34aXqq0D7gOoMb3PrOSANnNJt5+NP 4AbAshSsf5doUktYI6SbPEdqb77D3X9xEdFCzZJJQZnbdf0BmWtrjzTIRjKWyliGsd 5tW9Y4mVSJytwFXjWjtjWHQ+Q9ECgjeH5W3sDx1vMmk4Uvz556riByr72IBzooj84w gj5tCzNuTKidA== Received: by mail-wm1-f69.google.com with SMTP id l16-20020a7bcf10000000b0034ffdd81e7aso4240534wmg.4 for ; Sun, 06 Feb 2022 05:59:22 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SJklMGC7T/EUcj3Xgr8zoxCnRlerqEqIREG1cOIIgnU=; b=n6gPhmkq9v5W1IKjr1QHWnH0k7LY9+Mvv1krN/aCj/PXiZoedgEMS4O6nDbl7qUTpO hdG2IAVsDJKG43qshmfMs7CC7xx+NZcniAHzqfBquMAzKDRT2aC8akWagMpAV4U0IQQ0 OdkKQ10nwkwQ05LsGVUht8V+SPQw+2Wmw3Q3U3+HF34CpibvMJqgWlKiW+KTLnFf8MHK SsTGXxXPot5/ZhGlSH8pKQMQtgxt5smz8N8TyF09/wlXzO66T7zLofjhPxSVrPdro0VF oskcM9oCczY8wqXW8Jbtn0/faHN3cX7tqFMBiy2k4De9dpEqMdtGAzUFQ9ULRc4hkTWc I4ig== X-Gm-Message-State: AOAM532Kf/jKN/ku8WTc+Z/v6Kb3SB316+P/eAAymBzombLDwb7iqPet 5VleVGUZgyHYWY4QefCLVNwhxGeWsdvg2AlKE0MS6Jd5M6maHFQZZuR008/VY8e21f6PVITZaF0 dYQUxwWDFyfAyIDIpaISXiL7tbUmvT7Jz9af9Q33Ojg== X-Received: by 2002:a05:600c:502b:: with SMTP id n43mr10478963wmr.67.1644155962524; Sun, 06 Feb 2022 05:59:22 -0800 (PST) X-Google-Smtp-Source: ABdhPJzUW+CjZnoeRLOh3DLXJaGbc+rfq4URa9GWOKXq/P5jT8JUcEp9PlU4lZBC6zLP0TImsGzKjQ== X-Received: by 2002:a05:600c:502b:: with SMTP id n43mr10478958wmr.67.1644155962408; Sun, 06 Feb 2022 05:59:22 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id m14sm9018167wrp.4.2022.02.06.05.59.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Feb 2022 05:59:21 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Lukasz Luba , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 8/8] ARM: dts: exynos: remove deprecated unit address for LPDDR3 timings on Odroid Date: Sun, 6 Feb 2022 14:59:18 +0100 Message-Id: <20220206135918.211990-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> References: <20220206135807.211767-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Passing maximum frequency of LPDDR3 memory timings as unit address was deprecated in favor of 'max-freq' property. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Dmitry Osipenko --- arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/= dts/exynos5422-odroid-core.dtsi index 2f65dcf6ba73..35818c4cd852 100644 --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -333,8 +333,6 @@ samsung_K3QF2F20DB: lpddr3 { compatible =3D "samsung,K3QF2F20DB", "jedec,lpddr3"; density =3D <16384>; io-width =3D <32>; - #address-cells =3D <1>; - #size-cells =3D <0>; =20 tRFC-min-tck =3D <17>; tRRD-min-tck =3D <2>; @@ -358,10 +356,9 @@ samsung_K3QF2F20DB: lpddr3 { tCKESR-min-tck =3D <2>; tMRD-min-tck =3D <5>; =20 - timings_samsung_K3QF2F20DB_800mhz: timings@800000000 { + timings_samsung_K3QF2F20DB_800mhz: timings { compatible =3D "jedec,lpddr3-timings"; - /* workaround: 'reg' shows max-freq */ - reg =3D <800000000>; + max-freq =3D <800000000>; min-freq =3D <100000000>; tRFC =3D <65000>; tRRD =3D <6000>; --=20 2.32.0