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[73.25.156.94]) by smtp.gmail.com with ESMTPSA id 207sm16403918pgh.32.2022.02.01.08.16.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 08:16:12 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Emma Anholt , Yiwei Zhang , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , Jordan Crouse , Jonathan Marek , Akhil P Oommen , =?UTF-8?q?Christian=20K=C3=B6nig?= , Yangtao Li , Stephen Boyd , Bjorn Andersson , Vladimir Lypak , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 1/2] drm/msm/gpu: Add ctx to get_param() Date: Tue, 1 Feb 2022 08:16:11 -0800 Message-Id: <20220201161618.778455-2-robdclark@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220201161618.778455-1-robdclark@gmail.com> References: <20220201161618.778455-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Rob Clark Prep work for next patch. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 3 ++- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 ++- drivers/gpu/drm/msm/msm_drv.c | 3 ++- drivers/gpu/drm/msm/msm_gpu.h | 3 ++- drivers/gpu/drm/msm/msm_rd.c | 6 ++++-- 5 files changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/= adreno/adreno_gpu.c index f33cfa4ef1c8..caa9076197de 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -227,7 +227,8 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, return aspace; } =20 -int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) +int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx, + uint32_t param, uint64_t *value) { struct adreno_gpu *adreno_gpu =3D to_adreno_gpu(gpu); =20 diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/= adreno/adreno_gpu.h index cffabe7d33c1..432590036b31 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -279,7 +279,8 @@ static inline int adreno_is_a650_family(struct adreno_g= pu *gpu) adreno_is_a660_family(gpu); } =20 -int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value); +int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx, + uint32_t param, uint64_t *value); const struct firmware *adreno_request_fw(struct adreno_gpu *adreno_gpu, const char *fwname); struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu, diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 555666e3f960..72060247e43c 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -763,7 +763,8 @@ static int msm_ioctl_get_param(struct drm_device *dev, = void *data, if (!gpu) return -ENXIO; =20 - return gpu->funcs->get_param(gpu, args->param, &args->value); + return gpu->funcs->get_param(gpu, file->driver_priv, + args->param, &args->value); } =20 static int msm_ioctl_gem_new(struct drm_device *dev, void *data, diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 92aa1e9196c6..ba8407231340 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -42,7 +42,8 @@ struct msm_gpu_config { * + z180_gpu */ struct msm_gpu_funcs { - int (*get_param)(struct msm_gpu *gpu, uint32_t param, uint64_t *value); + int (*get_param)(struct msm_gpu *gpu, struct msm_file_private *ctx, + uint32_t param, uint64_t *value); int (*hw_init)(struct msm_gpu *gpu); int (*pm_suspend)(struct msm_gpu *gpu); int (*pm_resume)(struct msm_gpu *gpu); diff --git a/drivers/gpu/drm/msm/msm_rd.c b/drivers/gpu/drm/msm/msm_rd.c index 7e4d6460719e..dd3605b46264 100644 --- a/drivers/gpu/drm/msm/msm_rd.c +++ b/drivers/gpu/drm/msm/msm_rd.c @@ -197,13 +197,15 @@ static int rd_open(struct inode *inode, struct file *= file) =20 /* the parsing tools need to know gpu-id to know which * register database to load. + * + * Note: These particular param does not require a context */ - gpu->funcs->get_param(gpu, MSM_PARAM_GPU_ID, &val); + gpu->funcs->get_param(gpu, NULL, MSM_PARAM_GPU_ID, &val); gpu_id =3D val; =20 rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id)); =20 - gpu->funcs->get_param(gpu, MSM_PARAM_CHIP_ID, &val); + gpu->funcs->get_param(gpu, NULL, MSM_PARAM_CHIP_ID, &val); rd_write_section(rd, RD_CHIP_ID, &val, sizeof(val)); =20 out: --=20 2.34.1 From nobody Mon Jun 29 22:11:04 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C3EAC433EF for ; Tue, 1 Feb 2022 16:16:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240989AbiBAQQT (ORCPT ); Tue, 1 Feb 2022 11:16:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240976AbiBAQQS (ORCPT ); Tue, 1 Feb 2022 11:16:18 -0500 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 720B1C061714; Tue, 1 Feb 2022 08:16:18 -0800 (PST) Received: by mail-pj1-x1029.google.com with SMTP id m7so558891pjk.0; Tue, 01 Feb 2022 08:16:18 -0800 (PST) DKIM-Signature: v=1; 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[73.25.156.94]) by smtp.gmail.com with ESMTPSA id d22sm15617930pfl.71.2022.02.01.08.16.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 08:16:16 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Emma Anholt , Yiwei Zhang , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , Jonathan Marek , Jordan Crouse , =?UTF-8?q?Christian=20K=C3=B6nig?= , Akhil P Oommen , Stephen Boyd , Yangtao Li , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 2/2] drm/msm/gpu: Track global faults per address-space Date: Tue, 1 Feb 2022 08:16:12 -0800 Message-Id: <20220201161618.778455-3-robdclark@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220201161618.778455-1-robdclark@gmail.com> References: <20220201161618.778455-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Rob Clark Other processes don't need to know about faults that they are isolated from by virtue of address space isolation. They are only interested in whether some of their state might have been corrupted. But to be safe, also track unattributed faults. This case should really never happen unless there is a kernel bug (and that would never happen, right?) v2: Instead of adding a new param, just change the behavior of the existing param to match what userspace actually wants [anholt] Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5934 Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- drivers/gpu/drm/msm/msm_gem.h | 3 +++ drivers/gpu/drm/msm/msm_gpu.c | 8 +++++++- drivers/gpu/drm/msm/msm_gpu.h | 5 ++++- 4 files changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/= adreno/adreno_gpu.c index caa9076197de..58dfb23cf2af 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -269,7 +269,7 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_fi= le_private *ctx, *value =3D 0; return 0; case MSM_PARAM_FAULTS: - *value =3D gpu->global_faults; + *value =3D gpu->global_faults + ctx->aspace->faults; return 0; case MSM_PARAM_SUSPENDS: *value =3D gpu->suspend_count; diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 54ca0817d807..af612add5264 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -35,6 +35,9 @@ struct msm_gem_address_space { * will be non-NULL: */ struct pid *pid; + + /* @faults: the number of GPU hangs associated with this address space */ + int faults; }; =20 struct msm_gem_vma { diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 2c1049c0ea14..942bf41403ff 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -370,8 +370,8 @@ static void recover_worker(struct kthread_work *work) struct task_struct *task; =20 /* Increment the fault counts */ - gpu->global_faults++; submit->queue->faults++; + submit->aspace->faults++; =20 task =3D get_pid_task(submit->pid, PIDTYPE_PID); if (task) { @@ -389,6 +389,12 @@ static void recover_worker(struct kthread_work *work) } else { msm_rd_dump_submit(priv->hangrd, submit, NULL); } + } else { + /* + * We couldn't attribute this fault to any particular context, + * so increment the global fault count instead. + */ + gpu->global_faults++; } =20 /* Record the crash state */ diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index ba8407231340..c99627fc99dd 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -200,7 +200,10 @@ struct msm_gpu { /* does gpu need hw_init? */ bool needs_hw_init; =20 - /* number of GPU hangs (for all contexts) */ + /** + * global_faults: number of GPU hangs not attributed to a particular + * address space + */ int global_faults; =20 void __iomem *mmio; --=20 2.34.1