From nobody Tue Jun 30 00:01:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4124C433EF for ; Mon, 31 Jan 2022 10:01:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358072AbiAaKBm (ORCPT ); Mon, 31 Jan 2022 05:01:42 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:46676 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1358114AbiAaJ7y (ORCPT ); Mon, 31 Jan 2022 04:59:54 -0500 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20V8vMww027165; Mon, 31 Jan 2022 10:59:17 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=fXiYuBUyotv54LQyPZgnEfOt06j2LWRZLDd1yz76l+0=; b=jc5cAI3BkAgTG6dNsMw71QR2Jn2ankB6Si2/WODU8SwKEbxDYZ7YgBFVfcBcJX9wRM57 Hv0JSc+jTvJO6He/tE9vly49ogRqX020NBLTXGIJWyZZOER9q82NMPsowZez7TyOrOKY 2BlyuCgG22SY6rzi22tA2gvXjSEwmDyRSpydVDg9RcIFUye4t84kq2+6c91h4sBQedyc F3EV4jJkUvJjmDl9cqI5CVi8QXY1w86zY0l5/Ya/3kMfugNuN9EPwO9xUcBywgD8R54x la5iTr9SmsxNUT0f/x+bgUk8wYb8EDMz5AvlfbGMVpBaEk7xUZny/dJGVqK6mArkVtfX SQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3dwwf3uktb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 31 Jan 2022 10:59:17 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 0010810002A; Mon, 31 Jan 2022 10:59:16 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id EB54B212FB3; Mon, 31 Jan 2022 10:59:16 +0100 (CET) Received: from localhost (10.75.127.48) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Mon, 31 Jan 2022 10:59:16 +0100 From: Christophe Kerello To: , , , , CC: , , , , , Christophe Kerello , Rob Herring Subject: [PATCH v2 1/4] dt-binding: mtd: nand: Document the wp-gpios property Date: Mon, 31 Jan 2022 10:57:52 +0100 Message-ID: <20220131095755.8981-2-christophe.kerello@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220131095755.8981-1-christophe.kerello@foss.st.com> References: <20220131095755.8981-1-christophe.kerello@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-31_02,2022-01-28_01,2021-12-02_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" A few drivers use this property to describe the GPIO pin used to protect the NAND during program/erase operations. Signed-off-by: Christophe Kerello Acked-by: Rob Herring --- Changes in v2: - add Rob Acked-by. Documentation/devicetree/bindings/mtd/nand-controller.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/D= ocumentation/devicetree/bindings/mtd/nand-controller.yaml index bd217e6f5018..53b21aed0ac5 100644 --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml @@ -154,6 +154,13 @@ patternProperties: Ready/Busy pins. Active state refers to the NAND ready state and should be set to GPIOD_ACTIVE_HIGH unless the signal is inverted. =20 + wp-gpios: + description: + Contains one GPIO descriptor for the Write Protect pin. + Active state refers to the NAND Write Protect state and should be + set to GPIOD_ACTIVE_LOW unless the signal is inverted. + maxItems: 1 + secure-regions: $ref: /schemas/types.yaml#/definitions/uint64-matrix description: --=20 2.25.1 From nobody Tue Jun 30 00:01:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E045C433EF for ; Mon, 31 Jan 2022 10:01:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357958AbiAaKBd (ORCPT ); Mon, 31 Jan 2022 05:01:33 -0500 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:36576 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358051AbiAaJ7y (ORCPT ); Mon, 31 Jan 2022 04:59:54 -0500 Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20V90gQ3001004; Mon, 31 Jan 2022 10:59:19 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=vJYKJrfoZTOxidHtgmggToIXf7luT4gK50tpphfihR8=; b=pQpHKnyPFtzLhX3a1LRnAHWBr4F3cIWdjbCWA4x7nlBHSzzvw5aH84wKwis8wCvG2pjj KN8rJBMPSUMqowZWI2XI01iKE9WHBeFQTHlq9oIG1gJagS9SCx31YjDqF/8h85krvv7r 2Cp/v49iIYzB+HM0xG8DTkZVrY8VFFY99VsUciDwraGax2/M20Lp/a7gqpatL89pSwWH aLWm5GyUUzl+4s19klElj2Cgem2T3kEM6J3+dG7Fl8ijTyS+Psf2a+UgZVQXx4f/dLhT nWNwYlSEz3Cxf7mK60XcjA6WGmG6SLMyeuQTlw+r8UZ2E7WF2C7hbnI2RvP+/7U+FXFH vA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3dx0pya922-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 31 Jan 2022 10:59:19 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 4686110002A; Mon, 31 Jan 2022 10:59:19 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 3E581210F85; Mon, 31 Jan 2022 10:59:19 +0100 (CET) Received: from localhost (10.75.127.51) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Mon, 31 Jan 2022 10:59:18 +0100 From: Christophe Kerello To: , , , , CC: , , , , , Christophe Kerello Subject: [PATCH v2 2/4] mtd: rawnand: stm32_fmc2: Add NAND Write Protect support Date: Mon, 31 Jan 2022 10:57:53 +0100 Message-ID: <20220131095755.8981-3-christophe.kerello@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220131095755.8981-1-christophe.kerello@foss.st.com> References: <20220131095755.8981-1-christophe.kerello@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG2NODE1.st.com (10.75.127.4) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-31_02,2022-01-28_01,2021-12-02_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch adds the support of the WP# signal. WP will be disabled in probe/resume callbacks and will be enabled in remove/suspend callbacks. Signed-off-by: Christophe Kerello --- drivers/mtd/nand/raw/stm32_fmc2_nand.c | 40 +++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/= stm32_fmc2_nand.c index 97b4e02e43e4..87c1c7dd97eb 100644 --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -231,6 +232,7 @@ struct stm32_fmc2_timings { =20 struct stm32_fmc2_nand { struct nand_chip chip; + struct gpio_desc *wp_gpio; struct stm32_fmc2_timings timings; int ncs; int cs_used[FMC2_MAX_CE]; @@ -1747,6 +1749,18 @@ static const struct nand_controller_ops stm32_fmc2_n= fc_controller_ops =3D { .setup_interface =3D stm32_fmc2_nfc_setup_interface, }; =20 +static void stm32_fmc2_nfc_wp_enable(struct stm32_fmc2_nand *nand) +{ + if (nand->wp_gpio) + gpiod_set_value(nand->wp_gpio, 1); +} + +static void stm32_fmc2_nfc_wp_disable(struct stm32_fmc2_nand *nand) +{ + if (nand->wp_gpio) + gpiod_set_value(nand->wp_gpio, 0); +} + static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc, struct device_node *dn) { @@ -1785,6 +1799,18 @@ static int stm32_fmc2_nfc_parse_child(struct stm32_f= mc2_nfc *nfc, nand->cs_used[i] =3D cs; } =20 + nand->wp_gpio =3D devm_gpiod_get_from_of_node(nfc->dev, dn, + "wp-gpios", 0, + GPIOD_OUT_HIGH, "wp"); + if (IS_ERR(nand->wp_gpio)) { + ret =3D PTR_ERR(nand->wp_gpio); + if (ret !=3D -ENOENT) + return dev_err_probe(nfc->dev, ret, + "failed to request WP GPIO\n"); + + nand->wp_gpio =3D NULL; + } + nand_set_flash_node(&nand->chip, dn); =20 return 0; @@ -1956,10 +1982,12 @@ static int stm32_fmc2_nfc_probe(struct platform_dev= ice *pdev) chip->options |=3D NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE | NAND_USES_DMA; =20 + stm32_fmc2_nfc_wp_disable(nand); + /* Scan to find existence of the device */ ret =3D nand_scan(chip, nand->ncs); if (ret) - goto err_release_dma; + goto err_wp_enable; =20 ret =3D mtd_device_register(mtd, NULL, 0); if (ret) @@ -1972,6 +2000,9 @@ static int stm32_fmc2_nfc_probe(struct platform_devic= e *pdev) err_nand_cleanup: nand_cleanup(chip); =20 +err_wp_enable: + stm32_fmc2_nfc_wp_enable(nand); + err_release_dma: if (nfc->dma_ecc_ch) dma_release_channel(nfc->dma_ecc_ch); @@ -2012,15 +2043,20 @@ static int stm32_fmc2_nfc_remove(struct platform_de= vice *pdev) =20 clk_disable_unprepare(nfc->clk); =20 + stm32_fmc2_nfc_wp_enable(nand); + return 0; } =20 static int __maybe_unused stm32_fmc2_nfc_suspend(struct device *dev) { struct stm32_fmc2_nfc *nfc =3D dev_get_drvdata(dev); + struct stm32_fmc2_nand *nand =3D &nfc->nand; =20 clk_disable_unprepare(nfc->clk); =20 + stm32_fmc2_nfc_wp_enable(nand); + pinctrl_pm_select_sleep_state(dev); =20 return 0; @@ -2042,6 +2078,8 @@ static int __maybe_unused stm32_fmc2_nfc_resume(struc= t device *dev) =20 stm32_fmc2_nfc_init(nfc); =20 + stm32_fmc2_nfc_wp_disable(nand); + for (chip_cs =3D 0; chip_cs < FMC2_MAX_CE; chip_cs++) { if (!(nfc->cs_assigned & BIT(chip_cs))) continue; --=20 2.25.1 From nobody Tue Jun 30 00:01:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD367C433EF for ; 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Mon, 31 Jan 2022 10:59:21 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3DF7110002A; Mon, 31 Jan 2022 10:59:21 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 3303B210F85; Mon, 31 Jan 2022 10:59:21 +0100 (CET) Received: from localhost (10.75.127.50) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Mon, 31 Jan 2022 10:59:20 +0100 From: Christophe Kerello To: , , , , CC: , , , , , Christophe Kerello Subject: [PATCH v2 3/4] nvmem: core: Fix a conflict between MTD and NVMEM on wp-gpios property Date: Mon, 31 Jan 2022 10:57:54 +0100 Message-ID: <20220131095755.8981-4-christophe.kerello@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220131095755.8981-1-christophe.kerello@foss.st.com> References: <20220131095755.8981-1-christophe.kerello@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG2NODE1.st.com (10.75.127.4) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-31_02,2022-01-28_01,2021-12-02_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Wp-gpios property can be used on NVMEM nodes and the same property can be also used on MTD NAND nodes. In case of the wp-gpios property is defined at NAND level node, the GPIO management is done at NAND driver level. Write protect is disabled when the driver is probed or resumed and is enabled when the driver is released or suspended. When no partitions are defined in the NAND DT node, then the NAND DT node will be passed to NVMEM framework. If wp-gpios property is defined in this node, the GPIO resource is taken twice and the NAND controller driver fails to probe. It would be possible to set config->wp_gpio at MTD level before calling nvmem_register function but NVMEM framework will toggle this GPIO on each write when this GPIO should only be controlled at NAND level driver to ensure that the Write Protect has not been enabled. A way to fix this conflict is to add a new boolean flag in nvmem_config named skip_wp_gpio. In case skip_wp_gpio is set, the GPIO resource will be managed by the provider. Signed-off-by: Christophe Kerello --- Changes in v2: - rework the proposal done to fix a conflict between MTD and NVMEM on wp-gpios property. drivers/nvmem/core.c | 2 +- include/linux/nvmem-provider.h | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index 23a38dcf0fc4..cb40dca6a51d 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -771,7 +771,7 @@ struct nvmem_device *nvmem_register(const struct nvmem_= config *config) =20 if (config->wp_gpio) nvmem->wp_gpio =3D config->wp_gpio; - else + else if (!config->skip_wp_gpio) nvmem->wp_gpio =3D gpiod_get_optional(config->dev, "wp", GPIOD_OUT_HIGH); if (IS_ERR(nvmem->wp_gpio)) { diff --git a/include/linux/nvmem-provider.h b/include/linux/nvmem-provider.h index 98efb7b5660d..4b480023c265 100644 --- a/include/linux/nvmem-provider.h +++ b/include/linux/nvmem-provider.h @@ -70,7 +70,8 @@ struct nvmem_keepout { * @word_size: Minimum read/write access granularity. * @stride: Minimum read/write access stride. * @priv: User context passed to read/write callbacks. - * @wp-gpio: Write protect pin + * @wp-gpio: Write protect pin + * @skip_wp_gpio: Write Protect pin is managed by the provider. * * Note: A default "nvmem" name will be assigned to the device if * no name is specified in its configuration. In such case "" is @@ -92,6 +93,7 @@ struct nvmem_config { enum nvmem_type type; bool read_only; bool root_only; + bool skip_wp_gpio; struct device_node *of_node; bool no_of_node; nvmem_reg_read_t reg_read; --=20 2.25.1 From nobody Tue Jun 30 00:01:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C03C8C433EF for ; Mon, 31 Jan 2022 10:01:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357929AbiAaKBf (ORCPT ); Mon, 31 Jan 2022 05:01:35 -0500 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:47118 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358113AbiAaJ7x (ORCPT ); Mon, 31 Jan 2022 04:59:53 -0500 Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20V8xSXT010093; Mon, 31 Jan 2022 10:59:24 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=4xGOYqCr38/TywJ11YciO1239M8FT36XU2Cg6xfnm6s=; b=CzfZlc/AsiyZyO9loJXzHbguc2p8yWeBQZx21TDi7zeVYTPavm3UIF8O8GPSDvN44eCX sFwVSUOFT1SroImh5Zmyl4loYaN5rERBPL7ftV4ZpmvZ2QFksFNQjqHKA5J7tyC2o1a4 l3Z99sStuxfDcw/mWwSjttxGs73IhhB3HS0GtHpBfsLkYK4DGzk9mPUiFZZENnqm5e0O /fnESuVZRw2O1dVblJLMoVx+9ajOFUKaoMCkc40tXxp+RFaMs1DCdfAoMCM1VdSWAl74 VH8FizY6Xei8yMe1ihynrV8O4nSsRt2ZkLvbhQF0AjcsvAxobOJ9HVQbnmrWdAjkeIWt Kg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3dwutpju1d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 31 Jan 2022 10:59:24 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 0D6EB100038; Mon, 31 Jan 2022 10:59:24 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 056ED210F85; Mon, 31 Jan 2022 10:59:24 +0100 (CET) Received: from localhost (10.75.127.51) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Mon, 31 Jan 2022 10:59:23 +0100 From: Christophe Kerello To: , , , , CC: , , , , , Christophe Kerello Subject: [PATCH v2 4/4] mtd: core: Fix a conflict between MTD and NVMEM on wp-gpios property Date: Mon, 31 Jan 2022 10:57:55 +0100 Message-ID: <20220131095755.8981-5-christophe.kerello@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220131095755.8981-1-christophe.kerello@foss.st.com> References: <20220131095755.8981-1-christophe.kerello@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-31_02,2022-01-28_01,2021-12-02_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Wp-gpios property can be used on NVMEM nodes and the same property can be also used on MTD NAND nodes. In case of the wp-gpios property is defined at NAND level node, the GPIO management is done at NAND driver level. Write protect is disabled when the driver is probed or resumed and is enabled when the driver is released or suspended. When no partitions are defined in the NAND DT node, then the NAND DT node will be passed to NVMEM framework. If wp-gpios property is defined in this node, the GPIO resource is taken twice and the NAND controller driver fails to probe. A new Boolean flag named skip_wp_gpio has been added in nvmem_config. In case skip_wp_gpio is set, it means that the GPIO is handled by the provider. Lets set this flag in MTD layer to avoid the conflict on wp_gpios property. Signed-off-by: Christophe Kerello --- drivers/mtd/mtdcore.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c index 70f492dce158..e6d251594def 100644 --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c @@ -546,6 +546,7 @@ static int mtd_nvmem_add(struct mtd_info *mtd) config.stride =3D 1; config.read_only =3D true; config.root_only =3D true; + config.skip_wp_gpio =3D true; config.no_of_node =3D !of_device_is_compatible(node, "nvmem-cells"); config.priv =3D mtd; =20 @@ -833,6 +834,7 @@ static struct nvmem_device *mtd_otp_nvmem_register(stru= ct mtd_info *mtd, config.owner =3D THIS_MODULE; config.type =3D NVMEM_TYPE_OTP; config.root_only =3D true; + config.skip_wp_gpio =3D true; config.reg_read =3D reg_read; config.size =3D size; config.of_node =3D np; --=20 2.25.1