From nobody Tue Jun 30 03:38:22 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A89EEC2BA4C for ; Wed, 26 Jan 2022 06:10:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235066AbiAZGKe (ORCPT ); Wed, 26 Jan 2022 01:10:34 -0500 Received: from mail-sh.amlogic.com ([58.32.228.43]:63091 "EHLO mail-sh.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234880AbiAZGKa (ORCPT ); Wed, 26 Jan 2022 01:10:30 -0500 Received: from droid01-cd.amlogic.com (10.98.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2176.14; Wed, 26 Jan 2022 14:10:28 +0800 From: Shunzhou Jiang To: , , CC: , , , , , Subject: [PATCH 1/2] dt-bindings: power: add Amlogic s4 power domains bindings Date: Wed, 26 Jan 2022 14:10:17 +0800 Message-ID: <20220126061018.705338-2-shunzhou.jiang@amlogic.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220126061018.705338-1-shunzhou.jiang@amlogic.com> References: <20220126061018.705338-1-shunzhou.jiang@amlogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.98.11.200] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the bindings for the Amlogic Secure power domains, controlling the secure power domains. The bindings targets the Amlogic s4, in which the power domains registers are in secure world. Signed-off-by: Shunzhou Jiang --- .../power/amlogic,meson-sec-pwrc.yaml | 3 ++- include/dt-bindings/power/meson-s4-power.h | 19 +++++++++++++++++++ 2 files changed, 21 insertions(+), 1 deletion(-) create mode 100644 include/dt-bindings/power/meson-s4-power.h diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc= .yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml index 5dae04d2936c..7657721a4e96 100644 --- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml @@ -12,13 +12,14 @@ maintainers: - Jianxin Pan =20 description: |+ - Secure Power Domains used in Meson A1/C1 SoCs, and should be the child n= ode + Secure Power Domains used in Meson A1/C1/S4 SoCs, and should be the chil= d node of secure-monitor. =20 properties: compatible: enum: - amlogic,meson-a1-pwrc + - amlogic,meson-s4-pwrc =20 "#power-domain-cells": const: 1 diff --git a/include/dt-bindings/power/meson-s4-power.h b/include/dt-bindin= gs/power/meson-s4-power.h new file mode 100644 index 000000000000..462dd2cb938b --- /dev/null +++ b/include/dt-bindings/power/meson-s4-power.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ +/* + * Copyright (c) 2021 Amlogic, Inc. + * Author: Shunzhou Jiang + */ + +#ifndef _DT_BINDINGS_MESON_S4_POWER_H +#define _DT_BINDINGS_MESON_S4_POWER_H + +#define PWRC_S4_DOS_HEVC_ID 0 +#define PWRC_S4_DOS_VDEC_ID 1 +#define PWRC_S4_VPU_HDMI_ID 2 +#define PWRC_S4_USB_COMB_ID 3 +#define PWRC_S4_GE2D_ID 4 +#define PWRC_S4_ETH_ID 5 +#define PWRC_S4_DEMOD_ID 6 +#define PWRC_S4_AUDIO_ID 7 + +#endif --=20 2.34.1 From nobody Tue Jun 30 03:38:22 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C049FC28CF5 for ; Wed, 26 Jan 2022 06:10:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235089AbiAZGKf (ORCPT ); Wed, 26 Jan 2022 01:10:35 -0500 Received: from mail-sh.amlogic.com ([58.32.228.43]:63091 "EHLO mail-sh.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234959AbiAZGKe (ORCPT ); Wed, 26 Jan 2022 01:10:34 -0500 Received: from droid01-cd.amlogic.com (10.98.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2176.14; Wed, 26 Jan 2022 14:10:31 +0800 From: Shunzhou Jiang To: , , CC: , , , , , Subject: [PATCH 2/2] soc: s4: Add support for power domains controller Date: Wed, 26 Jan 2022 14:10:18 +0800 Message-ID: <20220126061018.705338-3-shunzhou.jiang@amlogic.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220126061018.705338-1-shunzhou.jiang@amlogic.com> References: <20220126061018.705338-1-shunzhou.jiang@amlogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.98.11.200] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support s4 Power controller. In s4, power control registers are in secure domain, and should be accessed by smc. Signed-off-by: Shunzhou Jiang --- drivers/soc/amlogic/meson-secure-pwrc.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/soc/amlogic/meson-secure-pwrc.c b/drivers/soc/amlogic/= meson-secure-pwrc.c index 59bd195fa9c9..8fee01aabab6 100644 --- a/drivers/soc/amlogic/meson-secure-pwrc.c +++ b/drivers/soc/amlogic/meson-secure-pwrc.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -119,6 +120,17 @@ static struct meson_secure_pwrc_domain_desc a1_pwrc_do= mains[] =3D { SEC_PD(RSA, 0), }; =20 +static struct meson_secure_pwrc_domain_desc s4_pwrc_domains[] =3D { + SEC_PD(S4_DOS_HEVC, 0), + SEC_PD(S4_DOS_VDEC, 0), + SEC_PD(S4_VPU_HDMI, GENPD_FLAG_ALWAYS_ON), + SEC_PD(S4_USB_COMB, GENPD_FLAG_ALWAYS_ON), + SEC_PD(S4_GE2D, 0), + SEC_PD(S4_ETH, GENPD_FLAG_ALWAYS_ON), + SEC_PD(S4_DEMOD, 0), + SEC_PD(S4_AUDIO, 0), +}; + static int meson_secure_pwrc_probe(struct platform_device *pdev) { int i; @@ -187,11 +199,20 @@ static struct meson_secure_pwrc_domain_data meson_sec= ure_a1_pwrc_data =3D { .count =3D ARRAY_SIZE(a1_pwrc_domains), }; =20 +static struct meson_secure_pwrc_domain_data meson_secure_s4_pwrc_data =3D { + .domains =3D s4_pwrc_domains, + .count =3D ARRAY_SIZE(s4_pwrc_domains), +}; + static const struct of_device_id meson_secure_pwrc_match_table[] =3D { { .compatible =3D "amlogic,meson-a1-pwrc", .data =3D &meson_secure_a1_pwrc_data, }, + { + .compatible =3D "amlogic,meson-s4-pwrc", + .data =3D &meson_secure_s4_pwrc_data, + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, meson_secure_pwrc_match_table); --=20 2.34.1