From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A597CC4321E for ; Sun, 23 Jan 2022 01:34:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235280AbiAWBdx (ORCPT ); Sat, 22 Jan 2022 20:33:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235185AbiAWBdo (ORCPT ); Sat, 22 Jan 2022 20:33:44 -0500 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2445EC06173D; Sat, 22 Jan 2022 17:33:44 -0800 (PST) Received: by mail-ej1-x632.google.com with SMTP id ah7so11082587ejc.4; Sat, 22 Jan 2022 17:33:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MmjK0cbW4JfRAIy8wWmSUTOu38ViEKsI6kEuWRAmYyY=; b=kELF1zl8zOLzie0U4YmPvhyBXp2GYoNzeR1rEJLLOYibj1tCVvmh2w2MemDbwwEgXc r4H8Rq0Id61IXYoBNNT7p5BHkN79F1NxGBsPe8Bt9s5oFMmPp9wsI31wu6fnOFURwDII xt0BBfTI/73ZKUqGvwCbHnZVWClQZEfxHS3ocIo2ILK894kdsvr6ZAdPVZz/3YxENvWH QwHzD8Wd6FUCh+Ssh/Ci+ZnrPFu785H2foLZ23FZoRONkMBKiYopgUO7s+3iRlno2rQL 4Us/T7eyrqWaOAmEsqe+gz/gF0QbA7nYt50i3+h5EMjBekIZ6X3nQtDUXUWymVzI7R1P +H7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MmjK0cbW4JfRAIy8wWmSUTOu38ViEKsI6kEuWRAmYyY=; b=wG1nxYyKffPpGarBShGmPenagv/CeKkTjY8UtrcLz1M7IARE/FjdP56kPHEU2gO8gd cCDvvahxaGytKMYtzVo/NX6ZWi/v4oEwJQCdp8a7t0fenjoZQszVk2cZmONo7JLUrh4z mTSLcBb181cnHhdJdByT3wxKgZ3IN/w8XBCyFoH1Z6MvpPKW0PNQZ+VFPx0Ys2h1FZo6 X3TVTBblTc390l5h661N6auZe7JqMloQX/UkWcqgF5kxv5799KawUsMlC42lJN8W+nqa rxyr+fH+6ZdIRRZ4vaHTA8F81m4zFTq8qlQ/0iUB1ypJhPhA1WstmcRlhUE3uJ155Wj4 gB6Q== X-Gm-Message-State: AOAM533l0FW3heljAALYeGkAJ1L/o65d7grLbWvusDuj+dmtE8ZegOvx 5bfpAKhWHbcLsXeLBFiizC4= X-Google-Smtp-Source: ABdhPJwfpjRPTawcnKIqkYP0axL/rACHtJ/NTCf5R7X6AFUByFIG95PA1kDDgWiKcE7/q1oKKBcVCw== X-Received: by 2002:a17:907:961c:: with SMTP id gb28mr2103293ejc.519.1642901622518; Sat, 22 Jan 2022 17:33:42 -0800 (PST) Received: from localhost.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:42 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Vladimir Oltean , Ansuel Smith Subject: [RFC PATCH v7 01/16] net: dsa: provide switch operations for tracking the master state Date: Sun, 23 Jan 2022 02:33:22 +0100 Message-Id: <20220123013337.20945-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Vladimir Oltean Certain drivers may need to send management traffic to the switch for things like register access, FDB dump, etc, to accelerate what their slow bus (SPI, I2C, MDIO) can already do. Ethernet is faster (especially in bulk transactions) but is also more unreliable, since the user may decide to bring the DSA master down (or not bring it up), therefore severing the link between the host and the attached switch. Drivers needing Ethernet-based register access already should have fallback logic to the slow bus if the Ethernet method fails, but that fallback may be based on a timeout, and the I/O to the switch may slow down to a halt if the master is down, because every Ethernet packet will have to time out. The driver also doesn't have the option to turn off Ethernet-based I/O momentarily, because it wouldn't know when to turn it back on. Which is where this change comes in. By tracking NETDEV_CHANGE, NETDEV_UP and NETDEV_GOING_DOWN events on the DSA master, we should know the exact interval of time during which this interface is reliably available for traffic. Provide this information to switches so they can use it as they wish. An helper is added dsa_port_master_is_operational() to check if a master port is operational. Signed-off-by: Vladimir Oltean Signed-off-by: Ansuel Smith Reviewed-by: Florian Fainelli --- include/net/dsa.h | 17 +++++++++++++++++ net/dsa/dsa2.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++ net/dsa/dsa_priv.h | 13 +++++++++++++ net/dsa/slave.c | 32 ++++++++++++++++++++++++++++++++ net/dsa/switch.c | 15 +++++++++++++++ 5 files changed, 123 insertions(+) diff --git a/include/net/dsa.h b/include/net/dsa.h index 57b3e4e7413b..43c4153ef53a 100644 --- a/include/net/dsa.h +++ b/include/net/dsa.h @@ -278,6 +278,10 @@ struct dsa_port { =20 u8 devlink_port_setup:1; =20 + /* Master state bits, valid only on CPU ports */ + u8 master_admin_up:1; + u8 master_oper_up:1; + u8 setup:1; =20 struct device_node *dn; @@ -478,6 +482,12 @@ static inline bool dsa_port_is_unused(struct dsa_port = *dp) return dp->type =3D=3D DSA_PORT_TYPE_UNUSED; } =20 +static inline bool dsa_port_master_is_operational(struct dsa_port *dp) +{ + return dsa_port_is_cpu(dp) && dp->master_admin_up && + dp->master_oper_up; +} + static inline bool dsa_is_unused_port(struct dsa_switch *ds, int p) { return dsa_to_port(ds, p)->type =3D=3D DSA_PORT_TYPE_UNUSED; @@ -1036,6 +1046,13 @@ struct dsa_switch_ops { int (*tag_8021q_vlan_add)(struct dsa_switch *ds, int port, u16 vid, u16 flags); int (*tag_8021q_vlan_del)(struct dsa_switch *ds, int port, u16 vid); + + /* + * DSA master tracking operations + */ + void (*master_state_change)(struct dsa_switch *ds, + const struct net_device *master, + bool operational); }; =20 #define DSA_DEVLINK_PARAM_DRIVER(_id, _name, _type, _cmodes) \ diff --git a/net/dsa/dsa2.c b/net/dsa/dsa2.c index 3d21521453fe..ff998c0ede02 100644 --- a/net/dsa/dsa2.c +++ b/net/dsa/dsa2.c @@ -1279,6 +1279,52 @@ int dsa_tree_change_tag_proto(struct dsa_switch_tree= *dst, return err; } =20 +static void dsa_tree_master_state_change(struct dsa_switch_tree *dst, + struct net_device *master) +{ + struct dsa_notifier_master_state_info info; + struct dsa_port *cpu_dp =3D master->dsa_ptr; + + info.master =3D master; + info.operational =3D dsa_port_master_is_operational(cpu_dp); + + dsa_tree_notify(dst, DSA_NOTIFIER_MASTER_STATE_CHANGE, &info); +} + +void dsa_tree_master_admin_state_change(struct dsa_switch_tree *dst, + struct net_device *master, + bool up) +{ + struct dsa_port *cpu_dp =3D master->dsa_ptr; + bool notify =3D false; + + if ((dsa_port_master_is_operational(cpu_dp)) !=3D + (up && cpu_dp->master_oper_up)) + notify =3D true; + + cpu_dp->master_admin_up =3D up; + + if (notify) + dsa_tree_master_state_change(dst, master); +} + +void dsa_tree_master_oper_state_change(struct dsa_switch_tree *dst, + struct net_device *master, + bool up) +{ + struct dsa_port *cpu_dp =3D master->dsa_ptr; + bool notify =3D false; + + if ((dsa_port_master_is_operational(cpu_dp)) !=3D + (cpu_dp->master_admin_up && up)) + notify =3D true; + + cpu_dp->master_oper_up =3D up; + + if (notify) + dsa_tree_master_state_change(dst, master); +} + static struct dsa_port *dsa_port_touch(struct dsa_switch *ds, int index) { struct dsa_switch_tree *dst =3D ds->dst; diff --git a/net/dsa/dsa_priv.h b/net/dsa/dsa_priv.h index 760306f0012f..2bbfa9efe9f8 100644 --- a/net/dsa/dsa_priv.h +++ b/net/dsa/dsa_priv.h @@ -40,6 +40,7 @@ enum { DSA_NOTIFIER_TAG_PROTO_DISCONNECT, DSA_NOTIFIER_TAG_8021Q_VLAN_ADD, DSA_NOTIFIER_TAG_8021Q_VLAN_DEL, + DSA_NOTIFIER_MASTER_STATE_CHANGE, }; =20 /* DSA_NOTIFIER_AGEING_TIME */ @@ -109,6 +110,12 @@ struct dsa_notifier_tag_8021q_vlan_info { u16 vid; }; =20 +/* DSA_NOTIFIER_MASTER_STATE_CHANGE */ +struct dsa_notifier_master_state_info { + const struct net_device *master; + bool operational; +}; + struct dsa_switchdev_event_work { struct dsa_switch *ds; int port; @@ -482,6 +489,12 @@ int dsa_tree_change_tag_proto(struct dsa_switch_tree *= dst, struct net_device *master, const struct dsa_device_ops *tag_ops, const struct dsa_device_ops *old_tag_ops); +void dsa_tree_master_admin_state_change(struct dsa_switch_tree *dst, + struct net_device *master, + bool up); +void dsa_tree_master_oper_state_change(struct dsa_switch_tree *dst, + struct net_device *master, + bool up); unsigned int dsa_bridge_num_get(const struct net_device *bridge_dev, int m= ax); void dsa_bridge_num_put(const struct net_device *bridge_dev, unsigned int bridge_num); diff --git a/net/dsa/slave.c b/net/dsa/slave.c index 22241afcac81..2b5b0f294233 100644 --- a/net/dsa/slave.c +++ b/net/dsa/slave.c @@ -2346,6 +2346,36 @@ static int dsa_slave_netdevice_event(struct notifier= _block *nb, err =3D dsa_port_lag_change(dp, info->lower_state_info); return notifier_from_errno(err); } + case NETDEV_CHANGE: + case NETDEV_UP: { + /* Track state of master port. + * DSA driver may require the master port (and indirectly + * the tagger) to be available for some special operation. + */ + if (netdev_uses_dsa(dev)) { + struct dsa_port *cpu_dp =3D dev->dsa_ptr; + struct dsa_switch_tree *dst =3D cpu_dp->ds->dst; + + /* Track when the master port is UP */ + dsa_tree_master_oper_state_change(dst, dev, + netif_oper_up(dev)); + + /* Track when the master port is ready and can accept + * packet. + * NETDEV_UP event is not enough to flag a port as ready. + * We also have to wait for linkwatch_do_dev to dev_activate + * and emit a NETDEV_CHANGE event. + * We check if a master port is ready by checking if the dev + * have a qdisc assigned and is not noop. + */ + dsa_tree_master_admin_state_change(dst, dev, + !qdisc_tx_is_noop(dev)); + + return NOTIFY_OK; + } + + return NOTIFY_DONE; + } case NETDEV_GOING_DOWN: { struct dsa_port *dp, *cpu_dp; struct dsa_switch_tree *dst; @@ -2357,6 +2387,8 @@ static int dsa_slave_netdevice_event(struct notifier_= block *nb, cpu_dp =3D dev->dsa_ptr; dst =3D cpu_dp->ds->dst; =20 + dsa_tree_master_admin_state_change(dst, dev, false); + list_for_each_entry(dp, &dst->ports, list) { if (!dsa_port_is_user(dp)) continue; diff --git a/net/dsa/switch.c b/net/dsa/switch.c index e3c7d2627a61..4e9cbe3a3127 100644 --- a/net/dsa/switch.c +++ b/net/dsa/switch.c @@ -683,6 +683,18 @@ dsa_switch_disconnect_tag_proto(struct dsa_switch *ds, return 0; } =20 +static int +dsa_switch_master_state_change(struct dsa_switch *ds, + struct dsa_notifier_master_state_info *info) +{ + if (!ds->ops->master_state_change) + return 0; + + ds->ops->master_state_change(ds, info->master, info->operational); + + return 0; +} + static int dsa_switch_event(struct notifier_block *nb, unsigned long event, void *info) { @@ -756,6 +768,9 @@ static int dsa_switch_event(struct notifier_block *nb, case DSA_NOTIFIER_TAG_8021Q_VLAN_DEL: err =3D dsa_switch_tag_8021q_vlan_del(ds, info); break; + case DSA_NOTIFIER_MASTER_STATE_CHANGE: + err =3D dsa_switch_master_state_change(ds, info); + break; default: err =3D -EOPNOTSUPP; break; --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F0DAC433FE for ; Sun, 23 Jan 2022 01:34:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235320AbiAWBdy (ORCPT ); Sat, 22 Jan 2022 20:33:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54588 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235224AbiAWBdp (ORCPT ); Sat, 22 Jan 2022 20:33:45 -0500 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 142F1C06173B; Sat, 22 Jan 2022 17:33:45 -0800 (PST) Received: by mail-ej1-x62c.google.com with SMTP id j2so11048174ejk.6; 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:43 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Vladimir Oltean , Ansuel Smith Subject: [RFC PATCH v7 02/16] net: dsa: replay master state events in dsa_tree_{setup,teardown}_master Date: Sun, 23 Jan 2022 02:33:23 +0100 Message-Id: <20220123013337.20945-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Vladimir Oltean In order for switch driver to be able to make simple and reliable use of the master tracking operations, they must also be notified of the initial state of the DSA master, not just of the changes. This is because they might enable certain features only during the time when they know that the DSA master is up and running. Therefore, this change explicitly checks the state of the DSA master under the same rtnl_mutex as we were holding during the dsa_master_setup() and dsa_master_teardown() call. The idea being that if the DSA master became operational in between the moment in which it became a DSA master (dsa_master_setup set dev->dsa_ptr) and the moment when we checked for the master being up, there is a chance that we would emit a ->master_state_change() call with no actual state change. We need to avoid that by serializing the concurrent netdevice event with us. If the netdevice event started before, we force it to finish before we begin, because we take rtnl_lock before making netdev_uses_dsa() return true. So we also handle that early event and do nothing on it. Similarly, if the dev_open() attempt is concurrent with us, it will attempt to take the rtnl_mutex, but we're holding it. We'll see that the master flag IFF_UP isn't set, then when we release the rtnl_mutex we'll process the NETDEV_UP notifier. Signed-off-by: Vladimir Oltean Signed-off-by: Ansuel Smith --- net/dsa/dsa2.c | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/net/dsa/dsa2.c b/net/dsa/dsa2.c index ff998c0ede02..909b045c9b11 100644 --- a/net/dsa/dsa2.c +++ b/net/dsa/dsa2.c @@ -15,6 +15,7 @@ #include #include #include +#include =20 #include "dsa_priv.h" =20 @@ -1064,9 +1065,18 @@ static int dsa_tree_setup_master(struct dsa_switch_t= ree *dst) =20 list_for_each_entry(dp, &dst->ports, list) { if (dsa_port_is_cpu(dp)) { - err =3D dsa_master_setup(dp->master, dp); + struct net_device *master =3D dp->master; + bool admin_up =3D (master->flags & IFF_UP) && + !qdisc_tx_is_noop(master); + + err =3D dsa_master_setup(master, dp); if (err) return err; + + /* Replay master state event */ + dsa_tree_master_admin_state_change(dst, master, admin_up); + dsa_tree_master_oper_state_change(dst, master, + netif_oper_up(master)); } } =20 @@ -1081,9 +1091,19 @@ static void dsa_tree_teardown_master(struct dsa_swit= ch_tree *dst) =20 rtnl_lock(); =20 - list_for_each_entry(dp, &dst->ports, list) - if (dsa_port_is_cpu(dp)) - dsa_master_teardown(dp->master); + list_for_each_entry(dp, &dst->ports, list) { + if (dsa_port_is_cpu(dp)) { + struct net_device *master =3D dp->master; + + /* Synthesizing an "admin down" state is sufficient for + * the switches to get a notification if the master is + * currently up and running. + */ + dsa_tree_master_admin_state_change(dst, master, false); + + dsa_master_teardown(master); + } + } =20 rtnl_unlock(); } --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F47EC4167B for ; Sun, 23 Jan 2022 01:34:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235355AbiAWBd4 (ORCPT ); Sat, 22 Jan 2022 20:33:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54592 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235243AbiAWBdq (ORCPT ); Sat, 22 Jan 2022 20:33:46 -0500 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE91EC06173B; Sat, 22 Jan 2022 17:33:45 -0800 (PST) Received: by mail-ej1-x636.google.com with SMTP id ah7so11082701ejc.4; Sat, 22 Jan 2022 17:33:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FPHCW224dbQX+hfHQkJaGaEhoEvlqsOfdITuUUKo/eY=; b=jgsqe1o0sN5fWZbFEy/0obs+MBB6lXyQEgErvq54F+PJ3qNurAmM1Tfd9VSzwPfbwD 2zqc9aG3dPLJ5lA38/kFtWOTtGlyZ7EKnmFdQs0RxkOVEo7TwKujTicZrQRS4IJ4f/+d 75lfi/BMoYji5uqc066cdeqKZC+wiUdhdWbOPSru+ocpWrMssTeoM1VqcOdAa13pk9n1 6xsTDFMY08V3wW0r6WxrAtnYFwXNzJ7GKNTZwNwURzruYnpxH7Gi49tXsTFTXYUeemRP 8oukSOnVnPjTehOeZbzly3/PWIOTxR0e5TDkbEuV1w7SnwYdkYmGq+JDbOYjdqXMotfZ xFVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FPHCW224dbQX+hfHQkJaGaEhoEvlqsOfdITuUUKo/eY=; b=bLdL2Hh3FNSrIzKOz9XhBd81MMc3GCY4MhBVeiDDyOcbaDOvIUP/glXhMbZvk6R9bl uoNOuqzrGXUF/W0pO3hv3qPj3Hx7edelnihuz+RNabiGARF33DueVUxJOOemsD+RTBIT 4gd4X7mUsaIEVZ2j2dZaFlwhmwbsWRfJr6An4r/CAjMIxiglN0HRCFkqq9JwBnpv/s29 C2CRqQYZiJhh7BQHdTzewBLFo/ta2882GZUWomWuNfwqGfD+pXG1E2YiPCvynyYhS7Qz HLr98AI0uy58tDOgye/rtGGe7bj37qo9nXa7O4WMqfMnJgpWapMO2SRdBZ41AVb0e1Rg Xkpg== X-Gm-Message-State: AOAM530wQFihDDlXZslz+KhkKS0IcW3+z+HMN8UtrBdwWUzn8W9AEJoW SMYXxxAIA/5mTRiCAp7QHy0= X-Google-Smtp-Source: ABdhPJwZOpf2kv1TPcd0/i/LZfHhrIoQQ2WIu3iUGuEU633D71PkyaOUGZUd2j2128JQGcdqsJ4nWQ== X-Received: by 2002:a17:906:6148:: with SMTP id p8mr7886242ejl.254.1642901624498; Sat, 22 Jan 2022 17:33:44 -0800 (PST) Received: from localhost.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:44 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 03/16] net: dsa: tag_qca: convert to FIELD macro Date: Sun, 23 Jan 2022 02:33:24 +0100 Message-Id: <20220123013337.20945-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert driver to FIELD macro to drop redundant define. Signed-off-by: Ansuel Smith --- net/dsa/tag_qca.c | 34 +++++++++++++++------------------- 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/net/dsa/tag_qca.c b/net/dsa/tag_qca.c index 1ea9401b8ace..55fa6b96b4eb 100644 --- a/net/dsa/tag_qca.c +++ b/net/dsa/tag_qca.c @@ -4,29 +4,24 @@ */ =20 #include +#include =20 #include "dsa_priv.h" =20 #define QCA_HDR_LEN 2 #define QCA_HDR_VERSION 0x2 =20 -#define QCA_HDR_RECV_VERSION_MASK GENMASK(15, 14) -#define QCA_HDR_RECV_VERSION_S 14 -#define QCA_HDR_RECV_PRIORITY_MASK GENMASK(13, 11) -#define QCA_HDR_RECV_PRIORITY_S 11 -#define QCA_HDR_RECV_TYPE_MASK GENMASK(10, 6) -#define QCA_HDR_RECV_TYPE_S 6 +#define QCA_HDR_RECV_VERSION GENMASK(15, 14) +#define QCA_HDR_RECV_PRIORITY GENMASK(13, 11) +#define QCA_HDR_RECV_TYPE GENMASK(10, 6) #define QCA_HDR_RECV_FRAME_IS_TAGGED BIT(3) -#define QCA_HDR_RECV_SOURCE_PORT_MASK GENMASK(2, 0) - -#define QCA_HDR_XMIT_VERSION_MASK GENMASK(15, 14) -#define QCA_HDR_XMIT_VERSION_S 14 -#define QCA_HDR_XMIT_PRIORITY_MASK GENMASK(13, 11) -#define QCA_HDR_XMIT_PRIORITY_S 11 -#define QCA_HDR_XMIT_CONTROL_MASK GENMASK(10, 8) -#define QCA_HDR_XMIT_CONTROL_S 8 +#define QCA_HDR_RECV_SOURCE_PORT GENMASK(2, 0) + +#define QCA_HDR_XMIT_VERSION GENMASK(15, 14) +#define QCA_HDR_XMIT_PRIORITY GENMASK(13, 11) +#define QCA_HDR_XMIT_CONTROL GENMASK(10, 8) #define QCA_HDR_XMIT_FROM_CPU BIT(7) -#define QCA_HDR_XMIT_DP_BIT_MASK GENMASK(6, 0) +#define QCA_HDR_XMIT_DP_BIT GENMASK(6, 0) =20 static struct sk_buff *qca_tag_xmit(struct sk_buff *skb, struct net_device= *dev) { @@ -40,8 +35,9 @@ static struct sk_buff *qca_tag_xmit(struct sk_buff *skb, = struct net_device *dev) phdr =3D dsa_etype_header_pos_tx(skb); =20 /* Set the version field, and set destination port information */ - hdr =3D QCA_HDR_VERSION << QCA_HDR_XMIT_VERSION_S | - QCA_HDR_XMIT_FROM_CPU | BIT(dp->index); + hdr =3D FIELD_PREP(QCA_HDR_XMIT_VERSION, QCA_HDR_VERSION); + hdr |=3D QCA_HDR_XMIT_FROM_CPU; + hdr |=3D FIELD_PREP(QCA_HDR_XMIT_DP_BIT, BIT(dp->index)); =20 *phdr =3D htons(hdr); =20 @@ -62,7 +58,7 @@ static struct sk_buff *qca_tag_rcv(struct sk_buff *skb, s= truct net_device *dev) hdr =3D ntohs(*phdr); =20 /* Make sure the version is correct */ - ver =3D (hdr & QCA_HDR_RECV_VERSION_MASK) >> QCA_HDR_RECV_VERSION_S; + ver =3D FIELD_GET(QCA_HDR_RECV_VERSION, hdr); if (unlikely(ver !=3D QCA_HDR_VERSION)) return NULL; =20 @@ -71,7 +67,7 @@ static struct sk_buff *qca_tag_rcv(struct sk_buff *skb, s= truct net_device *dev) dsa_strip_etype_header(skb, QCA_HDR_LEN); =20 /* Get source port information */ - port =3D (hdr & QCA_HDR_RECV_SOURCE_PORT_MASK); + port =3D FIELD_GET(QCA_HDR_RECV_SOURCE_PORT, hdr); =20 skb->dev =3D dsa_master_find_slave(dev, 0, port); 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:45 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 04/16] net: dsa: tag_qca: move define to include linux/dsa Date: Sun, 23 Jan 2022 02:33:25 +0100 Message-Id: <20220123013337.20945-5-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Move tag_qca define to include dir linux/dsa as the qca8k require access to the tagger define to support in-band mdio read/write using ethernet packet. Signed-off-by: Ansuel Smith --- include/linux/dsa/tag_qca.h | 21 +++++++++++++++++++++ net/dsa/tag_qca.c | 16 +--------------- 2 files changed, 22 insertions(+), 15 deletions(-) create mode 100644 include/linux/dsa/tag_qca.h diff --git a/include/linux/dsa/tag_qca.h b/include/linux/dsa/tag_qca.h new file mode 100644 index 000000000000..c02d2d39ff4a --- /dev/null +++ b/include/linux/dsa/tag_qca.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __TAG_QCA_H +#define __TAG_QCA_H + +#define QCA_HDR_LEN 2 +#define QCA_HDR_VERSION 0x2 + +#define QCA_HDR_RECV_VERSION GENMASK(15, 14) +#define QCA_HDR_RECV_PRIORITY GENMASK(13, 11) +#define QCA_HDR_RECV_TYPE GENMASK(10, 6) +#define QCA_HDR_RECV_FRAME_IS_TAGGED BIT(3) +#define QCA_HDR_RECV_SOURCE_PORT GENMASK(2, 0) + +#define QCA_HDR_XMIT_VERSION GENMASK(15, 14) +#define QCA_HDR_XMIT_PRIORITY GENMASK(13, 11) +#define QCA_HDR_XMIT_CONTROL GENMASK(10, 8) +#define QCA_HDR_XMIT_FROM_CPU BIT(7) +#define QCA_HDR_XMIT_DP_BIT GENMASK(6, 0) + +#endif /* __TAG_QCA_H */ diff --git a/net/dsa/tag_qca.c b/net/dsa/tag_qca.c index 55fa6b96b4eb..34e565e00ece 100644 --- a/net/dsa/tag_qca.c +++ b/net/dsa/tag_qca.c @@ -5,24 +5,10 @@ =20 #include #include +#include =20 #include "dsa_priv.h" =20 -#define QCA_HDR_LEN 2 -#define QCA_HDR_VERSION 0x2 - -#define QCA_HDR_RECV_VERSION GENMASK(15, 14) -#define QCA_HDR_RECV_PRIORITY GENMASK(13, 11) -#define QCA_HDR_RECV_TYPE GENMASK(10, 6) -#define QCA_HDR_RECV_FRAME_IS_TAGGED BIT(3) -#define QCA_HDR_RECV_SOURCE_PORT GENMASK(2, 0) - -#define QCA_HDR_XMIT_VERSION GENMASK(15, 14) -#define QCA_HDR_XMIT_PRIORITY GENMASK(13, 11) -#define QCA_HDR_XMIT_CONTROL GENMASK(10, 8) -#define QCA_HDR_XMIT_FROM_CPU BIT(7) -#define QCA_HDR_XMIT_DP_BIT GENMASK(6, 0) - static struct sk_buff *qca_tag_xmit(struct sk_buff *skb, struct net_device= *dev) { struct dsa_port *dp =3D dsa_slave_to_port(dev); --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAB4FC41535 for ; Sun, 23 Jan 2022 01:34:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235397AbiAWBeA (ORCPT ); Sat, 22 Jan 2022 20:34:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235249AbiAWBds (ORCPT ); Sat, 22 Jan 2022 20:33:48 -0500 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CFAB2C061401; Sat, 22 Jan 2022 17:33:47 -0800 (PST) Received: by mail-ej1-x632.google.com with SMTP id p15so11119455ejc.7; Sat, 22 Jan 2022 17:33:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=72fd0kAQyaswWgj6Iap+xPi/wGkAt4Is96xZtOnT9BM=; b=V0K/qHQB7VcMdwaOmds62Tu3ennndb2mGslxlZrVzHRB+tSm0OX9DeMKrjAOdfd9HU fK4VH+0r2pSJDQDdKjynAYN/TknYh3JSOF+m3G+5ZwcFqXCOckumqpX5od7LIzOK3OpU +OpfNL5lznkTo4kehIBflp6ytrctDGv5hiWlLhaFgPLhK91nDpi4otr/cEJV0jKRyY+6 vBVWx5XGMH/+gKR14FPs4C7qPBLhlnK7TV6o6txrL7SOcR/Ev/kK8AtuASZFMtUw9HwM sGl8r+f3nfVzH7F9ym7524/jbAsdQ+c6XHBZJdKdW+HvKygf3MhipHH5LAjd9P7iddbH rqmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=72fd0kAQyaswWgj6Iap+xPi/wGkAt4Is96xZtOnT9BM=; b=r0EQbwRgTDZVJcNU7eOiRhPg/rAPcJLZLziMPk/r678/9t98nyajGUsQg+hOEqAfDZ HEICE3ogbj7dBACIRAJ+/oyEKFQHZMeR+MQf9uf/4Qac/mPQj8FKM3eCo5YheCU6eDf0 9NzPBHBiWAv/X9Mjc2DkpLCJMPPf0ba7n6eH4BPfcZ/6X8pvFfZSaECF8sNTyfhlWSbM Z6iCmMMnHyrwQ1fQaOrYeMaROGfy+gs8PaGPiof0J/es48ud7Si1+12DmFC6ondTV2Sa QIAAh4AQFkBcHMn/f15ZI9MwWS3GPcBpCNqx0SPTE9PXmteusbWV76P/j0GDGmEwpCMa +Xqw== X-Gm-Message-State: AOAM532macAgEIcfwUkDMAj+8TCWuFu8S/JInuBF+Rf0tnef/9cBerVb pECxrB1dbC/5vjfqY76zzKI= X-Google-Smtp-Source: ABdhPJyLG5nv2fGX1Df4mclJWftpqHr0YovcIEaETikQEWt5/9pcvUvWxt8WPf13pyWo3HqYrh96cw== X-Received: by 2002:a17:907:1c01:: with SMTP id nc1mr8216729ejc.679.1642901626423; Sat, 22 Jan 2022 17:33:46 -0800 (PST) Received: from localhost.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:46 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 05/16] net: dsa: tag_qca: enable promisc_on_master flag Date: Sun, 23 Jan 2022 02:33:26 +0100 Message-Id: <20220123013337.20945-6-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Ethernet MDIO packets are non-standard and DSA master expects the first 6 octets to be the MAC DA. To address these kind of packet, enable promisc_on_master flag for the tagger. Signed-off-by: Ansuel Smith Reviewed-by: Vladimir Oltean --- net/dsa/tag_qca.c | 1 + 1 file changed, 1 insertion(+) diff --git a/net/dsa/tag_qca.c b/net/dsa/tag_qca.c index 34e565e00ece..f8df49d5956f 100644 --- a/net/dsa/tag_qca.c +++ b/net/dsa/tag_qca.c @@ -68,6 +68,7 @@ static const struct dsa_device_ops qca_netdev_ops =3D { .xmit =3D qca_tag_xmit, .rcv =3D qca_tag_rcv, .needed_headroom =3D QCA_HDR_LEN, + .promisc_on_master =3D true, }; =20 MODULE_LICENSE("GPL"); --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3A2FC4167D for ; Sun, 23 Jan 2022 01:34:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235377AbiAWBd6 (ORCPT ); Sat, 22 Jan 2022 20:33:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54610 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235250AbiAWBdt (ORCPT ); Sat, 22 Jan 2022 20:33:49 -0500 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [IPv6:2a00:1450:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7F2BC06173B; Sat, 22 Jan 2022 17:33:48 -0800 (PST) Received: by mail-ej1-x631.google.com with SMTP id jx6so11145843ejb.0; Sat, 22 Jan 2022 17:33:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yEOkwNspPx3lKpy8AeAYGfMOyn3+W//EP56OLlBrqys=; b=X1Uwhken5/yfP2SYg6vFmMqbNZh261wMwVHfqE6t0ix397QZUKRRrOMg378PnvkrzD 6tACmZaoRbDTq9OC8cG6HCNZJUiIC2BWpumCD+EGlmW8urrnvj6IenCfO+wjDpOtcA+6 n9FDdRS6dkYrJaGug+ykmcmSYMBK/ZgSetNnda8KeqjxU5ahZyDYjoRTQNVH/Hre1bkx BrbN6MK8lQOy0KWV/CxWXVyOn2BJrkUXsMsQeIAowcDOuaGjkLKmwO859l0CimQENxRy gvK8gn5FlOVeODmKS3YybI+1MouMo8aIfQrqQ98UWu7zprRwk0cIp32ut9K38r1qEicA W9ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yEOkwNspPx3lKpy8AeAYGfMOyn3+W//EP56OLlBrqys=; b=0DHfGROTJeJ9Qw3hGE5fNYMpmQT/wb/C+hfIE+q4THDd7XkpF7JHOqkwzZbWTKQw8O 1vxyqe+GKx6zqj8SNjCTMsa8NwHCJfsAX3Pjfnr50hCZYBbGn6MD/F46yjXZS6AKCdqw DCIs2Cebgy2iDPM9nik866mIK2iv+mUeNjrchcwt7nxkyBmBa47OPzeSo1x6vJ04ovSE AUjJObJ3Q3S5DGODgjmPNy0jou59yLfRzsB8FjhyQQBPJMATdW1g7sYE82X5xlC8SJNp EV3NteKJHaqtqHl2TK+G+akpYSMf0bKfl8tnZYvUEZUBUs7qbCtLa3q5VkjdEahX4I8S AvEQ== X-Gm-Message-State: AOAM532/hlQ4gbO2PTGYKrgLWAZ4ne0x9CjHodCF1vSfJTDabHf3lqz7 KZ4qWCncMFhMwmED/fw7xAk= X-Google-Smtp-Source: ABdhPJwNJDy/0vTw1jho44XtoiMub7wQwLq9wyohKkBRDfNaFkuz8YMkQ05D15kTVIc8m/A9HxWzYg== X-Received: by 2002:a17:907:7253:: with SMTP id ds19mr8285854ejc.26.1642901627337; Sat, 22 Jan 2022 17:33:47 -0800 (PST) Received: from localhost.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:47 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 06/16] net: dsa: tag_qca: add define for handling mgmt Ethernet packet Date: Sun, 23 Jan 2022 02:33:27 +0100 Message-Id: <20220123013337.20945-7-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add all the required define to prepare support for mgmt read/write in Ethernet packet. Any packet of this type has to be dropped as the only use of these special packet is receive ack for an mgmt write request or receive data for an mgmt read request. A struct is used that emulates the Ethernet header but is used for a different purpose. Signed-off-by: Ansuel Smith --- include/linux/dsa/tag_qca.h | 44 +++++++++++++++++++++++++++++++++++++ net/dsa/tag_qca.c | 13 ++++++++--- 2 files changed, 54 insertions(+), 3 deletions(-) diff --git a/include/linux/dsa/tag_qca.h b/include/linux/dsa/tag_qca.h index c02d2d39ff4a..1a02f695f3a3 100644 --- a/include/linux/dsa/tag_qca.h +++ b/include/linux/dsa/tag_qca.h @@ -12,10 +12,54 @@ #define QCA_HDR_RECV_FRAME_IS_TAGGED BIT(3) #define QCA_HDR_RECV_SOURCE_PORT GENMASK(2, 0) =20 +/* Packet type for recv */ +#define QCA_HDR_RECV_TYPE_NORMAL 0x0 +#define QCA_HDR_RECV_TYPE_MIB 0x1 +#define QCA_HDR_RECV_TYPE_RW_REG_ACK 0x2 + #define QCA_HDR_XMIT_VERSION GENMASK(15, 14) #define QCA_HDR_XMIT_PRIORITY GENMASK(13, 11) #define QCA_HDR_XMIT_CONTROL GENMASK(10, 8) #define QCA_HDR_XMIT_FROM_CPU BIT(7) #define QCA_HDR_XMIT_DP_BIT GENMASK(6, 0) =20 +/* Packet type for xmit */ +#define QCA_HDR_XMIT_TYPE_NORMAL 0x0 +#define QCA_HDR_XMIT_TYPE_RW_REG 0x1 + +/* Check code for a valid mgmt packet. Switch will ignore the packet + * with this wrong. + */ +#define QCA_HDR_MGMT_CHECK_CODE_VAL 0x5 + +/* Specific define for in-band MDIO read/write with Ethernet packet */ +#define QCA_HDR_MGMT_SEQ_LEN 4 /* 4 byte for the seq */ +#define QCA_HDR_MGMT_COMMAND_LEN 4 /* 4 byte for the command */ +#define QCA_HDR_MGMT_DATA1_LEN 4 /* First 4 byte for the mdio data */ +#define QCA_HDR_MGMT_HEADER_LEN (QCA_HDR_MGMT_SEQ_LEN + \ + QCA_HDR_MGMT_COMMAND_LEN + \ + QCA_HDR_MGMT_DATA1_LEN) + +#define QCA_HDR_MGMT_DATA2_LEN 12 /* Other 12 byte for the mdio data */ +#define QCA_HDR_MGMT_PADDING_LEN 34 /* Padding to reach the min Ethernet p= acket */ + +#define QCA_HDR_MGMT_PKG_LEN (QCA_HDR_MGMT_HEADER_LEN + \ + QCA_HDR_LEN + \ + QCA_HDR_MGMT_DATA2_LEN + \ + QCA_HDR_MGMT_PADDING_LEN) + +#define QCA_HDR_MGMT_SEQ_NUM GENMASK(31, 0) /* 63, 32 */ +#define QCA_HDR_MGMT_CHECK_CODE GENMASK(31, 29) /* 31, 29 */ +#define QCA_HDR_MGMT_CMD BIT(28) /* 28 */ +#define QCA_HDR_MGMT_LENGTH GENMASK(23, 20) /* 23, 20 */ +#define QCA_HDR_MGMT_ADDR GENMASK(18, 0) /* 18, 0 */ + +/* Special struct emulating a Ethernet header */ +struct mgmt_ethhdr { + u32 command; /* command bit 31:0 */ + u32 seq; /* seq 63:32 */ + u32 mdio_data; /* first 4byte mdio */ + __be16 hdr; /* qca hdr */ +} __packed; + #endif /* __TAG_QCA_H */ diff --git a/net/dsa/tag_qca.c b/net/dsa/tag_qca.c index f8df49d5956f..c57d6e1a0c0c 100644 --- a/net/dsa/tag_qca.c +++ b/net/dsa/tag_qca.c @@ -32,10 +32,10 @@ static struct sk_buff *qca_tag_xmit(struct sk_buff *skb= , struct net_device *dev) =20 static struct sk_buff *qca_tag_rcv(struct sk_buff *skb, struct net_device = *dev) { - u8 ver; - u16 hdr; - int port; + u16 hdr, pk_type; __be16 *phdr; + int port; + u8 ver; =20 if (unlikely(!pskb_may_pull(skb, QCA_HDR_LEN))) return NULL; @@ -48,6 +48,13 @@ static struct sk_buff *qca_tag_rcv(struct sk_buff *skb, = struct net_device *dev) if (unlikely(ver !=3D QCA_HDR_VERSION)) return NULL; =20 + /* Get pk type */ + pk_type =3D FIELD_GET(QCA_HDR_RECV_TYPE, hdr); + + /* Ethernet MDIO read/write packet */ + if (pk_type =3D=3D QCA_HDR_RECV_TYPE_RW_REG_ACK) + return NULL; + /* Remove QCA tag and recalculate checksum */ skb_pull_rcsum(skb, QCA_HDR_LEN); dsa_strip_etype_header(skb, QCA_HDR_LEN); --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E505C433F5 for ; Sun, 23 Jan 2022 01:34:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235682AbiAWBeY (ORCPT ); Sat, 22 Jan 2022 20:34:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235171AbiAWBdu (ORCPT ); Sat, 22 Jan 2022 20:33:50 -0500 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [IPv6:2a00:1450:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B58ABC06173B; Sat, 22 Jan 2022 17:33:49 -0800 (PST) Received: by mail-ej1-x62b.google.com with SMTP id o12so11117200eju.13; Sat, 22 Jan 2022 17:33:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rBREyuz+JJaVFiyJ9awvOej1C4zUf8tMKpoECjsnacs=; b=FgszAdl5Gn3/Z8D0Nr8rV9jcKuJgEA02NSMc3SDElelRU43VZYTjzl0AZIhMZ7B2zb qtrcN+ATJD14q/yG7ihcCA0n3z6J7haNUEYp/LE9Shbvc4KmYOkAVBXnT2XWi8NT/bci yWY+4+kv+AB9FPH1SEaKBJckOKsc79tE+8JG6So/g26wSsOhTwShtyllINWfpYeLLoeZ CQ/xbNmlr8Q+gADH3b++5ETZSAj4jXpo1N6/gl3T1y4prESJ/Tcia+SigkdH7dxUhBKk U0ZIkBDwYWJeFb1mj0XCyP5BnxhbItY67J78+k09EzSxmug6ffTegC7GIuq9NIC4zuo2 k7hg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rBREyuz+JJaVFiyJ9awvOej1C4zUf8tMKpoECjsnacs=; b=OBe57Z/nWiAeIpLKKBFTIZaenI+GTiIRZSMu6tF6+khYk7IK6lVNcNzc5tcL59d64g UkgEzPdtVwvsEXxtc76SfrRCNvXBliBdvbHpmetQ0J5rm4QICdTee+jNguvZxOFxHZYt taQowVlok7Opnz0IaJ1k8JqMfHmQ1+CCImYsCp/iMXLR0UcykcjuAPjC+bDt369l4UW/ 5BqjOZMXo3yXIG5IJn+38Icx7VMfJgoSdNLaTxYKNWltPEKbft5xWGMccjrZYK7uWWyH 2vCYuIa3OAkilOq0e59ljaUurYda6zvFlRqx7UNL+ZynQrZQZAHUIGsSI8RJPHHKLgHs KV/w== X-Gm-Message-State: AOAM530XKRczhFrHaTqF/IxDsubcLHcbv0S2ms5P1EkBasRrh6dSSzQA 28pro80jtQi+TegGPt6aPJ47cbq5jKc= X-Google-Smtp-Source: ABdhPJwqp9YpXAAwJ+kpRu8NbD7mdFUwvHwiwWF5tbAUG+vl//B5AqnSvsDzmzm8ckds9DWW3gVIIQ== X-Received: by 2002:a17:907:728c:: with SMTP id dt12mr8560897ejc.188.1642901628280; Sat, 22 Jan 2022 17:33:48 -0800 (PST) Received: from localhost.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:47 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 07/16] net: dsa: tag_qca: add define for handling MIB packet Date: Sun, 23 Jan 2022 02:33:28 +0100 Message-Id: <20220123013337.20945-8-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add struct to correctly parse a mib Ethernet packet. Signed-off-by: Ansuel Smith --- include/linux/dsa/tag_qca.h | 10 ++++++++++ net/dsa/tag_qca.c | 4 ++++ 2 files changed, 14 insertions(+) diff --git a/include/linux/dsa/tag_qca.h b/include/linux/dsa/tag_qca.h index 1a02f695f3a3..87dd84e31304 100644 --- a/include/linux/dsa/tag_qca.h +++ b/include/linux/dsa/tag_qca.h @@ -62,4 +62,14 @@ struct mgmt_ethhdr { __be16 hdr; /* qca hdr */ } __packed; =20 +enum mdio_cmd { + MDIO_WRITE =3D 0x0, + MDIO_READ +}; + +struct mib_ethhdr { + u32 data[3]; /* first 3 mib counter */ + __be16 hdr; /* qca hdr */ +} __packed; + #endif /* __TAG_QCA_H */ diff --git a/net/dsa/tag_qca.c b/net/dsa/tag_qca.c index c57d6e1a0c0c..fdaa1b322d25 100644 --- a/net/dsa/tag_qca.c +++ b/net/dsa/tag_qca.c @@ -55,6 +55,10 @@ static struct sk_buff *qca_tag_rcv(struct sk_buff *skb, = struct net_device *dev) if (pk_type =3D=3D QCA_HDR_RECV_TYPE_RW_REG_ACK) return NULL; =20 + /* Ethernet MIB counter packet */ + if (pk_type =3D=3D QCA_HDR_RECV_TYPE_MIB) + return NULL; + /* Remove QCA tag and recalculate checksum */ skb_pull_rcsum(skb, QCA_HDR_LEN); dsa_strip_etype_header(skb, QCA_HDR_LEN); --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6F18C433EF for ; Sun, 23 Jan 2022 01:34:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235731AbiAWBe0 (ORCPT ); Sat, 22 Jan 2022 20:34:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54622 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235257AbiAWBdv (ORCPT ); Sat, 22 Jan 2022 20:33:51 -0500 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB5B2C06173D; Sat, 22 Jan 2022 17:33:50 -0800 (PST) Received: by mail-ed1-x533.google.com with SMTP id n10so34096307edv.2; Sat, 22 Jan 2022 17:33:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sUMQ26SOZFXbGQ1PvNTKW9M6A2FFSbKtZQwAN70Zl7c=; b=P9flqfS+AdxVPX3/1uoqzd9wrRvXcN+1sUzMlvmfPevTI1rij7eWSUAA2p1CZ6WvFu sLjZPly/siGzg5L2+5VsKfpTCUjWSk27WJe3ZRB3YDHe6ZhwbqVuNRmiii0ex5E/yJTb 45R0t4S/BfaggWaCsJ/HAFFwPTHkdbs7B8+38yPSCgnEfyUQw0gWNQqbGImU2VpDpEg9 kkLGCxTRyY3GlQbp1V9qxv6c0pd5Hnv6hGC6L7mYdop7PIdojJTTj7OePbg0wZ/RYqrJ p/6vg7V+iGtCB1PcCuievJv2EN8iTLwV5xR8NzbY4xphV5KgANnnWfNk3Fi6Sxe3HlVO fslw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sUMQ26SOZFXbGQ1PvNTKW9M6A2FFSbKtZQwAN70Zl7c=; b=ak5ut71EapSBITrmQuJmKEctxpD58p9VL9A/2FlIAlTv1FRCyUp/bu3vg/GGzDkYUM ZdPvWwHT9k+luUSqA1YvAM41h7Id3+gmhtfdNb7wLva4JkeL4GsHltKLWuiO5lEJvDKS e/kp7c4YIGaZRxer3lCwHNk991ehbiEwM18THAzDlbkT22Lw9AtBvr6ybURXIaiJqFwy 0c5zy5NFnIIus3/yDDMWHjDsoUwJX6CZepdkY0G0zTJ2UJCa6t0XxIUSoBMe7tu8AJgM ZnCD7iTB50Ur5Y0f4OqQFnryVbPR6t8PXX7/03vC8DNAN3A12akxyeWWYmjCpFF9q2PB zknw== X-Gm-Message-State: AOAM5322Z/BpNuEiKROp/cbaiKty38g1KhFHx4sXn/Ior21owzci/qDe mqSEkq+PLyySDjr6wSgKjyk= X-Google-Smtp-Source: ABdhPJzIBGa6LiYbM2xydu+Ut20hm9LDWeNFguW+bFEgV5wzyHFsNhjlU+N6NecRcfELbLdz3ZDYMw== X-Received: by 2002:aa7:dc17:: with SMTP id b23mr10275773edu.402.1642901629258; Sat, 22 Jan 2022 17:33:49 -0800 (PST) Received: from localhost.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:48 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 08/16] net: dsa: tag_qca: add support for handling mgmt and MIB Ethernet packet Date: Sun, 23 Jan 2022 02:33:29 +0100 Message-Id: <20220123013337.20945-9-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add connect/disconnect helper to assign private struct to the dsa switch. Add support for Ethernet mgm and MIB if the dsa driver provide an handler to correctly parse and elaborate the data. Signed-off-by: Ansuel Smith --- include/linux/dsa/tag_qca.h | 7 +++++++ net/dsa/tag_qca.c | 39 ++++++++++++++++++++++++++++++++++--- 2 files changed, 43 insertions(+), 3 deletions(-) diff --git a/include/linux/dsa/tag_qca.h b/include/linux/dsa/tag_qca.h index 87dd84e31304..de5a45f5b398 100644 --- a/include/linux/dsa/tag_qca.h +++ b/include/linux/dsa/tag_qca.h @@ -72,4 +72,11 @@ struct mib_ethhdr { __be16 hdr; /* qca hdr */ } __packed; =20 +struct qca_tagger_data { + void (*rw_reg_ack_handler)(struct dsa_switch *ds, + struct sk_buff *skb); + void (*mib_autocast_handler)(struct dsa_switch *ds, + struct sk_buff *skb); +}; + #endif /* __TAG_QCA_H */ diff --git a/net/dsa/tag_qca.c b/net/dsa/tag_qca.c index fdaa1b322d25..dc81c72133eb 100644 --- a/net/dsa/tag_qca.c +++ b/net/dsa/tag_qca.c @@ -5,6 +5,7 @@ =20 #include #include +#include #include =20 #include "dsa_priv.h" @@ -32,11 +33,16 @@ static struct sk_buff *qca_tag_xmit(struct sk_buff *skb= , struct net_device *dev) =20 static struct sk_buff *qca_tag_rcv(struct sk_buff *skb, struct net_device = *dev) { + struct qca_tagger_data *tagger_data; + struct dsa_port *dp =3D dev->dsa_ptr; + struct dsa_switch *ds =3D dp->ds; u16 hdr, pk_type; __be16 *phdr; int port; u8 ver; =20 + tagger_data =3D ds->tagger_data; + if (unlikely(!pskb_may_pull(skb, QCA_HDR_LEN))) return NULL; =20 @@ -51,13 +57,19 @@ static struct sk_buff *qca_tag_rcv(struct sk_buff *skb,= struct net_device *dev) /* Get pk type */ pk_type =3D FIELD_GET(QCA_HDR_RECV_TYPE, hdr); =20 - /* Ethernet MDIO read/write packet */ - if (pk_type =3D=3D QCA_HDR_RECV_TYPE_RW_REG_ACK) + /* Ethernet mgmt read/write packet */ + if (pk_type =3D=3D QCA_HDR_RECV_TYPE_RW_REG_ACK) { + if (tagger_data->rw_reg_ack_handler) + tagger_data->rw_reg_ack_handler(ds, skb); return NULL; + } =20 /* Ethernet MIB counter packet */ - if (pk_type =3D=3D QCA_HDR_RECV_TYPE_MIB) + if (pk_type =3D=3D QCA_HDR_RECV_TYPE_MIB) { + if (tagger_data->mib_autocast_handler) + tagger_data->mib_autocast_handler(ds, skb); return NULL; + } =20 /* Remove QCA tag and recalculate checksum */ skb_pull_rcsum(skb, QCA_HDR_LEN); @@ -73,9 +85,30 @@ static struct sk_buff *qca_tag_rcv(struct sk_buff *skb, = struct net_device *dev) return skb; } =20 +static int qca_tag_connect(struct dsa_switch *ds) +{ + struct qca_tagger_data *tagger_data; + + tagger_data =3D kzalloc(sizeof(*tagger_data), GFP_KERNEL); + if (!tagger_data) + return -ENOMEM; + + ds->tagger_data =3D tagger_data; + + return 0; +} + +static void qca_tag_disconnect(struct dsa_switch *ds) +{ + kfree(ds->tagger_data); + ds->tagger_data =3D NULL; +} + static const struct dsa_device_ops qca_netdev_ops =3D { .name =3D "qca", .proto =3D DSA_TAG_PROTO_QCA, + .connect =3D qca_tag_connect, + .disconnect =3D qca_tag_disconnect, .xmit =3D qca_tag_xmit, .rcv =3D qca_tag_rcv, .needed_headroom =3D QCA_HDR_LEN, --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8CC9C433F5 for ; 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:49 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 09/16] net: dsa: qca8k: add tracking state of master port Date: Sun, 23 Jan 2022 02:33:30 +0100 Message-Id: <20220123013337.20945-10-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" MDIO/MIB Ethernet require the master port and the tagger availabale to correctly work. Use the new api master_state_change to track when master is operational or not and set a bool in qca8k_priv. We cache the first cached master available and we check if other cpu port are operational when the cached one goes down. This cached master will later be used by mdio read/write and mib request to correctly use the working function. qca8k implementation for MDIO/MIB Ethernet is bad. CPU port0 is the only one that answers with the ack packet or sends MIB Ethernet packets. For this reason the master_state_change ignore CPU port6 and checkes only CPU port0 if it's operational and enables this mode. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 18 ++++++++++++++++++ drivers/net/dsa/qca8k.h | 1 + 2 files changed, 19 insertions(+) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 039694518788..4bc5064414b5 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -2383,6 +2383,23 @@ qca8k_port_lag_leave(struct dsa_switch *ds, int port, return qca8k_lag_refresh_portmap(ds, port, lag, true); } =20 +static void +qca8k_master_change(struct dsa_switch *ds, const struct net_device *master, + bool operational) +{ + struct dsa_port *dp =3D master->dsa_ptr; + struct qca8k_priv *priv =3D ds->priv; + + /* Ethernet MIB/MDIO is only supported for CPU port 0 */ + if (dp->index !=3D 0) + return; + + if (operational) + priv->mgmt_master =3D master; + else + priv->mgmt_master =3D NULL; +} + static const struct dsa_switch_ops qca8k_switch_ops =3D { .get_tag_protocol =3D qca8k_get_tag_protocol, .setup =3D qca8k_setup, @@ -2418,6 +2435,7 @@ static const struct dsa_switch_ops qca8k_switch_ops = =3D { .get_phy_flags =3D qca8k_get_phy_flags, .port_lag_join =3D qca8k_port_lag_join, .port_lag_leave =3D qca8k_port_lag_leave, + .master_state_change =3D qca8k_master_change, }; =20 static int qca8k_read_switch_id(struct qca8k_priv *priv) diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index ab4a417b25a9..9437369c60ca 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -353,6 +353,7 @@ struct qca8k_priv { struct dsa_switch_ops ops; struct gpio_desc *reset_gpio; unsigned int port_mtu[QCA8K_NUM_PORTS]; + const struct net_device *mgmt_master; /* Track if mdio/mib Ethernet is av= ailable */ }; =20 struct qca8k_mib_desc { --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 843B4C4167D for ; Sun, 23 Jan 2022 01:34:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235581AbiAWBeN (ORCPT ); Sat, 22 Jan 2022 20:34:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235297AbiAWBdx (ORCPT ); Sat, 22 Jan 2022 20:33:53 -0500 Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [IPv6:2a00:1450:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9507C061744; Sat, 22 Jan 2022 17:33:52 -0800 (PST) Received: by mail-ej1-x633.google.com with SMTP id k25so11064970ejp.5; Sat, 22 Jan 2022 17:33:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZD7QyBub+AdOkmoqQa9t2qAl185yUI0pq6mcW4891Yo=; b=WcIoxRfiFXzQtFH48sK+4B/y8Fh6nwk/cAfbbEFZ4eOAjmytsZ5KRcb4+OUUf+unGA hYCBwZuWFNWqc13mz+C8UYGqxJxO4iljQA7n87OYODAFSr7SPW//0Buu0RkebLjbWBaR c9PQLUu8soxxHJomF2GzygZ7FYIqJbvbCy7ge2CKRZGTyqv/6UjXRW2XwctJP7bmS+jg YMHTm1mMFNXuaM0mLFgd4VKaUKxbJn2BuRKhsMz/CuPazzToOv1ON+OKOAVTST1KnZlf dWkpjO4A9F3nxT5r2YXoVM76WGVGuN2KlNiHtVfn6JQY3VPF+W7uc+gMgC8XCwj0prbz XQ0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZD7QyBub+AdOkmoqQa9t2qAl185yUI0pq6mcW4891Yo=; b=yhA5pATbWOnK/5TxbcWPe5PSWIUXHLisqa75m213ilYt4gUnqYVmtBHi/yYHL4V0Tx ZVHg/7OhvILvHcA7IuATgzbo4FZzREpVvAqm+tt0lGbUIm4FZpklF23si4JBRuTdMDQV NjdwXGwMDBC2E/EgHxriCt3gPLidpKpzstINZt/kyUUMNYpA5TS55Zil8ABRoN/HAGQ9 KstWRq6ND7ZRM6oPiD+Q5Z4jjiqacskfahNymZVcIo1J4vtW/NhfHLWV+gMvag6vpOcQ kXPzFwJzPQgHPMm6ou6du544MPpmPmJ/C58GaZ24ADfawyLxCBFnhET5wK17/fRn+tTl zLVQ== X-Gm-Message-State: AOAM533SG6gkhYeNJ08kWFAN5b72thWDHYdCiSXZyI2dOV4RpNrLDtBx 1oHekqPTVddSEcIUC2mr9n8= X-Google-Smtp-Source: ABdhPJxuYF87dX9NG5MlSSElgxpw2Lq6G1UztDFjTuuUyxQ0Y0W/1I7a+wAj2YWTXrUgXgKWlrX6AQ== X-Received: by 2002:a17:907:1c12:: with SMTP id nc18mr882965ejc.47.1642901631211; Sat, 22 Jan 2022 17:33:51 -0800 (PST) Received: from localhost.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:50 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 10/16] net: dsa: qca8k: add support for mgmt read/write in Ethernet packet Date: Sun, 23 Jan 2022 02:33:31 +0100 Message-Id: <20220123013337.20945-11-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add qca8k side support for mgmt read/write in Ethernet packet. qca8k supports some specially crafted Ethernet packet that can be used for mgmt read/write instead of the legacy method uart/internal mdio. This add support for the qca8k side to craft the packet and enqueue it. Each port and the qca8k_priv have a special struct to put data in it. The completion API is used to wait for the packet to be received back with the requested data. The various steps are: 1. Craft the special packet with the qca hdr set to mgmt read/write mode. 2. Set the lock in the dedicated mgmt struct. 3. Reinit the completion. 4. Enqueue the packet. 5. Wait the packet to be received. 6. Use the data set by the tagger to complete the mdio operation. If the completion timeouts or the ack value is not true, the legacy mdio way is used. It has to be considered that in the initial setup mdio is still used and mdio is still used until DSA is ready to accept and tag packet. tag_proto_connect() is used to fill the required handler for the tagger to correctly parse and elaborate the special Ethernet mdio packet. Locking is added to qca8k_master_change() to make sure no mgmt Ethernet are in progress. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 206 ++++++++++++++++++++++++++++++++++++++++ drivers/net/dsa/qca8k.h | 13 +++ 2 files changed, 219 insertions(+) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 4bc5064414b5..35711d010eb4 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -20,6 +20,7 @@ #include #include #include +#include =20 #include "qca8k.h" =20 @@ -170,6 +171,174 @@ qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask,= u32 write_val) return regmap_update_bits(priv->regmap, reg, mask, write_val); } =20 +static void qca8k_rw_reg_ack_handler(struct dsa_switch *ds, struct sk_buff= *skb) +{ + struct qca8k_mgmt_hdr_data *mgmt_hdr_data; + struct qca8k_priv *priv =3D ds->priv; + struct mgmt_ethhdr *mgmt_ethhdr; + u8 len, cmd; + + mgmt_ethhdr =3D (struct mgmt_ethhdr *)skb_mac_header(skb); + mgmt_hdr_data =3D &priv->mgmt_hdr_data; + + cmd =3D FIELD_GET(QCA_HDR_MGMT_CMD, mgmt_ethhdr->command); + len =3D FIELD_GET(QCA_HDR_MGMT_LENGTH, mgmt_ethhdr->command); + + /* Make sure the seq match the requested packet */ + if (mgmt_ethhdr->seq =3D=3D mgmt_hdr_data->seq) + mgmt_hdr_data->ack =3D true; + + if (cmd =3D=3D MDIO_READ) { + mgmt_hdr_data->data[0] =3D mgmt_ethhdr->mdio_data; + + /* Get the rest of the 12 byte of data */ + if (len > QCA_HDR_MGMT_DATA1_LEN) + memcpy(mgmt_hdr_data->data + 1, skb->data, + QCA_HDR_MGMT_DATA2_LEN); + } + + complete(&mgmt_hdr_data->rw_done); +} + +static struct sk_buff *qca8k_alloc_mdio_header(enum mdio_cmd cmd, u32 reg,= u32 *val, + int seq_num, int priority) +{ + struct mgmt_ethhdr *mgmt_ethhdr; + struct sk_buff *skb; + u16 hdr; + + skb =3D dev_alloc_skb(QCA_HDR_MGMT_PKG_LEN); + if (!skb) + return NULL; + + skb_reset_mac_header(skb); + skb_set_network_header(skb, skb->len); + + mgmt_ethhdr =3D skb_push(skb, QCA_HDR_MGMT_HEADER_LEN + QCA_HDR_LEN); + + hdr =3D FIELD_PREP(QCA_HDR_XMIT_VERSION, QCA_HDR_VERSION); + hdr |=3D FIELD_PREP(QCA_HDR_XMIT_PRIORITY, priority); + hdr |=3D QCA_HDR_XMIT_FROM_CPU; + hdr |=3D FIELD_PREP(QCA_HDR_XMIT_DP_BIT, BIT(0)); + hdr |=3D FIELD_PREP(QCA_HDR_XMIT_CONTROL, QCA_HDR_XMIT_TYPE_RW_REG); + + mgmt_ethhdr->seq =3D FIELD_PREP(QCA_HDR_MGMT_SEQ_NUM, seq_num); + + mgmt_ethhdr->command =3D FIELD_PREP(QCA_HDR_MGMT_ADDR, reg); + mgmt_ethhdr->command |=3D FIELD_PREP(QCA_HDR_MGMT_LENGTH, 4); + mgmt_ethhdr->command |=3D FIELD_PREP(QCA_HDR_MGMT_CMD, cmd); + mgmt_ethhdr->command |=3D FIELD_PREP(QCA_HDR_MGMT_CHECK_CODE, + QCA_HDR_MGMT_CHECK_CODE_VAL); + + if (cmd =3D=3D MDIO_WRITE) + mgmt_ethhdr->mdio_data =3D *val; + + mgmt_ethhdr->hdr =3D htons(hdr); + + skb_put_zero(skb, QCA_HDR_MGMT_DATA2_LEN + QCA_HDR_MGMT_PADDING_LEN); + + return skb; +} + +static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val) +{ + struct qca8k_mgmt_hdr_data *mgmt_hdr_data =3D &priv->mgmt_hdr_data; + struct sk_buff *skb; + bool ack; + int ret; + + skb =3D qca8k_alloc_mdio_header(MDIO_READ, reg, NULL, 200, QCA8K_ETHERNET= _MDIO_PRIORITY); + if (!skb) + return -ENOMEM; + + mutex_lock(&mgmt_hdr_data->mutex); + + /* Recheck mgmt_master under lock to make sure it's operational */ + if (!priv->mgmt_master) + return -EINVAL; + + skb->dev =3D (struct net_device *)priv->mgmt_master; + + reinit_completion(&mgmt_hdr_data->rw_done); + mgmt_hdr_data->seq =3D 200; + mgmt_hdr_data->ack =3D false; + + dev_queue_xmit(skb); + + ret =3D wait_for_completion_timeout(&mgmt_hdr_data->rw_done, + msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); + + *val =3D mgmt_hdr_data->data[0]; + ack =3D mgmt_hdr_data->ack; + + mutex_unlock(&mgmt_hdr_data->mutex); + + if (ret <=3D 0) + return -ETIMEDOUT; + + if (!ack) + return -EINVAL; + + return 0; +} + +static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 val) +{ + struct qca8k_mgmt_hdr_data *mgmt_hdr_data =3D &priv->mgmt_hdr_data; + struct sk_buff *skb; + bool ack; + int ret; + + skb =3D qca8k_alloc_mdio_header(MDIO_WRITE, reg, &val, 200, QCA8K_ETHERNE= T_MDIO_PRIORITY); + if (!skb) + return -ENOMEM; + + mutex_lock(&mgmt_hdr_data->mutex); + + /* Recheck mgmt_master under lock to make sure it's operational */ + if (!priv->mgmt_master) + return -EINVAL; + + skb->dev =3D (struct net_device *)priv->mgmt_master; + + reinit_completion(&mgmt_hdr_data->rw_done); + mgmt_hdr_data->ack =3D false; + mgmt_hdr_data->seq =3D 200; + + dev_queue_xmit(skb); + + ret =3D wait_for_completion_timeout(&mgmt_hdr_data->rw_done, + msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); + + ack =3D mgmt_hdr_data->ack; + + mutex_unlock(&mgmt_hdr_data->mutex); + + if (ret <=3D 0) + return -ETIMEDOUT; + + if (!ack) + return -EINVAL; + + return 0; +} + +static int +qca8k_regmap_update_bits_eth(struct qca8k_priv *priv, u32 reg, u32 mask, u= 32 write_val) +{ + u32 val =3D 0; + int ret; + + ret =3D qca8k_read_eth(priv, reg, &val); + if (ret) + return ret; + + val &=3D ~mask; + val |=3D write_val; + + return qca8k_write_eth(priv, reg, val); +} + static int qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val) { @@ -178,6 +347,9 @@ qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *va= l) u16 r1, r2, page; int ret; =20 + if (priv->mgmt_master && !qca8k_read_eth(priv, reg, val)) + return 0; + qca8k_split_addr(reg, &r1, &r2, &page); =20 mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); @@ -201,6 +373,9 @@ qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t va= l) u16 r1, r2, page; int ret; =20 + if (priv->mgmt_master && !qca8k_write_eth(priv, reg, val)) + return 0; + qca8k_split_addr(reg, &r1, &r2, &page); =20 mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); @@ -225,6 +400,10 @@ qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint= 32_t mask, uint32_t write_ u32 val; int ret; =20 + if (priv->mgmt_master && + !qca8k_regmap_update_bits_eth(priv, reg, mask, write_val)) + return 0; + qca8k_split_addr(reg, &r1, &r2, &page); =20 mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); @@ -2394,10 +2573,33 @@ qca8k_master_change(struct dsa_switch *ds, const st= ruct net_device *master, if (dp->index !=3D 0) return; =20 + mutex_lock(&priv->mgmt_hdr_data.mutex); + if (operational) priv->mgmt_master =3D master; else priv->mgmt_master =3D NULL; + + mutex_unlock(&priv->mgmt_hdr_data.mutex); +} + +static int qca8k_connect_tag_protocol(struct dsa_switch *ds, + enum dsa_tag_protocol proto) +{ + struct qca_tagger_data *tagger_data; + + switch (proto) { + case DSA_TAG_PROTO_QCA: + tagger_data =3D ds->tagger_data; + + tagger_data->rw_reg_ack_handler =3D qca8k_rw_reg_ack_handler; + + break; + default: + return -EOPNOTSUPP; + } + + return 0; } =20 static const struct dsa_switch_ops qca8k_switch_ops =3D { @@ -2436,6 +2638,7 @@ static const struct dsa_switch_ops qca8k_switch_ops = =3D { .port_lag_join =3D qca8k_port_lag_join, .port_lag_leave =3D qca8k_port_lag_leave, .master_state_change =3D qca8k_master_change, + .connect_tag_protocol =3D qca8k_connect_tag_protocol, }; =20 static int qca8k_read_switch_id(struct qca8k_priv *priv) @@ -2515,6 +2718,9 @@ qca8k_sw_probe(struct mdio_device *mdiodev) if (!priv->ds) return -ENOMEM; =20 + mutex_init(&priv->mgmt_hdr_data.mutex); + init_completion(&priv->mgmt_hdr_data.rw_done); + priv->ds->dev =3D &mdiodev->dev; priv->ds->num_ports =3D QCA8K_NUM_PORTS; priv->ds->priv =3D priv; diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index 9437369c60ca..a358a67044d3 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -11,6 +11,10 @@ #include #include #include +#include + +#define QCA8K_ETHERNET_MDIO_PRIORITY 7 +#define QCA8K_ETHERNET_TIMEOUT 100 =20 #define QCA8K_NUM_PORTS 7 #define QCA8K_NUM_CPU_PORTS 2 @@ -328,6 +332,14 @@ enum { QCA8K_CPU_PORT6, }; =20 +struct qca8k_mgmt_hdr_data { + struct completion rw_done; + struct mutex mutex; /* Enforce one mdio read/write at time */ + bool ack; + u32 seq; + u32 data[4]; +}; + struct qca8k_ports_config { bool sgmii_rx_clk_falling_edge; bool sgmii_tx_clk_falling_edge; @@ -354,6 +366,7 @@ struct qca8k_priv { struct gpio_desc *reset_gpio; unsigned int port_mtu[QCA8K_NUM_PORTS]; const struct net_device *mgmt_master; /* Track if mdio/mib Ethernet is av= ailable */ + struct qca8k_mgmt_hdr_data mgmt_hdr_data; }; =20 struct qca8k_mib_desc { --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19070C4332F for ; Sun, 23 Jan 2022 01:34:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235491AbiAWBeI (ORCPT ); Sat, 22 Jan 2022 20:34:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54640 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235331AbiAWBdz (ORCPT ); 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:51 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 11/16] net: dsa: qca8k: add support for mib autocast in Ethernet packet Date: Sun, 23 Jan 2022 02:33:32 +0100 Message-Id: <20220123013337.20945-12-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The switch can autocast MIB counter using Ethernet packet. Add support for this and provide a handler for the tagger. The switch will send packet with MIB counter for each port, the switch will use completion API to wait for the correct packet to be received and will complete the task only when each packet is received. Although the handler will drop all the other packet, we still have to consume each MIB packet to complete the request. This is done to prevent mixed data with concurrent ethtool request. connect_tag_protocol() is used to add the handler to the tag_qca tagger, master_state_change() use the MIB lock to make sure no MIB Ethernet is in progress. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 108 +++++++++++++++++++++++++++++++++++++++- drivers/net/dsa/qca8k.h | 17 ++++++- 2 files changed, 122 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 35711d010eb4..f51a6d8993ff 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -811,7 +811,10 @@ qca8k_mib_init(struct qca8k_priv *priv) int ret; =20 mutex_lock(&priv->reg_mutex); - ret =3D regmap_set_bits(priv->regmap, QCA8K_REG_MIB, QCA8K_MIB_FLUSH | QC= A8K_MIB_BUSY); + ret =3D regmap_update_bits(priv->regmap, QCA8K_REG_MIB, + QCA8K_MIB_FUNC | QCA8K_MIB_BUSY, + FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_FLUSH) | + QCA8K_MIB_BUSY); if (ret) goto exit; =20 @@ -1882,6 +1885,97 @@ qca8k_get_strings(struct dsa_switch *ds, int port, u= 32 stringset, uint8_t *data) ETH_GSTRING_LEN); } =20 +static void qca8k_mib_autocast_handler(struct dsa_switch *ds, struct sk_bu= ff *skb) +{ + const struct qca8k_match_data *match_data; + struct qca8k_mib_hdr_data *mib_hdr_data; + struct qca8k_priv *priv =3D ds->priv; + const struct qca8k_mib_desc *mib; + struct mib_ethhdr *mib_ethhdr; + int i, mib_len, offset =3D 0; + u64 *data; + u8 port; + + mib_ethhdr =3D (struct mib_ethhdr *)skb_mac_header(skb); + mib_hdr_data =3D &priv->mib_hdr_data; + + /* The switch autocast every port. Ignore other packet and + * parse only the requested one. + */ + port =3D FIELD_GET(QCA_HDR_RECV_SOURCE_PORT, ntohs(mib_ethhdr->hdr)); + if (port !=3D mib_hdr_data->req_port) + goto exit; + + match_data =3D device_get_match_data(priv->dev); + data =3D mib_hdr_data->data; + + for (i =3D 0; i < match_data->mib_count; i++) { + mib =3D &ar8327_mib[i]; + + /* First 3 mib are present in the skb head */ + if (i < 3) { + data[i] =3D mib_ethhdr->data[i]; + continue; + } + + mib_len =3D sizeof(uint32_t); + + /* Some mib are 64 bit wide */ + if (mib->size =3D=3D 2) + mib_len =3D sizeof(uint64_t); + + /* Copy the mib value from packet to the */ + memcpy(data + i, skb->data + offset, mib_len); + + /* Set the offset for the next mib */ + offset +=3D mib_len; + } + +exit: + /* Complete on receiving all the mib packet */ + if (refcount_dec_and_test(&mib_hdr_data->port_parsed)) + complete(&mib_hdr_data->rw_done); +} + +static int +qca8k_get_ethtool_stats_eth(struct dsa_switch *ds, int port, u64 *data) +{ + struct dsa_port *dp =3D dsa_to_port(ds, port); + struct qca8k_mib_hdr_data *mib_hdr_data; + struct qca8k_priv *priv =3D ds->priv; + int ret; + + mib_hdr_data =3D &priv->mib_hdr_data; + + mutex_lock(&mib_hdr_data->mutex); + + reinit_completion(&mib_hdr_data->rw_done); + + mib_hdr_data->req_port =3D dp->index; + mib_hdr_data->data =3D data; + refcount_set(&mib_hdr_data->port_parsed, QCA8K_NUM_PORTS); + + mutex_lock(&priv->reg_mutex); + + /* Send mib autocast request */ + ret =3D regmap_update_bits(priv->regmap, QCA8K_REG_MIB, + QCA8K_MIB_FUNC | QCA8K_MIB_BUSY, + FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_CAST) | + QCA8K_MIB_BUSY); + + mutex_unlock(&priv->reg_mutex); + + if (ret) + goto exit; + + ret =3D wait_for_completion_timeout(&mib_hdr_data->rw_done, QCA8K_ETHERNE= T_TIMEOUT); + +exit: + mutex_unlock(&mib_hdr_data->mutex); + + return ret; +} + static void qca8k_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data) @@ -1893,6 +1987,10 @@ qca8k_get_ethtool_stats(struct dsa_switch *ds, int p= ort, u32 hi =3D 0; int ret; =20 + if (priv->mgmt_master && + qca8k_get_ethtool_stats_eth(ds, port, data) > 0) + return; + match_data =3D of_device_get_match_data(priv->dev); =20 for (i =3D 0; i < match_data->mib_count; i++) { @@ -2573,7 +2671,8 @@ qca8k_master_change(struct dsa_switch *ds, const stru= ct net_device *master, if (dp->index !=3D 0) return; =20 - mutex_lock(&priv->mgmt_hdr_data.mutex); + mutex_unlock(&priv->mgmt_hdr_data.mutex); + mutex_lock(&priv->mib_hdr_data.mutex); =20 if (operational) priv->mgmt_master =3D master; @@ -2581,6 +2680,7 @@ qca8k_master_change(struct dsa_switch *ds, const stru= ct net_device *master, priv->mgmt_master =3D NULL; =20 mutex_unlock(&priv->mgmt_hdr_data.mutex); + mutex_unlock(&priv->mib_hdr_data.mutex); } =20 static int qca8k_connect_tag_protocol(struct dsa_switch *ds, @@ -2593,6 +2693,7 @@ static int qca8k_connect_tag_protocol(struct dsa_swit= ch *ds, tagger_data =3D ds->tagger_data; =20 tagger_data->rw_reg_ack_handler =3D qca8k_rw_reg_ack_handler; + tagger_data->mib_autocast_handler =3D qca8k_mib_autocast_handler; =20 break; default: @@ -2721,6 +2822,9 @@ qca8k_sw_probe(struct mdio_device *mdiodev) mutex_init(&priv->mgmt_hdr_data.mutex); init_completion(&priv->mgmt_hdr_data.rw_done); =20 + mutex_init(&priv->mib_hdr_data.mutex); + init_completion(&priv->mib_hdr_data.rw_done); + priv->ds->dev =3D &mdiodev->dev; priv->ds->num_ports =3D QCA8K_NUM_PORTS; priv->ds->priv =3D priv; diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index a358a67044d3..dc1365542aa3 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -67,7 +67,7 @@ #define QCA8K_REG_MODULE_EN 0x030 #define QCA8K_MODULE_EN_MIB BIT(0) #define QCA8K_REG_MIB 0x034 -#define QCA8K_MIB_FLUSH BIT(24) +#define QCA8K_MIB_FUNC GENMASK(26, 24) #define QCA8K_MIB_CPU_KEEP BIT(20) #define QCA8K_MIB_BUSY BIT(17) #define QCA8K_MDIO_MASTER_CTRL 0x3c @@ -317,6 +317,12 @@ enum qca8k_vlan_cmd { QCA8K_VLAN_READ =3D 6, }; =20 +enum qca8k_mid_cmd { + QCA8K_MIB_FLUSH =3D 1, + QCA8K_MIB_FLUSH_PORT =3D 2, + QCA8K_MIB_CAST =3D 3, +}; + struct ar8xxx_port_status { int enabled; }; @@ -340,6 +346,14 @@ struct qca8k_mgmt_hdr_data { u32 data[4]; }; =20 +struct qca8k_mib_hdr_data { + struct completion rw_done; + struct mutex mutex; /* Process one command at time */ + refcount_t port_parsed; /* Counter to track parsed port */ + u8 req_port; + u64 *data; /* pointer to ethtool data */ +}; + struct qca8k_ports_config { bool sgmii_rx_clk_falling_edge; bool sgmii_tx_clk_falling_edge; @@ -367,6 +381,7 @@ struct qca8k_priv { unsigned int port_mtu[QCA8K_NUM_PORTS]; const struct net_device *mgmt_master; /* Track if mdio/mib Ethernet is av= ailable */ struct qca8k_mgmt_hdr_data mgmt_hdr_data; + struct qca8k_mib_hdr_data mib_hdr_data; }; =20 struct qca8k_mib_desc { --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74075C4167E for ; Sun, 23 Jan 2022 01:34:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235528AbiAWBeK (ORCPT ); Sat, 22 Jan 2022 20:34:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54642 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235334AbiAWBdz (ORCPT ); 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:52 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 12/16] net: dsa: qca8k: add support for phy read/write with mgmt Ethernet Date: Sun, 23 Jan 2022 02:33:33 +0100 Message-Id: <20220123013337.20945-13-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Use mgmt Ethernet also for phy read/write if availabale. Use a different seq number to make sure we receive the correct packet. On any error, we fallback to the legacy mdio read/write. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 191 ++++++++++++++++++++++++++++++++++++++++ drivers/net/dsa/qca8k.h | 1 + 2 files changed, 192 insertions(+) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index f51a6d8993ff..e7bc0770bae9 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -848,6 +848,166 @@ qca8k_port_set_status(struct qca8k_priv *priv, int po= rt, int enable) regmap_clear_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask); } =20 +static int +qca8k_phy_eth_busy_wait(struct qca8k_mgmt_hdr_data *phy_hdr_data, + struct sk_buff *read_skb, u32 *val) +{ + struct sk_buff *skb =3D skb_copy(read_skb, GFP_KERNEL); + bool ack; + int ret; + + reinit_completion(&phy_hdr_data->rw_done); + phy_hdr_data->seq =3D 400; + phy_hdr_data->ack =3D false; + + dev_queue_xmit(skb); + + ret =3D wait_for_completion_timeout(&phy_hdr_data->rw_done, + QCA8K_ETHERNET_TIMEOUT); + + ack =3D phy_hdr_data->ack; + + if (ret <=3D 0) + return -ETIMEDOUT; + + if (!ack) + return -EINVAL; + + *val =3D phy_hdr_data->data[0]; + + return 0; +} + +static int +qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, + int regnum, u16 data) +{ + struct sk_buff *write_skb, *clear_skb, *read_skb; + struct qca8k_mgmt_hdr_data *phy_hdr_data; + const struct net_device *mgmt_master; + u32 write_val, clear_val =3D 0, val; + int seq_num =3D 400; + int ret, ret1; + bool ack; + + if (regnum >=3D QCA8K_MDIO_MASTER_MAX_REG) + return -EINVAL; + + phy_hdr_data =3D &priv->mgmt_hdr_data; + + write_val =3D QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | + QCA8K_MDIO_MASTER_PHY_ADDR(phy) | + QCA8K_MDIO_MASTER_REG_ADDR(regnum); + + if (read) { + write_val |=3D QCA8K_MDIO_MASTER_READ; + } else { + write_val |=3D QCA8K_MDIO_MASTER_WRITE; + write_val |=3D QCA8K_MDIO_MASTER_DATA(data); + } + + /* Prealloc all the needed skb before the lock */ + write_skb =3D qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, + &write_val, seq_num, QCA8K_ETHERNET_PHY_PRIORITY); + if (!write_skb) + return -ENOMEM; + + clear_skb =3D qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, + &clear_val, seq_num, QCA8K_ETHERNET_PHY_PRIORITY); + if (!write_skb) + return -ENOMEM; + + read_skb =3D qca8k_alloc_mdio_header(MDIO_READ, QCA8K_MDIO_MASTER_CTRL, + &clear_val, seq_num, QCA8K_ETHERNET_PHY_PRIORITY); + if (!write_skb) + return -ENOMEM; + + /* Actually start the request: + * 1. Send mdio master packet + * 2. Busy Wait for mdio master command + * 3. Get the data if we are reading + * 4. Reset the mdio master (even with error) + */ + mutex_lock(&phy_hdr_data->mutex); + + /* Recheck mgmt_master under lock to make sure it's operational */ + mgmt_master =3D priv->mgmt_master; + if (!mgmt_master) + return -EINVAL; + + read_skb->dev =3D (struct net_device *)mgmt_master; + clear_skb->dev =3D (struct net_device *)mgmt_master; + write_skb->dev =3D (struct net_device *)mgmt_master; + + reinit_completion(&phy_hdr_data->rw_done); + phy_hdr_data->ack =3D false; + phy_hdr_data->seq =3D seq_num; + + dev_queue_xmit(write_skb); + + ret =3D wait_for_completion_timeout(&phy_hdr_data->rw_done, + QCA8K_ETHERNET_TIMEOUT); + + ack =3D phy_hdr_data->ack; + + if (ret <=3D 0) { + ret =3D -ETIMEDOUT; + goto exit; + } + + if (!ack) { + ret =3D -EINVAL; + goto exit; + } + + ret =3D read_poll_timeout(qca8k_phy_eth_busy_wait, ret1, + !(val & QCA8K_MDIO_MASTER_BUSY), 0, + QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false, + phy_hdr_data, read_skb, &val); + + if (ret < 0 && ret1 < 0) { + ret =3D ret1; + goto exit; + } + + if (read) { + reinit_completion(&phy_hdr_data->rw_done); + phy_hdr_data->ack =3D false; + + dev_queue_xmit(read_skb); + + ret =3D wait_for_completion_timeout(&phy_hdr_data->rw_done, + QCA8K_ETHERNET_TIMEOUT); + + ack =3D phy_hdr_data->ack; + + if (ret <=3D 0) { + ret =3D -ETIMEDOUT; + goto exit; + } + + if (!ack) { + ret =3D -EINVAL; + goto exit; + } + + ret =3D phy_hdr_data->data[0] & QCA8K_MDIO_MASTER_DATA_MASK; + } + +exit: + reinit_completion(&phy_hdr_data->rw_done); + phy_hdr_data->ack =3D false; + + dev_queue_xmit(clear_skb); + + wait_for_completion_timeout(&phy_hdr_data->rw_done, + QCA8K_ETHERNET_TIMEOUT); + + mutex_unlock(&phy_hdr_data->mutex); + + return ret; +} + static u32 qca8k_port_to_phy(int port) { @@ -970,6 +1130,14 @@ qca8k_internal_mdio_write(struct mii_bus *slave_bus, = int phy, int regnum, u16 da { struct qca8k_priv *priv =3D slave_bus->priv; struct mii_bus *bus =3D priv->bus; + int ret; + + /* Use mdio Ethernet when available, fallback to legacy one on error */ + if (priv->mgmt_master) { + ret =3D qca8k_phy_eth_command(priv, false, phy, regnum, data); + if (!ret) + return 0; + } =20 return qca8k_mdio_write(bus, phy, regnum, data); } @@ -979,6 +1147,14 @@ qca8k_internal_mdio_read(struct mii_bus *slave_bus, i= nt phy, int regnum) { struct qca8k_priv *priv =3D slave_bus->priv; struct mii_bus *bus =3D priv->bus; + int ret; + + /* Use mdio Ethernet when available, fallback to legacy one on error */ + if (priv->mgmt_master) { + ret =3D qca8k_phy_eth_command(priv, true, phy, regnum, 0); + if (ret >=3D 0) + return ret; + } =20 return qca8k_mdio_read(bus, phy, regnum); } @@ -987,6 +1163,7 @@ static int qca8k_phy_write(struct dsa_switch *ds, int port, int regnum, u16 data) { struct qca8k_priv *priv =3D ds->priv; + int ret; =20 /* Check if the legacy mapping should be used and the * port is not correctly mapped to the right PHY in the @@ -995,6 +1172,13 @@ qca8k_phy_write(struct dsa_switch *ds, int port, int = regnum, u16 data) if (priv->legacy_phy_port_mapping) port =3D qca8k_port_to_phy(port) % PHY_MAX_ADDR; =20 + /* Use mdio Ethernet when available, fallback to legacy one on error */ + if (priv->mgmt_master) { + ret =3D qca8k_phy_eth_command(priv, true, port, regnum, 0); + if (!ret) + return ret; + } + return qca8k_mdio_write(priv->bus, port, regnum, data); } =20 @@ -1011,6 +1195,13 @@ qca8k_phy_read(struct dsa_switch *ds, int port, int = regnum) if (priv->legacy_phy_port_mapping) port =3D qca8k_port_to_phy(port) % PHY_MAX_ADDR; =20 + /* Use mdio Ethernet when available, fallback to legacy one on error */ + if (priv->mgmt_master) { + ret =3D qca8k_phy_eth_command(priv, true, port, regnum, 0); + if (ret >=3D 0) + return ret; + } + ret =3D qca8k_mdio_read(priv->bus, port, regnum); =20 if (ret < 0) diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index dc1365542aa3..952217db2047 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -14,6 +14,7 @@ #include =20 #define QCA8K_ETHERNET_MDIO_PRIORITY 7 +#define QCA8K_ETHERNET_PHY_PRIORITY 6 #define QCA8K_ETHERNET_TIMEOUT 100 =20 #define QCA8K_NUM_PORTS 7 --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ECE5AC433FE for ; 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:53 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 13/16] net: dsa: qca8k: move page cache to driver priv Date: Sun, 23 Jan 2022 02:33:34 +0100 Message-Id: <20220123013337.20945-14-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" There can be multiple qca8k switch on the same system. Move the static qca8k_current_page to qca8k_priv and make it specific for each switch. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 47 +++++++++++++++++++++++------------------ drivers/net/dsa/qca8k.h | 9 ++++++++ 2 files changed, 36 insertions(+), 20 deletions(-) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index e7bc0770bae9..c2f5414033d8 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -75,12 +75,6 @@ static const struct qca8k_mib_desc ar8327_mib[] =3D { MIB_DESC(1, 0xac, "TXUnicast"), }; =20 -/* The 32bit switch registers are accessed indirectly. To achieve this we = need - * to set the page of the register. Track the last page that was set to re= duce - * mdio writes - */ -static u16 qca8k_current_page =3D 0xffff; - static void qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page) { @@ -134,11 +128,11 @@ qca8k_mii_write32(struct mii_bus *bus, int phy_id, u3= 2 regnum, u32 val) } =20 static int -qca8k_set_page(struct mii_bus *bus, u16 page) +qca8k_set_page(struct mii_bus *bus, u16 page, u16 *cached_page) { int ret; =20 - if (page =3D=3D qca8k_current_page) + if (page =3D=3D *cached_page) return 0; =20 ret =3D bus->write(bus, 0x18, 0, page); @@ -148,7 +142,7 @@ qca8k_set_page(struct mii_bus *bus, u16 page) return ret; } =20 - qca8k_current_page =3D page; + *cached_page =3D page; usleep_range(1000, 2000); return 0; } @@ -343,6 +337,7 @@ static int qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val) { struct qca8k_priv *priv =3D (struct qca8k_priv *)ctx; + struct qca8k_mdio_cache *mdio_cache; struct mii_bus *bus =3D priv->bus; u16 r1, r2, page; int ret; @@ -350,11 +345,13 @@ qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *= val) if (priv->mgmt_master && !qca8k_read_eth(priv, reg, val)) return 0; =20 + mdio_cache =3D &priv->mdio_cache; + qca8k_split_addr(reg, &r1, &r2, &page); =20 mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); =20 - ret =3D qca8k_set_page(bus, page); + ret =3D qca8k_set_page(bus, page, &mdio_cache->page); if (ret < 0) goto exit; =20 @@ -369,6 +366,7 @@ static int qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t val) { struct qca8k_priv *priv =3D (struct qca8k_priv *)ctx; + struct qca8k_mdio_cache *mdio_cache; struct mii_bus *bus =3D priv->bus; u16 r1, r2, page; int ret; @@ -376,11 +374,13 @@ qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t = val) if (priv->mgmt_master && !qca8k_write_eth(priv, reg, val)) return 0; =20 + mdio_cache =3D &priv->mdio_cache; + qca8k_split_addr(reg, &r1, &r2, &page); =20 mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); =20 - ret =3D qca8k_set_page(bus, page); + ret =3D qca8k_set_page(bus, page, &mdio_cache->page); if (ret < 0) goto exit; =20 @@ -395,6 +395,7 @@ static int qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t = write_val) { struct qca8k_priv *priv =3D (struct qca8k_priv *)ctx; + struct qca8k_mdio_cache *mdio_cache; struct mii_bus *bus =3D priv->bus; u16 r1, r2, page; u32 val; @@ -404,11 +405,13 @@ qca8k_regmap_update_bits(void *ctx, uint32_t reg, uin= t32_t mask, uint32_t write_ !qca8k_regmap_update_bits_eth(priv, reg, mask, write_val)) return 0; =20 + mdio_cache =3D &priv->mdio_cache; + qca8k_split_addr(reg, &r1, &r2, &page); =20 mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); =20 - ret =3D qca8k_set_page(bus, page); + ret =3D qca8k_set_page(bus, page, &mdio_cache->page); if (ret < 0) goto exit; =20 @@ -1046,7 +1049,8 @@ qca8k_mdio_busy_wait(struct mii_bus *bus, u32 reg, u3= 2 mask) } =20 static int -qca8k_mdio_write(struct mii_bus *bus, int phy, int regnum, u16 data) +qca8k_mdio_write(struct mii_bus *bus, struct qca8k_mdio_cache *cache, + int phy, int regnum, u16 data) { u16 r1, r2, page; u32 val; @@ -1064,7 +1068,7 @@ qca8k_mdio_write(struct mii_bus *bus, int phy, int re= gnum, u16 data) =20 mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); =20 - ret =3D qca8k_set_page(bus, page); + ret =3D qca8k_set_page(bus, page, &cache->page); if (ret) goto exit; =20 @@ -1083,7 +1087,8 @@ qca8k_mdio_write(struct mii_bus *bus, int phy, int re= gnum, u16 data) } =20 static int -qca8k_mdio_read(struct mii_bus *bus, int phy, int regnum) +qca8k_mdio_read(struct mii_bus *bus, struct qca8k_mdio_cache *cache, + int phy, int regnum) { u16 r1, r2, page; u32 val; @@ -1100,7 +1105,7 @@ qca8k_mdio_read(struct mii_bus *bus, int phy, int reg= num) =20 mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); =20 - ret =3D qca8k_set_page(bus, page); + ret =3D qca8k_set_page(bus, page, &cache->page); if (ret) goto exit; =20 @@ -1139,7 +1144,7 @@ qca8k_internal_mdio_write(struct mii_bus *slave_bus, = int phy, int regnum, u16 da return 0; } =20 - return qca8k_mdio_write(bus, phy, regnum, data); + return qca8k_mdio_write(bus, &priv->mdio_cache, phy, regnum, data); } =20 static int @@ -1156,7 +1161,7 @@ qca8k_internal_mdio_read(struct mii_bus *slave_bus, i= nt phy, int regnum) return ret; } =20 - return qca8k_mdio_read(bus, phy, regnum); + return qca8k_mdio_read(bus, &priv->mdio_cache, phy, regnum); } =20 static int @@ -1179,7 +1184,7 @@ qca8k_phy_write(struct dsa_switch *ds, int port, int = regnum, u16 data) return ret; } =20 - return qca8k_mdio_write(priv->bus, port, regnum, data); + return qca8k_mdio_write(priv->bus, &priv->mdio_cache, port, regnum, data); } =20 static int @@ -1202,7 +1207,7 @@ qca8k_phy_read(struct dsa_switch *ds, int port, int r= egnum) return ret; } =20 - ret =3D qca8k_mdio_read(priv->bus, port, regnum); + ret =3D qca8k_mdio_read(priv->bus, &priv->mdio_cache, port, regnum); =20 if (ret < 0) return 0xffff; @@ -3001,6 +3006,8 @@ qca8k_sw_probe(struct mdio_device *mdiodev) return PTR_ERR(priv->regmap); } =20 + priv->mdio_cache.page =3D 0xffff; + /* Check the detected switch id */ ret =3D qca8k_read_switch_id(priv); if (ret) diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index 952217db2047..77ffdc7b5aaa 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -363,6 +363,14 @@ struct qca8k_ports_config { u8 rgmii_tx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */ }; =20 +struct qca8k_mdio_cache { +/* The 32bit switch registers are accessed indirectly. To achieve this we = need + * to set the page of the register. Track the last page that was set to re= duce + * mdio writes + */ + u16 page; +}; + struct qca8k_priv { u8 switch_id; u8 switch_revision; @@ -383,6 +391,7 @@ struct qca8k_priv { const struct net_device *mgmt_master; /* Track if mdio/mib Ethernet is av= ailable */ struct qca8k_mgmt_hdr_data mgmt_hdr_data; struct qca8k_mib_hdr_data mib_hdr_data; + struct qca8k_mdio_cache mdio_cache; }; =20 struct qca8k_mib_desc { --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9F86C433F5 for ; Sun, 23 Jan 2022 01:34:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235502AbiAWBeX (ORCPT ); Sat, 22 Jan 2022 20:34:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235361AbiAWBd5 (ORCPT ); Sat, 22 Jan 2022 20:33:57 -0500 Received: from mail-ed1-x532.google.com (mail-ed1-x532.google.com [IPv6:2a00:1450:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 963DCC06173B; Sat, 22 Jan 2022 17:33:56 -0800 (PST) Received: by mail-ed1-x532.google.com with SMTP id r10so18678717edt.1; Sat, 22 Jan 2022 17:33:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SeNIlOjCpzJJQoQB7ids6lo81FsdNkZ9xGds/d7qknQ=; b=SxB6TlpZEosChqccOjgctSYMLWaxFcOSzxgvc2OqtSsLndq/wIZ89WRCfVWfO4wOyn UF8Se86jja9rBzZpVDnU5jBiqOCFdpoasObw9B+3YLOnEEmrkuTmg2Ud7QCJ68ZYcvHh q2oEuzaVl18/3r2Av7YRdyiyaTQvvPMLpFg0h87hrvbrJpwvXPooPPpS72kSOafZPRZB qdi0fOPhtTX4pmtQPRjCp3Ijoth0CEgvs2zRTdzl2lX49ETkVM7qJWcHkDgkMX7n3aGC ffFY/s5PxENAeOK4c8s0sHtncVMi4d7R7cjBAT/79zFVkJkctto0rLI3y2cpmpMTYKHm 2eTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SeNIlOjCpzJJQoQB7ids6lo81FsdNkZ9xGds/d7qknQ=; b=6je/3I5sUEDvoQa47yUNnwTj0FBkrLMJVK308bGKGDkZtJn5WhGfeF9EUcxP64vioa fWnuIY9xcCwqJbiTz4d3IipGMlbq9uX31j3fcMrbjPbwCraMJeueBHfw7m53SWLDMEOf kFcuM7M/Ok8pAFFxMtGXW2YLFeOZprxg/Ry63WRtm9dRM0L2345ZVoaNzzUC2/sL720t Wcz/nTC9GgZmzQ8KQln57VJsiAQF4QRvvUveL/hpcqobZIIW/1qdnv8R9I6A/ErNDs2B q1k4v1UtABSz1+6Gri4yQpREq3j3VbRiNUPIdjpiy0UZuT9jHJzlPnLdrPFXN9QQyOnd vVUw== X-Gm-Message-State: AOAM533F955kiVIr5CcYr5nm4HCEQs/ZnQQrbRgQneVV08O90JRBtxWk rRWWdpRh+yxZsorSwdpY5zw= X-Google-Smtp-Source: ABdhPJzKEkIPiabanr7vps6dciof8xhSKilr2xLXx7aAln0Adx1NpXJ16DLeBl3xvpn5dG/ie/BxMg== X-Received: by 2002:a05:6402:2805:: with SMTP id h5mr10190712ede.241.1642901635087; Sat, 22 Jan 2022 17:33:55 -0800 (PST) Received: from localhost.localdomain (93-42-71-246.ip85.fastwebnet.it. [93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:54 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 14/16] net: dsa: qca8k: cache lo and hi for mdio write Date: Sun, 23 Jan 2022 02:33:35 +0100 Message-Id: <20220123013337.20945-15-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From Documentation, we can cache lo and hi the same way we do with the page. This massively reduce the mdio write as 3/4 of the time as we only require to write the lo or hi part for a mdio write. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 60 ++++++++++++++++++++++++++++++++--------- drivers/net/dsa/qca8k.h | 5 ++++ 2 files changed, 53 insertions(+), 12 deletions(-) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index c2f5414033d8..2a43fb9aeef2 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -88,6 +88,42 @@ qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *pag= e) *page =3D regaddr & 0x3ff; } =20 +static int +qca8k_set_lo(struct mii_bus *bus, int phy_id, u32 regnum, + u16 lo, u16 *cached_lo) +{ + int ret; + + if (lo =3D=3D *cached_lo) + return 0; + + ret =3D bus->write(bus, phy_id, regnum, lo); + if (ret < 0) + dev_err_ratelimited(&bus->dev, + "failed to write qca8k 32bit lo register\n"); + + *cached_lo =3D lo; + return 0; +} + +static int +qca8k_set_hi(struct mii_bus *bus, int phy_id, u32 regnum, + u16 hi, u16 *cached_hi) +{ + int ret; + + if (hi =3D=3D *cached_hi) + return 0; + + ret =3D bus->write(bus, phy_id, regnum, hi); + if (ret < 0) + dev_err_ratelimited(&bus->dev, + "failed to write qca8k 32bit hi register\n"); + + *cached_hi =3D hi; + return 0; +} + static int qca8k_mii_read32(struct mii_bus *bus, int phy_id, u32 regnum, u32 *val) { @@ -111,7 +147,8 @@ qca8k_mii_read32(struct mii_bus *bus, int phy_id, u32 r= egnum, u32 *val) } =20 static void -qca8k_mii_write32(struct mii_bus *bus, int phy_id, u32 regnum, u32 val) +qca8k_mii_write32(struct mii_bus *bus, struct qca8k_mdio_cache *cache, + int phy_id, u32 regnum, u32 val) { u16 lo, hi; int ret; @@ -119,12 +156,9 @@ qca8k_mii_write32(struct mii_bus *bus, int phy_id, u32= regnum, u32 val) lo =3D val & 0xffff; hi =3D (u16)(val >> 16); =20 - ret =3D bus->write(bus, phy_id, regnum, lo); + ret =3D qca8k_set_lo(bus, phy_id, regnum, lo, &cache->lo); if (ret >=3D 0) - ret =3D bus->write(bus, phy_id, regnum + 1, hi); - if (ret < 0) - dev_err_ratelimited(&bus->dev, - "failed to write qca8k 32bit register\n"); + ret =3D qca8k_set_hi(bus, phy_id, regnum + 1, hi, &cache->hi); } =20 static int @@ -384,7 +418,7 @@ qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t va= l) if (ret < 0) goto exit; =20 - qca8k_mii_write32(bus, 0x10 | r2, r1, val); + qca8k_mii_write32(bus, mdio_cache, 0x10 | r2, r1, val); =20 exit: mutex_unlock(&bus->mdio_lock); @@ -421,7 +455,7 @@ qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint3= 2_t mask, uint32_t write_ =20 val &=3D ~mask; val |=3D write_val; - qca8k_mii_write32(bus, 0x10 | r2, r1, val); + qca8k_mii_write32(bus, mdio_cache, 0x10 | r2, r1, val); =20 exit: mutex_unlock(&bus->mdio_lock); @@ -1072,14 +1106,14 @@ qca8k_mdio_write(struct mii_bus *bus, struct qca8k_= mdio_cache *cache, if (ret) goto exit; =20 - qca8k_mii_write32(bus, 0x10 | r2, r1, val); + qca8k_mii_write32(bus, cache, 0x10 | r2, r1, val); =20 ret =3D qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL, QCA8K_MDIO_MASTER_BUSY); =20 exit: /* even if the busy_wait timeouts try to clear the MASTER_EN */ - qca8k_mii_write32(bus, 0x10 | r2, r1, 0); + qca8k_mii_write32(bus, cache, 0x10 | r2, r1, 0); =20 mutex_unlock(&bus->mdio_lock); =20 @@ -1109,7 +1143,7 @@ qca8k_mdio_read(struct mii_bus *bus, struct qca8k_mdi= o_cache *cache, if (ret) goto exit; =20 - qca8k_mii_write32(bus, 0x10 | r2, r1, val); + qca8k_mii_write32(bus, cache, 0x10 | r2, r1, val); =20 ret =3D qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL, QCA8K_MDIO_MASTER_BUSY); @@ -1120,7 +1154,7 @@ qca8k_mdio_read(struct mii_bus *bus, struct qca8k_mdi= o_cache *cache, =20 exit: /* even if the busy_wait timeouts try to clear the MASTER_EN */ - qca8k_mii_write32(bus, 0x10 | r2, r1, 0); + qca8k_mii_write32(bus, cache, 0x10 | r2, r1, 0); =20 mutex_unlock(&bus->mdio_lock); =20 @@ -3007,6 +3041,8 @@ qca8k_sw_probe(struct mdio_device *mdiodev) } =20 priv->mdio_cache.page =3D 0xffff; + priv->mdio_cache.lo =3D 0xffff; + priv->mdio_cache.hi =3D 0xffff; =20 /* Check the detected switch id */ ret =3D qca8k_read_switch_id(priv); diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h index 77ffdc7b5aaa..9ecd4d221906 100644 --- a/drivers/net/dsa/qca8k.h +++ b/drivers/net/dsa/qca8k.h @@ -369,6 +369,11 @@ struct qca8k_mdio_cache { * mdio writes */ u16 page; +/* lo and hi can also be cached and from Documentation we can skip one + * extra mdio write if lo or hi is didn't change. + */ + u16 lo; + u16 hi; }; =20 struct qca8k_priv { --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53C14C31D68 for ; Sun, 23 Jan 2022 01:34:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235469AbiAWBeR (ORCPT ); Sat, 22 Jan 2022 20:34:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235383AbiAWBd6 (ORCPT ); Sat, 22 Jan 2022 20:33:58 -0500 Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [IPv6:2a00:1450:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 993F5C06173D; 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:55 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 15/16] net: da: qca8k: add support for larger read/write size with mgmt Ethernet Date: Sun, 23 Jan 2022 02:33:36 +0100 Message-Id: <20220123013337.20945-16-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" mgmt Ethernet packet can read/write up to 16byte at times. The len reg is limited to 15 (0xf). The switch actually sends and accepts data in 4 different steps of len values. Len steps: - 0: nothing - 1-4: first 4 byte - 5-6: first 12 byte - 7-15: all 16 byte In the allock skb function we check if the len is 16 and we fix it to a len of 15. It the read/write function interest to extract the real asked data. The tagger handler will always copy the fully 16byte with a READ command. This is useful for some big regs like the fdb reg that are more than 4byte of data. This permits to introduce a bulk function that will send and request the entire entry in one go. Write function is changed and it does now require to pass the pointer to val to also handle array val. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 56 ++++++++++++++++++++++++++++++----------- 1 file changed, 41 insertions(+), 15 deletions(-) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 2a43fb9aeef2..0183ce2d5b74 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -219,7 +219,9 @@ static void qca8k_rw_reg_ack_handler(struct dsa_switch = *ds, struct sk_buff *skb) if (cmd =3D=3D MDIO_READ) { mgmt_hdr_data->data[0] =3D mgmt_ethhdr->mdio_data; =20 - /* Get the rest of the 12 byte of data */ + /* Get the rest of the 12 byte of data. + * The read/write function will extract the requested data. + */ if (len > QCA_HDR_MGMT_DATA1_LEN) memcpy(mgmt_hdr_data->data + 1, skb->data, QCA_HDR_MGMT_DATA2_LEN); @@ -229,16 +231,30 @@ static void qca8k_rw_reg_ack_handler(struct dsa_switc= h *ds, struct sk_buff *skb) } =20 static struct sk_buff *qca8k_alloc_mdio_header(enum mdio_cmd cmd, u32 reg,= u32 *val, - int seq_num, int priority) + int seq_num, int priority, int len) { struct mgmt_ethhdr *mgmt_ethhdr; struct sk_buff *skb; + int real_len; + u32 *data2; u16 hdr; =20 skb =3D dev_alloc_skb(QCA_HDR_MGMT_PKG_LEN); if (!skb) return NULL; =20 + /* Max value for len reg is 15 (0xf) but the switch actually return 16 by= te + * Actually for some reason the steps are: + * 0: nothing + * 1-4: first 4 byte + * 5-6: first 12 byte + * 7-15: all 16 byte + */ + if (len =3D=3D 16) + real_len =3D 15; + else + real_len =3D len; + skb_reset_mac_header(skb); skb_set_network_header(skb, skb->len); =20 @@ -253,7 +269,7 @@ static struct sk_buff *qca8k_alloc_mdio_header(enum mdi= o_cmd cmd, u32 reg, u32 * mgmt_ethhdr->seq =3D FIELD_PREP(QCA_HDR_MGMT_SEQ_NUM, seq_num); =20 mgmt_ethhdr->command =3D FIELD_PREP(QCA_HDR_MGMT_ADDR, reg); - mgmt_ethhdr->command |=3D FIELD_PREP(QCA_HDR_MGMT_LENGTH, 4); + mgmt_ethhdr->command |=3D FIELD_PREP(QCA_HDR_MGMT_LENGTH, real_len); mgmt_ethhdr->command |=3D FIELD_PREP(QCA_HDR_MGMT_CMD, cmd); mgmt_ethhdr->command |=3D FIELD_PREP(QCA_HDR_MGMT_CHECK_CODE, QCA_HDR_MGMT_CHECK_CODE_VAL); @@ -263,19 +279,22 @@ static struct sk_buff *qca8k_alloc_mdio_header(enum m= dio_cmd cmd, u32 reg, u32 * =20 mgmt_ethhdr->hdr =3D htons(hdr); =20 - skb_put_zero(skb, QCA_HDR_MGMT_DATA2_LEN + QCA_HDR_MGMT_PADDING_LEN); + data2 =3D skb_put_zero(skb, QCA_HDR_MGMT_DATA2_LEN + QCA_HDR_MGMT_PADDING= _LEN); + if (cmd =3D=3D MDIO_WRITE && len > QCA_HDR_MGMT_DATA1_LEN) + memcpy(data2, val + 1, len - QCA_HDR_MGMT_DATA1_LEN); =20 return skb; } =20 -static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val) +static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int = len) { struct qca8k_mgmt_hdr_data *mgmt_hdr_data =3D &priv->mgmt_hdr_data; struct sk_buff *skb; bool ack; int ret; =20 - skb =3D qca8k_alloc_mdio_header(MDIO_READ, reg, NULL, 200, QCA8K_ETHERNET= _MDIO_PRIORITY); + skb =3D qca8k_alloc_mdio_header(MDIO_READ, reg, NULL, 200, + QCA8K_ETHERNET_MDIO_PRIORITY, len); if (!skb) return -ENOMEM; =20 @@ -297,6 +316,9 @@ static int qca8k_read_eth(struct qca8k_priv *priv, u32 = reg, u32 *val) msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); =20 *val =3D mgmt_hdr_data->data[0]; + if (len > QCA_HDR_MGMT_DATA1_LEN) + memcpy(val + 1, mgmt_hdr_data->data + 1, len - QCA_HDR_MGMT_DATA1_LEN); + ack =3D mgmt_hdr_data->ack; =20 mutex_unlock(&mgmt_hdr_data->mutex); @@ -310,14 +332,15 @@ static int qca8k_read_eth(struct qca8k_priv *priv, u3= 2 reg, u32 *val) return 0; } =20 -static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 val) +static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int= len) { struct qca8k_mgmt_hdr_data *mgmt_hdr_data =3D &priv->mgmt_hdr_data; struct sk_buff *skb; bool ack; int ret; =20 - skb =3D qca8k_alloc_mdio_header(MDIO_WRITE, reg, &val, 200, QCA8K_ETHERNE= T_MDIO_PRIORITY); + skb =3D qca8k_alloc_mdio_header(MDIO_WRITE, reg, val, 200, + QCA8K_ETHERNET_MDIO_PRIORITY, len); if (!skb) return -ENOMEM; =20 @@ -357,14 +380,14 @@ qca8k_regmap_update_bits_eth(struct qca8k_priv *priv,= u32 reg, u32 mask, u32 wri u32 val =3D 0; int ret; =20 - ret =3D qca8k_read_eth(priv, reg, &val); + ret =3D qca8k_read_eth(priv, reg, &val, 4); if (ret) return ret; =20 val &=3D ~mask; val |=3D write_val; =20 - return qca8k_write_eth(priv, reg, val); + return qca8k_write_eth(priv, reg, &val, 4); } =20 static int @@ -376,7 +399,7 @@ qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *va= l) u16 r1, r2, page; int ret; =20 - if (priv->mgmt_master && !qca8k_read_eth(priv, reg, val)) + if (priv->mgmt_master && !qca8k_read_eth(priv, reg, val, 4)) return 0; =20 mdio_cache =3D &priv->mdio_cache; @@ -405,7 +428,7 @@ qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t va= l) u16 r1, r2, page; int ret; =20 - if (priv->mgmt_master && !qca8k_write_eth(priv, reg, val)) + if (priv->mgmt_master && !qca8k_write_eth(priv, reg, &val, 4)) return 0; =20 mdio_cache =3D &priv->mdio_cache; @@ -945,17 +968,20 @@ qca8k_phy_eth_command(struct qca8k_priv *priv, bool r= ead, int phy, =20 /* Prealloc all the needed skb before the lock */ write_skb =3D qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, - &write_val, seq_num, QCA8K_ETHERNET_PHY_PRIORITY); + &write_val, seq_num, + QCA8K_ETHERNET_PHY_PRIORITY, 4); if (!write_skb) return -ENOMEM; =20 clear_skb =3D qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, - &clear_val, seq_num, QCA8K_ETHERNET_PHY_PRIORITY); + &clear_val, seq_num, + QCA8K_ETHERNET_PHY_PRIORITY, 4); if (!write_skb) return -ENOMEM; =20 read_skb =3D qca8k_alloc_mdio_header(MDIO_READ, QCA8K_MDIO_MASTER_CTRL, - &clear_val, seq_num, QCA8K_ETHERNET_PHY_PRIORITY); + &clear_val, seq_num, + QCA8K_ETHERNET_PHY_PRIORITY, 4); if (!write_skb) return -ENOMEM; =20 --=20 2.33.1 From nobody Wed Jul 1 13:45:20 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4548C433EF for ; Sun, 23 Jan 2022 01:34:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235801AbiAWBeb (ORCPT ); Sat, 22 Jan 2022 20:34:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235388AbiAWBd7 (ORCPT ); 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[93.42.71.246]) by smtp.googlemail.com with ESMTPSA id fy40sm3259866ejc.36.2022.01.22.17.33.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jan 2022 17:33:56 -0800 (PST) From: Ansuel Smith To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: Ansuel Smith Subject: [RFC PATCH v7 16/16] net: dsa: qca8k: introduce qca8k_bulk_read/write function Date: Sun, 23 Jan 2022 02:33:37 +0100 Message-Id: <20220123013337.20945-17-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220123013337.20945-1-ansuelsmth@gmail.com> References: <20220123013337.20945-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Introduce qca8k_bulk_read/write() function to use mgmt Ethernet way to read/write packet in bulk. Make use of this new function in the fdb function. Signed-off-by: Ansuel Smith --- drivers/net/dsa/qca8k.c | 55 ++++++++++++++++++++++++++++++++--------- 1 file changed, 43 insertions(+), 12 deletions(-) diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 0183ce2d5b74..b8d063c58675 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -390,6 +390,43 @@ qca8k_regmap_update_bits_eth(struct qca8k_priv *priv, = u32 reg, u32 mask, u32 wri return qca8k_write_eth(priv, reg, &val, 4); } =20 +static int +qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +{ + int i, count =3D len / sizeof(u32), ret; + + if (priv->mgmt_master && !qca8k_read_eth(priv, reg, val, len)) + return 0; + + for (i =3D 0; i < count; i++) { + ret =3D regmap_read(priv->regmap, reg + (i * 4), val + i); + if (ret < 0) + return ret; + } + + return 0; +} + +static int +qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +{ + int i, count =3D len / sizeof(u32), ret; + u32 tmp; + + if (priv->mgmt_master && !qca8k_write_eth(priv, reg, val, len)) + return 0; + + for (i =3D 0; i < count; i++) { + tmp =3D val[i]; + + ret =3D regmap_write(priv->regmap, reg + (i * 4), tmp); + if (ret < 0) + return ret; + } + + return 0; +} + static int qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val) { @@ -535,17 +572,13 @@ qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32= mask) static int qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb) { - u32 reg[4], val; - int i, ret; + u32 reg[4]; + int ret; =20 /* load the ARL table into an array */ - for (i =3D 0; i < 4; i++) { - ret =3D qca8k_read(priv, QCA8K_REG_ATU_DATA0 + (i * 4), &val); - if (ret < 0) - return ret; - - reg[i] =3D val; - } + ret =3D qca8k_bulk_read(priv, QCA8K_REG_ATU_DATA0, reg, 12); + if (ret) + return ret; =20 /* vid - 83:72 */ fdb->vid =3D FIELD_GET(QCA8K_ATU_VID_MASK, reg[2]); @@ -569,7 +602,6 @@ qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 po= rt_mask, const u8 *mac, u8 aging) { u32 reg[3] =3D { 0 }; - int i; =20 /* vid - 83:72 */ reg[2] =3D FIELD_PREP(QCA8K_ATU_VID_MASK, vid); @@ -586,8 +618,7 @@ qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 po= rt_mask, const u8 *mac, reg[0] |=3D FIELD_PREP(QCA8K_ATU_ADDR5_MASK, mac[5]); =20 /* load the array into the ARL table */ - for (i =3D 0; i < 3; i++) - qca8k_write(priv, QCA8K_REG_ATU_DATA0 + (i * 4), reg[i]); + qca8k_bulk_write(priv, QCA8K_REG_ATU_DATA0, reg, 12); } =20 static int --=20 2.33.1