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charset="utf-8" The imx8m-blk-ctrl driver was increasing in size with every new BLK CTRL addition for every SoC. Lets split the SoC specific parts into separate drivers. Do that for i.MX8MM now. Signed-off-by: Abel Vesa --- drivers/soc/imx/Kconfig | 7 + drivers/soc/imx/Makefile | 1 + drivers/soc/imx/imx8m-blk-ctrl.c | 210 +----------------------------- drivers/soc/imx/imx8m-blk-ctrl.h | 72 ++++++++++ drivers/soc/imx/imx8mm-blk-ctrl.c | 173 ++++++++++++++++++++++++ 5 files changed, 257 insertions(+), 206 deletions(-) create mode 100644 drivers/soc/imx/imx8m-blk-ctrl.h create mode 100644 drivers/soc/imx/imx8mm-blk-ctrl.c diff --git a/drivers/soc/imx/Kconfig b/drivers/soc/imx/Kconfig index a840494e849a..b0cc53f3fc2c 100644 --- a/drivers/soc/imx/Kconfig +++ b/drivers/soc/imx/Kconfig @@ -20,4 +20,11 @@ config SOC_IMX8M support, it will provide the SoC info like SoC family, ID and revision etc. =20 +config SOC_IMX8MM_BLK_CTRL + bool "i.MX8MM SoC BLK CTRL support" + depends on SOC_IMX8M + help + If you say yes here you get support for the NXP i.MX8MM BLK CTRL + support. + endmenu diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile index 8a707077914c..06c2970e6308 100644 --- a/drivers/soc/imx/Makefile +++ b/drivers/soc/imx/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_HAVE_IMX_GPC) +=3D gpc.o obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) +=3D gpcv2.o obj-$(CONFIG_SOC_IMX8M) +=3D soc-imx8m.o obj-$(CONFIG_SOC_IMX8M) +=3D imx8m-blk-ctrl.o +obj-$(CONFIG_SOC_IMX8MM_BLK_CTRL) +=3D imx8mm-blk-ctrl.o diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-c= trl.c index 511e74f0db8a..599b2a9a38bb 100644 --- a/drivers/soc/imx/imx8m-blk-ctrl.c +++ b/drivers/soc/imx/imx8m-blk-ctrl.c @@ -4,67 +4,11 @@ * Copyright 2021 Pengutronix, Lucas Stach */ =20 -#include -#include #include -#include -#include -#include -#include -#include =20 -#include #include =20 -#define BLK_SFT_RSTN 0x0 -#define BLK_CLK_EN 0x4 -#define BLK_MIPI_RESET_DIV 0x8 /* Mini/Nano DISPLAY_BLK_CTRL only */ - -struct imx8m_blk_ctrl_domain; - -struct imx8m_blk_ctrl { - struct device *dev; - struct notifier_block power_nb; - struct device *bus_power_dev; - struct regmap *regmap; - struct imx8m_blk_ctrl_domain *domains; - struct genpd_onecell_data onecell_data; -}; - -struct imx8m_blk_ctrl_domain_data { - const char *name; - const char * const *clk_names; - int num_clks; - const char *gpc_name; - u32 rst_mask; - u32 clk_mask; - - /* - * i.MX8M Mini and Nano have a third DISPLAY_BLK_CTRL register - * which is used to control the reset for the MIPI Phy. - * Since it's only present in certain circumstances, - * an if-statement should be used before setting and clearing this - * register. - */ - u32 mipi_phy_rst_mask; -}; - -#define DOMAIN_MAX_CLKS 3 - -struct imx8m_blk_ctrl_domain { - struct generic_pm_domain genpd; - const struct imx8m_blk_ctrl_domain_data *data; - struct clk_bulk_data clks[DOMAIN_MAX_CLKS]; - struct device *power_dev; - struct imx8m_blk_ctrl *bc; -}; - -struct imx8m_blk_ctrl_data { - int max_reg; - notifier_fn_t power_notifier_fn; - const struct imx8m_blk_ctrl_domain_data *domains; - int num_domains; -}; +#include "imx8m-blk-ctrl.h" =20 static inline struct imx8m_blk_ctrl_domain * to_imx8m_blk_ctrl_domain(struct generic_pm_domain *genpd) @@ -165,7 +109,7 @@ imx8m_blk_ctrl_xlate(struct of_phandle_args *args, void= *data) =20 static struct lock_class_key blk_ctrl_genpd_lock_class; =20 -static int imx8m_blk_ctrl_probe(struct platform_device *pdev) +int imx8m_blk_ctrl_probe(struct platform_device *pdev) { const struct imx8m_blk_ctrl_data *bc_data; struct device *dev =3D &pdev->dev; @@ -299,7 +243,7 @@ static int imx8m_blk_ctrl_probe(struct platform_device = *pdev) return ret; } =20 -static int imx8m_blk_ctrl_remove(struct platform_device *pdev) +int imx8m_blk_ctrl_remove(struct platform_device *pdev) { struct imx8m_blk_ctrl *bc =3D dev_get_drvdata(&pdev->dev); int i; @@ -375,150 +319,10 @@ static int imx8m_blk_ctrl_resume(struct device *dev) } #endif =20 -static const struct dev_pm_ops imx8m_blk_ctrl_pm_ops =3D { +const struct dev_pm_ops imx8m_blk_ctrl_pm_ops =3D { SET_SYSTEM_SLEEP_PM_OPS(imx8m_blk_ctrl_suspend, imx8m_blk_ctrl_resume) }; =20 -static int imx8mm_vpu_power_notifier(struct notifier_block *nb, - unsigned long action, void *data) -{ - struct imx8m_blk_ctrl *bc =3D container_of(nb, struct imx8m_blk_ctrl, - power_nb); - - if (action !=3D GENPD_NOTIFY_ON && action !=3D GENPD_NOTIFY_PRE_OFF) - return NOTIFY_OK; - - /* - * The ADB in the VPUMIX domain has no separate reset and clock - * enable bits, but is ungated together with the VPU clocks. To - * allow the handshake with the GPC to progress we put the VPUs - * in reset and ungate the clocks. - */ - regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, BIT(0) | BIT(1) | BIT(2)); - regmap_set_bits(bc->regmap, BLK_CLK_EN, BIT(0) | BIT(1) | BIT(2)); - - if (action =3D=3D GENPD_NOTIFY_ON) { - /* - * On power up we have no software backchannel to the GPC to - * wait for the ADB handshake to happen, so we just delay for a - * bit. On power down the GPC driver waits for the handshake. - */ - udelay(5); - - /* set "fuse" bits to enable the VPUs */ - regmap_set_bits(bc->regmap, 0x8, 0xffffffff); - regmap_set_bits(bc->regmap, 0xc, 0xffffffff); - regmap_set_bits(bc->regmap, 0x10, 0xffffffff); - regmap_set_bits(bc->regmap, 0x14, 0xffffffff); - } - - return NOTIFY_OK; -} - -static const struct imx8m_blk_ctrl_domain_data imx8mm_vpu_blk_ctl_domain_d= ata[] =3D { - [IMX8MM_VPUBLK_PD_G1] =3D { - .name =3D "vpublk-g1", - .clk_names =3D (const char *[]){ "g1", }, - .num_clks =3D 1, - .gpc_name =3D "g1", - .rst_mask =3D BIT(1), - .clk_mask =3D BIT(1), - }, - [IMX8MM_VPUBLK_PD_G2] =3D { - .name =3D "vpublk-g2", - .clk_names =3D (const char *[]){ "g2", }, - .num_clks =3D 1, - .gpc_name =3D "g2", - .rst_mask =3D BIT(0), - .clk_mask =3D BIT(0), - }, - [IMX8MM_VPUBLK_PD_H1] =3D { - .name =3D "vpublk-h1", - .clk_names =3D (const char *[]){ "h1", }, - .num_clks =3D 1, - .gpc_name =3D "h1", - .rst_mask =3D BIT(2), - .clk_mask =3D BIT(2), - }, -}; - -static const struct imx8m_blk_ctrl_data imx8mm_vpu_blk_ctl_dev_data =3D { - .max_reg =3D 0x18, - .power_notifier_fn =3D imx8mm_vpu_power_notifier, - .domains =3D imx8mm_vpu_blk_ctl_domain_data, - .num_domains =3D ARRAY_SIZE(imx8mm_vpu_blk_ctl_domain_data), -}; - -static int imx8mm_disp_power_notifier(struct notifier_block *nb, - unsigned long action, void *data) -{ - struct imx8m_blk_ctrl *bc =3D container_of(nb, struct imx8m_blk_ctrl, - power_nb); - - if (action !=3D GENPD_NOTIFY_ON && action !=3D GENPD_NOTIFY_PRE_OFF) - return NOTIFY_OK; - - /* Enable bus clock and deassert bus reset */ - regmap_set_bits(bc->regmap, BLK_CLK_EN, BIT(12)); - regmap_set_bits(bc->regmap, BLK_SFT_RSTN, BIT(6)); - - /* - * On power up we have no software backchannel to the GPC to - * wait for the ADB handshake to happen, so we just delay for a - * bit. On power down the GPC driver waits for the handshake. - */ - if (action =3D=3D GENPD_NOTIFY_ON) - udelay(5); - - - return NOTIFY_OK; -} - -static const struct imx8m_blk_ctrl_domain_data imx8mm_disp_blk_ctl_domain_= data[] =3D { - [IMX8MM_DISPBLK_PD_CSI_BRIDGE] =3D { - .name =3D "dispblk-csi-bridge", - .clk_names =3D (const char *[]){ "csi-bridge-axi", "csi-bridge-apb", - "csi-bridge-core", }, - .num_clks =3D 3, - .gpc_name =3D "csi-bridge", - .rst_mask =3D BIT(0) | BIT(1) | BIT(2), - .clk_mask =3D BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5), - }, - [IMX8MM_DISPBLK_PD_LCDIF] =3D { - .name =3D "dispblk-lcdif", - .clk_names =3D (const char *[]){ "lcdif-axi", "lcdif-apb", "lcdif-pix", = }, - .num_clks =3D 3, - .gpc_name =3D "lcdif", - .clk_mask =3D BIT(6) | BIT(7), - }, - [IMX8MM_DISPBLK_PD_MIPI_DSI] =3D { - .name =3D "dispblk-mipi-dsi", - .clk_names =3D (const char *[]){ "dsi-pclk", "dsi-ref", }, - .num_clks =3D 2, - .gpc_name =3D "mipi-dsi", - .rst_mask =3D BIT(5), - .clk_mask =3D BIT(8) | BIT(9), - .mipi_phy_rst_mask =3D BIT(17), - }, - [IMX8MM_DISPBLK_PD_MIPI_CSI] =3D { - .name =3D "dispblk-mipi-csi", - .clk_names =3D (const char *[]){ "csi-aclk", "csi-pclk" }, - .num_clks =3D 2, - .gpc_name =3D "mipi-csi", - .rst_mask =3D BIT(3) | BIT(4), - .clk_mask =3D BIT(10) | BIT(11), - .mipi_phy_rst_mask =3D BIT(16), - }, -}; - -static const struct imx8m_blk_ctrl_data imx8mm_disp_blk_ctl_dev_data =3D { - .max_reg =3D 0x2c, - .power_notifier_fn =3D imx8mm_disp_power_notifier, - .domains =3D imx8mm_disp_blk_ctl_domain_data, - .num_domains =3D ARRAY_SIZE(imx8mm_disp_blk_ctl_domain_data), -}; - - static int imx8mn_disp_power_notifier(struct notifier_block *nb, unsigned long action, void *data) { @@ -591,12 +395,6 @@ static const struct imx8m_blk_ctrl_data imx8mn_disp_bl= k_ctl_dev_data =3D { =20 static const struct of_device_id imx8m_blk_ctrl_of_match[] =3D { { - .compatible =3D "fsl,imx8mm-vpu-blk-ctrl", - .data =3D &imx8mm_vpu_blk_ctl_dev_data - }, { - .compatible =3D "fsl,imx8mm-disp-blk-ctrl", - .data =3D &imx8mm_disp_blk_ctl_dev_data - }, { .compatible =3D "fsl,imx8mn-disp-blk-ctrl", .data =3D &imx8mn_disp_blk_ctl_dev_data }, { diff --git a/drivers/soc/imx/imx8m-blk-ctrl.h b/drivers/soc/imx/imx8m-blk-c= trl.h new file mode 100644 index 000000000000..618b3429bb69 --- /dev/null +++ b/drivers/soc/imx/imx8m-blk-ctrl.h @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/* + * Copyright 2021 Pengutronix, Lucas Stach + * Copyright 2022 NXP, Abel Vesa + */ + +#ifndef __IMX_BLK_CTRL_H +#define __IMX_BLK_CTRL_H + +#include +#include +#include +#include +#include + +#define BLK_SFT_RSTN 0x0 +#define BLK_CLK_EN 0x4 +#define BLK_MIPI_RESET_DIV 0x8 /* Mini/Nano DISPLAY_BLK_CTRL only */ + +struct imx8m_blk_ctrl_domain; + +struct imx8m_blk_ctrl { + struct device *dev; + struct notifier_block power_nb; + struct device *bus_power_dev; + struct regmap *regmap; + struct imx8m_blk_ctrl_domain *domains; + struct genpd_onecell_data onecell_data; +}; + +struct imx8m_blk_ctrl_domain_data { + const char *name; + const char * const *clk_names; + int num_clks; + const char *gpc_name; + u32 rst_mask; + u32 clk_mask; + + /* + * i.MX8M Mini and Nano have a third DISPLAY_BLK_CTRL register + * which is used to control the reset for the MIPI Phy. + * Since it's only present in certain circumstances, + * an if-statement should be used before setting and clearing this + * register. + */ + u32 mipi_phy_rst_mask; +}; + +#define DOMAIN_MAX_CLKS 3 + +struct imx8m_blk_ctrl_domain { + struct generic_pm_domain genpd; + const struct imx8m_blk_ctrl_domain_data *data; + struct clk_bulk_data clks[DOMAIN_MAX_CLKS]; + struct device *power_dev; + struct imx8m_blk_ctrl *bc; +}; + +struct imx8m_blk_ctrl_data { + int max_reg; + notifier_fn_t power_notifier_fn; + const struct imx8m_blk_ctrl_domain_data *domains; + int num_domains; +}; + +extern const struct dev_pm_ops imx8m_blk_ctrl_pm_ops; + +int imx8m_blk_ctrl_remove(struct platform_device *pdev); +int imx8m_blk_ctrl_probe(struct platform_device *pdev); + +#endif diff --git a/drivers/soc/imx/imx8mm-blk-ctrl.c b/drivers/soc/imx/imx8mm-blk= -ctrl.c new file mode 100644 index 000000000000..eb63d28b0157 --- /dev/null +++ b/drivers/soc/imx/imx8mm-blk-ctrl.c @@ -0,0 +1,173 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/* + * Copyright 2021 Pengutronix, Lucas Stach + * Copyright 2022 NXP, Abel Vesa + */ + +#include + +#include "imx8m-blk-ctrl.h" + +static int imx8mm_vpu_power_notifier(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct imx8m_blk_ctrl *bc =3D container_of(nb, struct imx8m_blk_ctrl, + power_nb); + + if (action !=3D GENPD_NOTIFY_ON && action !=3D GENPD_NOTIFY_PRE_OFF) + return NOTIFY_OK; + + /* + * The ADB in the VPUMIX domain has no separate reset and clock + * enable bits, but is ungated together with the VPU clocks. To + * allow the handshake with the GPC to progress we put the VPUs + * in reset and ungate the clocks. + */ + regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, BIT(0) | BIT(1) | BIT(2)); + regmap_set_bits(bc->regmap, BLK_CLK_EN, BIT(0) | BIT(1) | BIT(2)); + + if (action =3D=3D GENPD_NOTIFY_ON) { + /* + * On power up we have no software backchannel to the GPC to + * wait for the ADB handshake to happen, so we just delay for a + * bit. On power down the GPC driver waits for the handshake. + */ + udelay(5); + + /* set "fuse" bits to enable the VPUs */ + regmap_set_bits(bc->regmap, 0x8, 0xffffffff); + regmap_set_bits(bc->regmap, 0xc, 0xffffffff); + regmap_set_bits(bc->regmap, 0x10, 0xffffffff); + regmap_set_bits(bc->regmap, 0x14, 0xffffffff); + } + + return NOTIFY_OK; +} + +static const struct imx8m_blk_ctrl_domain_data imx8mm_vpu_blk_ctl_domain_d= ata[] =3D { + [IMX8MM_VPUBLK_PD_G1] =3D { + .name =3D "vpublk-g1", + .clk_names =3D (const char *[]){ "g1", }, + .num_clks =3D 1, + .gpc_name =3D "g1", + .rst_mask =3D BIT(1), + .clk_mask =3D BIT(1), + }, + [IMX8MM_VPUBLK_PD_G2] =3D { + .name =3D "vpublk-g2", + .clk_names =3D (const char *[]){ "g2", }, + .num_clks =3D 1, + .gpc_name =3D "g2", + .rst_mask =3D BIT(0), + .clk_mask =3D BIT(0), + }, + [IMX8MM_VPUBLK_PD_H1] =3D { + .name =3D "vpublk-h1", + .clk_names =3D (const char *[]){ "h1", }, + .num_clks =3D 1, + .gpc_name =3D "h1", + .rst_mask =3D BIT(2), + .clk_mask =3D BIT(2), + }, +}; + +static const struct imx8m_blk_ctrl_data imx8mm_vpu_blk_ctl_dev_data =3D { + .max_reg =3D 0x18, + .power_notifier_fn =3D imx8mm_vpu_power_notifier, + .domains =3D imx8mm_vpu_blk_ctl_domain_data, + .num_domains =3D ARRAY_SIZE(imx8mm_vpu_blk_ctl_domain_data), +}; + +static int imx8mm_disp_power_notifier(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct imx8m_blk_ctrl *bc =3D container_of(nb, struct imx8m_blk_ctrl, + power_nb); + + if (action !=3D GENPD_NOTIFY_ON && action !=3D GENPD_NOTIFY_PRE_OFF) + return NOTIFY_OK; + + /* Enable bus clock and deassert bus reset */ + regmap_set_bits(bc->regmap, BLK_CLK_EN, BIT(12)); + regmap_set_bits(bc->regmap, BLK_SFT_RSTN, BIT(6)); + + /* + * On power up we have no software backchannel to the GPC to + * wait for the ADB handshake to happen, so we just delay for a + * bit. On power down the GPC driver waits for the handshake. + */ + if (action =3D=3D GENPD_NOTIFY_ON) + udelay(5); + + + return NOTIFY_OK; +} + +static const struct imx8m_blk_ctrl_domain_data imx8mm_disp_blk_ctl_domain_= data[] =3D { + [IMX8MM_DISPBLK_PD_CSI_BRIDGE] =3D { + .name =3D "dispblk-csi-bridge", + .clk_names =3D (const char *[]){ "csi-bridge-axi", "csi-bridge-apb", + "csi-bridge-core", }, + .num_clks =3D 3, + .gpc_name =3D "csi-bridge", + .rst_mask =3D BIT(0) | BIT(1) | BIT(2), + .clk_mask =3D BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5), + }, + [IMX8MM_DISPBLK_PD_LCDIF] =3D { + .name =3D "dispblk-lcdif", + .clk_names =3D (const char *[]){ "lcdif-axi", "lcdif-apb", "lcdif-pix", = }, + .num_clks =3D 3, + .gpc_name =3D "lcdif", + .clk_mask =3D BIT(6) | BIT(7), + }, + [IMX8MM_DISPBLK_PD_MIPI_DSI] =3D { + .name =3D "dispblk-mipi-dsi", + .clk_names =3D (const char *[]){ "dsi-pclk", "dsi-ref", }, + .num_clks =3D 2, + .gpc_name =3D "mipi-dsi", + .rst_mask =3D BIT(5), + .clk_mask =3D BIT(8) | BIT(9), + .mipi_phy_rst_mask =3D BIT(17), + }, + [IMX8MM_DISPBLK_PD_MIPI_CSI] =3D { + .name =3D "dispblk-mipi-csi", + .clk_names =3D (const char *[]){ "csi-aclk", "csi-pclk" }, + .num_clks =3D 2, + .gpc_name =3D "mipi-csi", + .rst_mask =3D BIT(3) | BIT(4), + .clk_mask =3D BIT(10) | BIT(11), + .mipi_phy_rst_mask =3D BIT(16), + }, +}; + +static const struct imx8m_blk_ctrl_data imx8mm_disp_blk_ctl_dev_data =3D { + .max_reg =3D 0x2c, + .power_notifier_fn =3D imx8mm_disp_power_notifier, + .domains =3D imx8mm_disp_blk_ctl_domain_data, + .num_domains =3D ARRAY_SIZE(imx8mm_disp_blk_ctl_domain_data), +}; + +static const struct of_device_id imx8mm_blk_ctrl_of_match[] =3D { + { + .compatible =3D "fsl,imx8mm-vpu-blk-ctrl", + .data =3D &imx8mm_vpu_blk_ctl_dev_data + }, { + .compatible =3D "fsl,imx8mm-disp-blk-ctrl", + .data =3D &imx8mm_disp_blk_ctl_dev_data + }, { + /* Sentinel */ + } +}; +MODULE_DEVICE_TABLE(of, imx8mm_blk_ctrl_of_match); + +static struct platform_driver imx8mm_blk_ctrl_driver =3D { + .probe =3D imx8m_blk_ctrl_probe, + .remove =3D imx8m_blk_ctrl_remove, + .driver =3D { + .name =3D "imx8mm-blk-ctrl", + .pm =3D &imx8m_blk_ctrl_pm_ops, + .of_match_table =3D imx8mm_blk_ctrl_of_match, + }, +}; +module_platform_driver(imx8mm_blk_ctrl_driver); --=20 2.31.1 From nobody Tue Jun 30 08:09:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10D72C433EF for ; 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charset="utf-8" The imx8m-blk-ctrl driver was increasing in size with every new BLK CTRL addition for every SoC. Lets split the SoC specific parts into separate drivers. Do that for i.MX8MN now. Signed-off-by: Abel Vesa --- drivers/soc/imx/Kconfig | 7 +++ drivers/soc/imx/Makefile | 1 + drivers/soc/imx/imx8m-blk-ctrl.c | 93 --------------------------- drivers/soc/imx/imx8mn-blk-ctrl.c | 101 ++++++++++++++++++++++++++++++ 4 files changed, 109 insertions(+), 93 deletions(-) create mode 100644 drivers/soc/imx/imx8mn-blk-ctrl.c diff --git a/drivers/soc/imx/Kconfig b/drivers/soc/imx/Kconfig index b0cc53f3fc2c..8a3e0920b022 100644 --- a/drivers/soc/imx/Kconfig +++ b/drivers/soc/imx/Kconfig @@ -27,4 +27,11 @@ config SOC_IMX8MM_BLK_CTRL If you say yes here you get support for the NXP i.MX8MM BLK CTRL support. =20 +config SOC_IMX8MN_BLK_CTRL + bool "i.MX8MN SoC BLK CTRL support" + depends on SOC_IMX8M + help + If you say yes here you get support for the NXP i.MX8MN BLK CTRL + support. + endmenu diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile index 06c2970e6308..f5243bc5f08f 100644 --- a/drivers/soc/imx/Makefile +++ b/drivers/soc/imx/Makefile @@ -7,3 +7,4 @@ obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) +=3D gpcv2.o obj-$(CONFIG_SOC_IMX8M) +=3D soc-imx8m.o obj-$(CONFIG_SOC_IMX8M) +=3D imx8m-blk-ctrl.o obj-$(CONFIG_SOC_IMX8MM_BLK_CTRL) +=3D imx8mm-blk-ctrl.o +obj-$(CONFIG_SOC_IMX8MN_BLK_CTRL) +=3D imx8mn-blk-ctrl.o diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-c= trl.c index 599b2a9a38bb..ebdb044c6afa 100644 --- a/drivers/soc/imx/imx8m-blk-ctrl.c +++ b/drivers/soc/imx/imx8m-blk-ctrl.c @@ -6,8 +6,6 @@ =20 #include =20 -#include - #include "imx8m-blk-ctrl.h" =20 static inline struct imx8m_blk_ctrl_domain * @@ -322,94 +320,3 @@ static int imx8m_blk_ctrl_resume(struct device *dev) const struct dev_pm_ops imx8m_blk_ctrl_pm_ops =3D { SET_SYSTEM_SLEEP_PM_OPS(imx8m_blk_ctrl_suspend, imx8m_blk_ctrl_resume) }; - -static int imx8mn_disp_power_notifier(struct notifier_block *nb, - unsigned long action, void *data) -{ - struct imx8m_blk_ctrl *bc =3D container_of(nb, struct imx8m_blk_ctrl, - power_nb); - - if (action !=3D GENPD_NOTIFY_ON && action !=3D GENPD_NOTIFY_PRE_OFF) - return NOTIFY_OK; - - /* Enable bus clock and deassert bus reset */ - regmap_set_bits(bc->regmap, BLK_CLK_EN, BIT(8)); - regmap_set_bits(bc->regmap, BLK_SFT_RSTN, BIT(8)); - - /* - * On power up we have no software backchannel to the GPC to - * wait for the ADB handshake to happen, so we just delay for a - * bit. On power down the GPC driver waits for the handshake. - */ - if (action =3D=3D GENPD_NOTIFY_ON) - udelay(5); - - - return NOTIFY_OK; -} - -static const struct imx8m_blk_ctrl_domain_data imx8mn_disp_blk_ctl_domain_= data[] =3D { - [IMX8MN_DISPBLK_PD_MIPI_DSI] =3D { - .name =3D "dispblk-mipi-dsi", - .clk_names =3D (const char *[]){ "dsi-pclk", "dsi-ref", }, - .num_clks =3D 2, - .gpc_name =3D "mipi-dsi", - .rst_mask =3D BIT(0) | BIT(1), - .clk_mask =3D BIT(0) | BIT(1), - .mipi_phy_rst_mask =3D BIT(17), - }, - [IMX8MN_DISPBLK_PD_MIPI_CSI] =3D { - .name =3D "dispblk-mipi-csi", - .clk_names =3D (const char *[]){ "csi-aclk", "csi-pclk" }, - .num_clks =3D 2, - .gpc_name =3D "mipi-csi", - .rst_mask =3D BIT(2) | BIT(3), - .clk_mask =3D BIT(2) | BIT(3), - .mipi_phy_rst_mask =3D BIT(16), - }, - [IMX8MN_DISPBLK_PD_LCDIF] =3D { - .name =3D "dispblk-lcdif", - .clk_names =3D (const char *[]){ "lcdif-axi", "lcdif-apb", "lcdif-pix", = }, - .num_clks =3D 3, - .gpc_name =3D "lcdif", - .rst_mask =3D BIT(4) | BIT(5), - .clk_mask =3D BIT(4) | BIT(5), - }, - [IMX8MN_DISPBLK_PD_ISI] =3D { - .name =3D "dispblk-isi", - .clk_names =3D (const char *[]){ "disp_axi", "disp_apb", "disp_axi_root", - "disp_apb_root"}, - .num_clks =3D 4, - .gpc_name =3D "isi", - .rst_mask =3D BIT(6) | BIT(7), - .clk_mask =3D BIT(6) | BIT(7), - }, -}; - -static const struct imx8m_blk_ctrl_data imx8mn_disp_blk_ctl_dev_data =3D { - .max_reg =3D 0x84, - .power_notifier_fn =3D imx8mn_disp_power_notifier, - .domains =3D imx8mn_disp_blk_ctl_domain_data, - .num_domains =3D ARRAY_SIZE(imx8mn_disp_blk_ctl_domain_data), -}; - -static const struct of_device_id imx8m_blk_ctrl_of_match[] =3D { - { - .compatible =3D "fsl,imx8mn-disp-blk-ctrl", - .data =3D &imx8mn_disp_blk_ctl_dev_data - }, { - /* Sentinel */ - } -}; -MODULE_DEVICE_TABLE(of, imx8m_blk_ctrl_of_match); - -static struct platform_driver imx8m_blk_ctrl_driver =3D { - .probe =3D imx8m_blk_ctrl_probe, - .remove =3D imx8m_blk_ctrl_remove, - .driver =3D { - .name =3D "imx8m-blk-ctrl", - .pm =3D &imx8m_blk_ctrl_pm_ops, - .of_match_table =3D imx8m_blk_ctrl_of_match, - }, -}; -module_platform_driver(imx8m_blk_ctrl_driver); diff --git a/drivers/soc/imx/imx8mn-blk-ctrl.c b/drivers/soc/imx/imx8mn-blk= -ctrl.c new file mode 100644 index 000000000000..20f53cd4e387 --- /dev/null +++ b/drivers/soc/imx/imx8mn-blk-ctrl.c @@ -0,0 +1,101 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/* + * Copyright 2021 Pengutronix, Lucas Stach + * Copyright 2022 NXP, Abel Vesa + */ + +#include + +#include "imx8m-blk-ctrl.h" + +static int imx8mn_disp_power_notifier(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct imx8m_blk_ctrl *bc =3D container_of(nb, struct imx8m_blk_ctrl, + power_nb); + + if (action !=3D GENPD_NOTIFY_ON && action !=3D GENPD_NOTIFY_PRE_OFF) + return NOTIFY_OK; + + /* Enable bus clock and deassert bus reset */ + regmap_set_bits(bc->regmap, BLK_CLK_EN, BIT(8)); + regmap_set_bits(bc->regmap, BLK_SFT_RSTN, BIT(8)); + + /* + * On power up we have no software backchannel to the GPC to + * wait for the ADB handshake to happen, so we just delay for a + * bit. On power down the GPC driver waits for the handshake. + */ + if (action =3D=3D GENPD_NOTIFY_ON) + udelay(5); + + + return NOTIFY_OK; +} + +static const struct imx8m_blk_ctrl_domain_data imx8mn_disp_blk_ctl_domain_= data[] =3D { + [IMX8MN_DISPBLK_PD_MIPI_DSI] =3D { + .name =3D "dispblk-mipi-dsi", + .clk_names =3D (const char *[]){ "dsi-pclk", "dsi-ref", }, + .num_clks =3D 2, + .gpc_name =3D "mipi-dsi", + .rst_mask =3D BIT(0) | BIT(1), + .clk_mask =3D BIT(0) | BIT(1), + .mipi_phy_rst_mask =3D BIT(17), + }, + [IMX8MN_DISPBLK_PD_MIPI_CSI] =3D { + .name =3D "dispblk-mipi-csi", + .clk_names =3D (const char *[]){ "csi-aclk", "csi-pclk" }, + .num_clks =3D 2, + .gpc_name =3D "mipi-csi", + .rst_mask =3D BIT(2) | BIT(3), + .clk_mask =3D BIT(2) | BIT(3), + .mipi_phy_rst_mask =3D BIT(16), + }, + [IMX8MN_DISPBLK_PD_LCDIF] =3D { + .name =3D "dispblk-lcdif", + .clk_names =3D (const char *[]){ "lcdif-axi", "lcdif-apb", "lcdif-pix", = }, + .num_clks =3D 3, + .gpc_name =3D "lcdif", + .rst_mask =3D BIT(4) | BIT(5), + .clk_mask =3D BIT(4) | BIT(5), + }, + [IMX8MN_DISPBLK_PD_ISI] =3D { + .name =3D "dispblk-isi", + .clk_names =3D (const char *[]){ "disp_axi", "disp_apb", "disp_axi_root", + "disp_apb_root"}, + .num_clks =3D 4, + .gpc_name =3D "isi", + .rst_mask =3D BIT(6) | BIT(7), + .clk_mask =3D BIT(6) | BIT(7), + }, +}; + +static const struct imx8m_blk_ctrl_data imx8mn_disp_blk_ctl_dev_data =3D { + .max_reg =3D 0x84, + .power_notifier_fn =3D imx8mn_disp_power_notifier, + .domains =3D imx8mn_disp_blk_ctl_domain_data, + .num_domains =3D ARRAY_SIZE(imx8mn_disp_blk_ctl_domain_data), +}; + +static const struct of_device_id imx8mn_blk_ctrl_of_match[] =3D { + { + .compatible =3D "fsl,imx8mn-disp-blk-ctrl", + .data =3D &imx8mn_disp_blk_ctl_dev_data + }, { + /* Sentinel */ + } +}; +MODULE_DEVICE_TABLE(of, imx8mn_blk_ctrl_of_match); + +static struct platform_driver imx8mn_blk_ctrl_driver =3D { + .probe =3D imx8m_blk_ctrl_probe, + .remove =3D imx8m_blk_ctrl_remove, + .driver =3D { + .name =3D "imx8mn-blk-ctrl", + .pm =3D &imx8m_blk_ctrl_pm_ops, + .of_match_table =3D imx8mn_blk_ctrl_of_match, + }, +}; +module_platform_driver(imx8mn_blk_ctrl_driver); --=20 2.31.1 From nobody Tue Jun 30 08:09:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ECA7CC433F5 for ; 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charset="utf-8" By changing the prefix for every single generic API from "imx8m_" to "imx_" we suggest that it can be used by future i.MX SoC families. Signed-off-by: Abel Vesa --- drivers/soc/imx/Makefile | 2 +- .../imx/{imx8m-blk-ctrl.c =3D> imx-blk-ctrl.c} | 64 +++++++++---------- .../imx/{imx8m-blk-ctrl.h =3D> imx-blk-ctrl.h} | 24 +++---- drivers/soc/imx/imx8mm-blk-ctrl.c | 20 +++--- drivers/soc/imx/imx8mn-blk-ctrl.c | 14 ++-- 5 files changed, 62 insertions(+), 62 deletions(-) rename drivers/soc/imx/{imx8m-blk-ctrl.c =3D> imx-blk-ctrl.c} (79%) rename drivers/soc/imx/{imx8m-blk-ctrl.h =3D> imx-blk-ctrl.h} (72%) diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile index f5243bc5f08f..5cbcb14ab631 100644 --- a/drivers/soc/imx/Makefile +++ b/drivers/soc/imx/Makefile @@ -5,6 +5,6 @@ endif obj-$(CONFIG_HAVE_IMX_GPC) +=3D gpc.o obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) +=3D gpcv2.o obj-$(CONFIG_SOC_IMX8M) +=3D soc-imx8m.o -obj-$(CONFIG_SOC_IMX8M) +=3D imx8m-blk-ctrl.o +obj-$(CONFIG_SOC_IMX8M) +=3D imx-blk-ctrl.o obj-$(CONFIG_SOC_IMX8MM_BLK_CTRL) +=3D imx8mm-blk-ctrl.o obj-$(CONFIG_SOC_IMX8MN_BLK_CTRL) +=3D imx8mn-blk-ctrl.o diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx-blk-ctr= l.c similarity index 79% rename from drivers/soc/imx/imx8m-blk-ctrl.c rename to drivers/soc/imx/imx-blk-ctrl.c index ebdb044c6afa..58452a936085 100644 --- a/drivers/soc/imx/imx8m-blk-ctrl.c +++ b/drivers/soc/imx/imx-blk-ctrl.c @@ -6,19 +6,19 @@ =20 #include =20 -#include "imx8m-blk-ctrl.h" +#include "imx-blk-ctrl.h" =20 -static inline struct imx8m_blk_ctrl_domain * -to_imx8m_blk_ctrl_domain(struct generic_pm_domain *genpd) +static inline struct imx_blk_ctrl_domain * +to_imx_blk_ctrl_domain(struct generic_pm_domain *genpd) { - return container_of(genpd, struct imx8m_blk_ctrl_domain, genpd); + return container_of(genpd, struct imx_blk_ctrl_domain, genpd); } =20 -static int imx8m_blk_ctrl_power_on(struct generic_pm_domain *genpd) +static int imx_blk_ctrl_power_on(struct generic_pm_domain *genpd) { - struct imx8m_blk_ctrl_domain *domain =3D to_imx8m_blk_ctrl_domain(genpd); - const struct imx8m_blk_ctrl_domain_data *data =3D domain->data; - struct imx8m_blk_ctrl *bc =3D domain->bc; + struct imx_blk_ctrl_domain *domain =3D to_imx_blk_ctrl_domain(genpd); + const struct imx_blk_ctrl_domain_data *data =3D domain->data; + struct imx_blk_ctrl *bc =3D domain->bc; int ret; =20 /* make sure bus domain is awake */ @@ -70,11 +70,11 @@ static int imx8m_blk_ctrl_power_on(struct generic_pm_do= main *genpd) return ret; } =20 -static int imx8m_blk_ctrl_power_off(struct generic_pm_domain *genpd) +static int imx_blk_ctrl_power_off(struct generic_pm_domain *genpd) { - struct imx8m_blk_ctrl_domain *domain =3D to_imx8m_blk_ctrl_domain(genpd); - const struct imx8m_blk_ctrl_domain_data *data =3D domain->data; - struct imx8m_blk_ctrl *bc =3D domain->bc; + struct imx_blk_ctrl_domain *domain =3D to_imx_blk_ctrl_domain(genpd); + const struct imx_blk_ctrl_domain_data *data =3D domain->data; + struct imx_blk_ctrl *bc =3D domain->bc; =20 /* put devices into reset and disable clocks */ if (data->mipi_phy_rst_mask) @@ -93,7 +93,7 @@ static int imx8m_blk_ctrl_power_off(struct generic_pm_dom= ain *genpd) } =20 static struct generic_pm_domain * -imx8m_blk_ctrl_xlate(struct of_phandle_args *args, void *data) +imx_blk_ctrl_xlate(struct of_phandle_args *args, void *data) { struct genpd_onecell_data *onecell_data =3D data; unsigned int index =3D args->args[0]; @@ -107,11 +107,11 @@ imx8m_blk_ctrl_xlate(struct of_phandle_args *args, vo= id *data) =20 static struct lock_class_key blk_ctrl_genpd_lock_class; =20 -int imx8m_blk_ctrl_probe(struct platform_device *pdev) +int imx_blk_ctrl_probe(struct platform_device *pdev) { - const struct imx8m_blk_ctrl_data *bc_data; + const struct imx_blk_ctrl_data *bc_data; struct device *dev =3D &pdev->dev; - struct imx8m_blk_ctrl *bc; + struct imx_blk_ctrl *bc; void __iomem *base; int i, ret; =20 @@ -140,13 +140,13 @@ int imx8m_blk_ctrl_probe(struct platform_device *pdev) "failed to init regmap\n"); =20 bc->domains =3D devm_kcalloc(dev, bc_data->num_domains, - sizeof(struct imx8m_blk_ctrl_domain), + sizeof(struct imx_blk_ctrl_domain), GFP_KERNEL); if (!bc->domains) return -ENOMEM; =20 bc->onecell_data.num_domains =3D bc_data->num_domains; - bc->onecell_data.xlate =3D imx8m_blk_ctrl_xlate; + bc->onecell_data.xlate =3D imx_blk_ctrl_xlate; bc->onecell_data.domains =3D devm_kcalloc(dev, bc_data->num_domains, sizeof(struct generic_pm_domain *), GFP_KERNEL); @@ -159,8 +159,8 @@ int imx8m_blk_ctrl_probe(struct platform_device *pdev) "failed to attach power domain\n"); =20 for (i =3D 0; i < bc_data->num_domains; i++) { - const struct imx8m_blk_ctrl_domain_data *data =3D &bc_data->domains[i]; - struct imx8m_blk_ctrl_domain *domain =3D &bc->domains[i]; + const struct imx_blk_ctrl_domain_data *data =3D &bc_data->domains[i]; + struct imx_blk_ctrl_domain *domain =3D &bc->domains[i]; int j; =20 domain->data =3D data; @@ -184,8 +184,8 @@ int imx8m_blk_ctrl_probe(struct platform_device *pdev) } =20 domain->genpd.name =3D data->name; - domain->genpd.power_on =3D imx8m_blk_ctrl_power_on; - domain->genpd.power_off =3D imx8m_blk_ctrl_power_off; + domain->genpd.power_on =3D imx_blk_ctrl_power_on; + domain->genpd.power_off =3D imx_blk_ctrl_power_off; domain->bc =3D bc; =20 ret =3D pm_genpd_init(&domain->genpd, NULL, true); @@ -241,15 +241,15 @@ int imx8m_blk_ctrl_probe(struct platform_device *pdev) return ret; } =20 -int imx8m_blk_ctrl_remove(struct platform_device *pdev) +int imx_blk_ctrl_remove(struct platform_device *pdev) { - struct imx8m_blk_ctrl *bc =3D dev_get_drvdata(&pdev->dev); + struct imx_blk_ctrl *bc =3D dev_get_drvdata(&pdev->dev); int i; =20 of_genpd_del_provider(pdev->dev.of_node); =20 for (i =3D 0; bc->onecell_data.num_domains; i++) { - struct imx8m_blk_ctrl_domain *domain =3D &bc->domains[i]; + struct imx_blk_ctrl_domain *domain =3D &bc->domains[i]; =20 pm_genpd_remove(&domain->genpd); dev_pm_domain_detach(domain->power_dev, true); @@ -263,9 +263,9 @@ int imx8m_blk_ctrl_remove(struct platform_device *pdev) } =20 #ifdef CONFIG_PM_SLEEP -static int imx8m_blk_ctrl_suspend(struct device *dev) +static int imx_blk_ctrl_suspend(struct device *dev) { - struct imx8m_blk_ctrl *bc =3D dev_get_drvdata(dev); + struct imx_blk_ctrl *bc =3D dev_get_drvdata(dev); int ret, i; =20 /* @@ -283,7 +283,7 @@ static int imx8m_blk_ctrl_suspend(struct device *dev) } =20 for (i =3D 0; i < bc->onecell_data.num_domains; i++) { - struct imx8m_blk_ctrl_domain *domain =3D &bc->domains[i]; + struct imx_blk_ctrl_domain *domain =3D &bc->domains[i]; =20 ret =3D pm_runtime_get_sync(domain->power_dev); if (ret < 0) { @@ -303,9 +303,9 @@ static int imx8m_blk_ctrl_suspend(struct device *dev) return ret; } =20 -static int imx8m_blk_ctrl_resume(struct device *dev) +static int imx_blk_ctrl_resume(struct device *dev) { - struct imx8m_blk_ctrl *bc =3D dev_get_drvdata(dev); + struct imx_blk_ctrl *bc =3D dev_get_drvdata(dev); int i; =20 for (i =3D 0; i < bc->onecell_data.num_domains; i++) @@ -317,6 +317,6 @@ static int imx8m_blk_ctrl_resume(struct device *dev) } #endif =20 -const struct dev_pm_ops imx8m_blk_ctrl_pm_ops =3D { - SET_SYSTEM_SLEEP_PM_OPS(imx8m_blk_ctrl_suspend, imx8m_blk_ctrl_resume) +const struct dev_pm_ops imx_blk_ctrl_pm_ops =3D { + SET_SYSTEM_SLEEP_PM_OPS(imx_blk_ctrl_suspend, imx_blk_ctrl_resume) }; diff --git a/drivers/soc/imx/imx8m-blk-ctrl.h b/drivers/soc/imx/imx-blk-ctr= l.h similarity index 72% rename from drivers/soc/imx/imx8m-blk-ctrl.h rename to drivers/soc/imx/imx-blk-ctrl.h index 618b3429bb69..8b70e072db1c 100644 --- a/drivers/soc/imx/imx8m-blk-ctrl.h +++ b/drivers/soc/imx/imx-blk-ctrl.h @@ -18,18 +18,18 @@ #define BLK_CLK_EN 0x4 #define BLK_MIPI_RESET_DIV 0x8 /* Mini/Nano DISPLAY_BLK_CTRL only */ =20 -struct imx8m_blk_ctrl_domain; +struct imx_blk_ctrl_domain; =20 -struct imx8m_blk_ctrl { +struct imx_blk_ctrl { struct device *dev; struct notifier_block power_nb; struct device *bus_power_dev; struct regmap *regmap; - struct imx8m_blk_ctrl_domain *domains; + struct imx_blk_ctrl_domain *domains; struct genpd_onecell_data onecell_data; }; =20 -struct imx8m_blk_ctrl_domain_data { +struct imx_blk_ctrl_domain_data { const char *name; const char * const *clk_names; int num_clks; @@ -49,24 +49,24 @@ struct imx8m_blk_ctrl_domain_data { =20 #define DOMAIN_MAX_CLKS 3 =20 -struct imx8m_blk_ctrl_domain { +struct imx_blk_ctrl_domain { struct generic_pm_domain genpd; - const struct imx8m_blk_ctrl_domain_data *data; + const struct imx_blk_ctrl_domain_data *data; struct clk_bulk_data clks[DOMAIN_MAX_CLKS]; struct device *power_dev; - struct imx8m_blk_ctrl *bc; + struct imx_blk_ctrl *bc; }; =20 -struct imx8m_blk_ctrl_data { +struct imx_blk_ctrl_data { int max_reg; notifier_fn_t power_notifier_fn; - const struct imx8m_blk_ctrl_domain_data *domains; + const struct imx_blk_ctrl_domain_data *domains; int num_domains; }; =20 -extern const struct dev_pm_ops imx8m_blk_ctrl_pm_ops; +extern const struct dev_pm_ops imx_blk_ctrl_pm_ops; =20 -int imx8m_blk_ctrl_remove(struct platform_device *pdev); -int imx8m_blk_ctrl_probe(struct platform_device *pdev); +int imx_blk_ctrl_remove(struct platform_device *pdev); +int imx_blk_ctrl_probe(struct platform_device *pdev); =20 #endif diff --git a/drivers/soc/imx/imx8mm-blk-ctrl.c b/drivers/soc/imx/imx8mm-blk= -ctrl.c index eb63d28b0157..15f1e431c1f3 100644 --- a/drivers/soc/imx/imx8mm-blk-ctrl.c +++ b/drivers/soc/imx/imx8mm-blk-ctrl.c @@ -7,12 +7,12 @@ =20 #include =20 -#include "imx8m-blk-ctrl.h" +#include "imx-blk-ctrl.h" =20 static int imx8mm_vpu_power_notifier(struct notifier_block *nb, unsigned long action, void *data) { - struct imx8m_blk_ctrl *bc =3D container_of(nb, struct imx8m_blk_ctrl, + struct imx_blk_ctrl *bc =3D container_of(nb, struct imx_blk_ctrl, power_nb); =20 if (action !=3D GENPD_NOTIFY_ON && action !=3D GENPD_NOTIFY_PRE_OFF) @@ -45,7 +45,7 @@ static int imx8mm_vpu_power_notifier(struct notifier_bloc= k *nb, return NOTIFY_OK; } =20 -static const struct imx8m_blk_ctrl_domain_data imx8mm_vpu_blk_ctl_domain_d= ata[] =3D { +static const struct imx_blk_ctrl_domain_data imx8mm_vpu_blk_ctl_domain_dat= a[] =3D { [IMX8MM_VPUBLK_PD_G1] =3D { .name =3D "vpublk-g1", .clk_names =3D (const char *[]){ "g1", }, @@ -72,7 +72,7 @@ static const struct imx8m_blk_ctrl_domain_data imx8mm_vpu= _blk_ctl_domain_data[] }, }; =20 -static const struct imx8m_blk_ctrl_data imx8mm_vpu_blk_ctl_dev_data =3D { +static const struct imx_blk_ctrl_data imx8mm_vpu_blk_ctl_dev_data =3D { .max_reg =3D 0x18, .power_notifier_fn =3D imx8mm_vpu_power_notifier, .domains =3D imx8mm_vpu_blk_ctl_domain_data, @@ -82,7 +82,7 @@ static const struct imx8m_blk_ctrl_data imx8mm_vpu_blk_ct= l_dev_data =3D { static int imx8mm_disp_power_notifier(struct notifier_block *nb, unsigned long action, void *data) { - struct imx8m_blk_ctrl *bc =3D container_of(nb, struct imx8m_blk_ctrl, + struct imx_blk_ctrl *bc =3D container_of(nb, struct imx_blk_ctrl, power_nb); =20 if (action !=3D GENPD_NOTIFY_ON && action !=3D GENPD_NOTIFY_PRE_OFF) @@ -104,7 +104,7 @@ static int imx8mm_disp_power_notifier(struct notifier_b= lock *nb, return NOTIFY_OK; } =20 -static const struct imx8m_blk_ctrl_domain_data imx8mm_disp_blk_ctl_domain_= data[] =3D { +static const struct imx_blk_ctrl_domain_data imx8mm_disp_blk_ctl_domain_da= ta[] =3D { [IMX8MM_DISPBLK_PD_CSI_BRIDGE] =3D { .name =3D "dispblk-csi-bridge", .clk_names =3D (const char *[]){ "csi-bridge-axi", "csi-bridge-apb", @@ -141,7 +141,7 @@ static const struct imx8m_blk_ctrl_domain_data imx8mm_d= isp_blk_ctl_domain_data[] }, }; =20 -static const struct imx8m_blk_ctrl_data imx8mm_disp_blk_ctl_dev_data =3D { +static const struct imx_blk_ctrl_data imx8mm_disp_blk_ctl_dev_data =3D { .max_reg =3D 0x2c, .power_notifier_fn =3D imx8mm_disp_power_notifier, .domains =3D imx8mm_disp_blk_ctl_domain_data, @@ -162,11 +162,11 @@ static const struct of_device_id imx8mm_blk_ctrl_of_m= atch[] =3D { MODULE_DEVICE_TABLE(of, imx8mm_blk_ctrl_of_match); =20 static struct platform_driver imx8mm_blk_ctrl_driver =3D { - .probe =3D imx8m_blk_ctrl_probe, - .remove =3D imx8m_blk_ctrl_remove, + .probe =3D imx_blk_ctrl_probe, + .remove =3D imx_blk_ctrl_remove, .driver =3D { .name =3D "imx8mm-blk-ctrl", - .pm =3D &imx8m_blk_ctrl_pm_ops, + .pm =3D &imx_blk_ctrl_pm_ops, .of_match_table =3D imx8mm_blk_ctrl_of_match, }, }; diff --git a/drivers/soc/imx/imx8mn-blk-ctrl.c b/drivers/soc/imx/imx8mn-blk= -ctrl.c index 20f53cd4e387..932b81515792 100644 --- a/drivers/soc/imx/imx8mn-blk-ctrl.c +++ b/drivers/soc/imx/imx8mn-blk-ctrl.c @@ -7,12 +7,12 @@ =20 #include =20 -#include "imx8m-blk-ctrl.h" +#include "imx-blk-ctrl.h" =20 static int imx8mn_disp_power_notifier(struct notifier_block *nb, unsigned long action, void *data) { - struct imx8m_blk_ctrl *bc =3D container_of(nb, struct imx8m_blk_ctrl, + struct imx_blk_ctrl *bc =3D container_of(nb, struct imx_blk_ctrl, power_nb); =20 if (action !=3D GENPD_NOTIFY_ON && action !=3D GENPD_NOTIFY_PRE_OFF) @@ -34,7 +34,7 @@ static int imx8mn_disp_power_notifier(struct notifier_blo= ck *nb, return NOTIFY_OK; } =20 -static const struct imx8m_blk_ctrl_domain_data imx8mn_disp_blk_ctl_domain_= data[] =3D { +static const struct imx_blk_ctrl_domain_data imx8mn_disp_blk_ctl_domain_da= ta[] =3D { [IMX8MN_DISPBLK_PD_MIPI_DSI] =3D { .name =3D "dispblk-mipi-dsi", .clk_names =3D (const char *[]){ "dsi-pclk", "dsi-ref", }, @@ -72,7 +72,7 @@ static const struct imx8m_blk_ctrl_domain_data imx8mn_dis= p_blk_ctl_domain_data[] }, }; =20 -static const struct imx8m_blk_ctrl_data imx8mn_disp_blk_ctl_dev_data =3D { +static const struct imx_blk_ctrl_data imx8mn_disp_blk_ctl_dev_data =3D { .max_reg =3D 0x84, .power_notifier_fn =3D imx8mn_disp_power_notifier, .domains =3D imx8mn_disp_blk_ctl_domain_data, @@ -90,11 +90,11 @@ static const struct of_device_id imx8mn_blk_ctrl_of_mat= ch[] =3D { MODULE_DEVICE_TABLE(of, imx8mn_blk_ctrl_of_match); =20 static struct platform_driver imx8mn_blk_ctrl_driver =3D { - .probe =3D imx8m_blk_ctrl_probe, - .remove =3D imx8m_blk_ctrl_remove, + .probe =3D imx_blk_ctrl_probe, + .remove =3D imx_blk_ctrl_remove, .driver =3D { .name =3D "imx8mn-blk-ctrl", - .pm =3D &imx8m_blk_ctrl_pm_ops, + .pm =3D &imx_blk_ctrl_pm_ops, .of_match_table =3D imx8mn_blk_ctrl_of_match, }, }; --=20 2.31.1