From nobody Tue Jun 30 12:08:07 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0180EC433EF for ; Tue, 18 Jan 2022 09:55:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235258AbiARJzM (ORCPT ); Tue, 18 Jan 2022 04:55:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50026 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234640AbiARJzK (ORCPT ); Tue, 18 Jan 2022 04:55:10 -0500 Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97DA3C06161C for ; Tue, 18 Jan 2022 01:55:09 -0800 (PST) Received: by mail-ed1-x536.google.com with SMTP id u21so76906632edd.5 for ; Tue, 18 Jan 2022 01:55:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gFGsugHXHNFuRFx4hHuDIfTzJdjawgvKHVHNvYFVuVA=; b=qVIHUaepCN0HqkZNKvU8ObV6khhWZ37zrRJSGg04Y6fi4JwTrl3Ja2/LlPybNdKfvv /GevgzLzoNVsfQr5Q97ySxTvXikXobpRqcc8Pti5900PnNzrUimxoyINJK8W/Nzpz3qe 0tpTSJvRsL3uYuB4orG9DjnY4VeWIrjbKOFfQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gFGsugHXHNFuRFx4hHuDIfTzJdjawgvKHVHNvYFVuVA=; b=4t9vBjxLEVYtwEeiIFzaNHRqQXnsESzzSJZ9iiLFNx/6VEqNUwsBBUZ/7sj9vS8c+3 /HL6HSRnOvesCgAIhIms/OEiRV5tV0EbPalX0gbhsUVryaub9RMTvsIlgBz5kHQpw/Fv T8bE0a6wOpFWkZ2bL1FQwU+rrl4yC80iWlwR96viegfoqUdWS1/RJUPrVQcJMJdODvfk C9zt+xZ6T0831uPcWsm129XoZoMW8qyIE0VhTBbe2Z1DdR3kHjfOx+zSYEx8ImpEcMqd 5jITesAYhCLK6HG718R2QgLYA92tsZ/RJ5bfQdvFyxZm7rI+HdsiQYcpm7sGvJOUPDbW T1RQ== X-Gm-Message-State: AOAM5300+sT8cUoWns9abiHDyrHA8CKXBmoU44zwepOP3chYQgqWQqg7 tZyk3scs9jX7UxJjVXKwNsxGaPPQb+J4Mg== X-Google-Smtp-Source: ABdhPJyPeinfZ9O9gFd8mP62imIiuC1JcRKYr8SXHZwMuK6NI61glNVbnVUNBfzAo5J/X2HEUy6Zww== X-Received: by 2002:a17:907:e8a:: with SMTP id ho10mr20836082ejc.105.1642499708031; Tue, 18 Jan 2022 01:55:08 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-52-8-210.retail.telecomitalia.it. [82.52.8.210]) by smtp.gmail.com with ESMTPSA id w3sm5173520eji.134.2022.01.18.01.55.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Jan 2022 01:55:07 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Michael Trimarchi , Dario Binacchi , Sascha Hauer , Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Shawn Guo , Stephen Boyd , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/4] ARM: dts: imx28: reparent gpmi clock to ref_gpmi Date: Tue, 18 Jan 2022 10:54:31 +0100 Message-Id: <20220118095434.35081-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220118095434.35081-1-dario.binacchi@amarulasolutions.com> References: <20220118095434.35081-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Since ref_gpmi is sourced from pll0 (480MHz), It allows the GPMI controller to manage High-Speed =E2=80=8B=E2=80=8BNAND Timing (edo mode 3,4= and 5). Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi Tested-by: Sascha Hauer Reviewed-by: Sascha Hauer --- arch/arm/boot/dts/imx28.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 84d0176d5193..130b4145af82 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -110,6 +110,8 @@ gpmi: nand-controller@8000c000 { interrupt-names =3D "bch"; clocks =3D <&clks 50>; clock-names =3D "gpmi_io"; + assigned-clocks =3D <&clks 13>; + assigned-clock-parents =3D <&clks 10>; dmas =3D <&dma_apbh 4>; dma-names =3D "rx-tx"; status =3D "disabled"; --=20 2.32.0 From nobody Tue Jun 30 12:08:07 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F841C433EF for ; Tue, 18 Jan 2022 09:55:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236497AbiARJzR (ORCPT ); Tue, 18 Jan 2022 04:55:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50030 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234719AbiARJzL (ORCPT ); Tue, 18 Jan 2022 04:55:11 -0500 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFDE5C061574 for ; Tue, 18 Jan 2022 01:55:10 -0800 (PST) Received: by mail-ed1-x52a.google.com with SMTP id m4so76829520edb.10 for ; Tue, 18 Jan 2022 01:55:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xehe2GRXgQYN/+dRP8wnpXRUBfEHFaQIKrZHmlK7Gkc=; b=NMnFrZh7b8z20cbVj3sAC5udzo0Oe3RiHbKJ4a7YROrEsX9NWwDvwnCQauIsX7znwX vfO8jWzwD6YjeImeo1BVOO6VmJcl/7gO8SyZKMwLtURaGByFHq4k1jzlGCGqkWaTP8qP 7BpUqTWIqmaj5zYmvIzm/tj+dQtEMK8YpLQqQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xehe2GRXgQYN/+dRP8wnpXRUBfEHFaQIKrZHmlK7Gkc=; b=BLhMHzZ0XxZBGMIn0PYj5ddEvAP1DgE+oVUMpzhDBEz6raCQQjf+0wqrZvv/Z/hybh kDCxUklB74jlse/B/mQjyEkdXdHN+hB/Pl37EQ93Z5IgHxfuG6h20IwVy7Pv1n9VsQ4p FCElm95NqaBenLYaJyypIxj4A7mPruuAmDjMOPdbtHcgDpK9AFJaZkGODQeghl7dhqq+ fGkwqP0siUxiYUI5KtwqUcE60T7SVJgG+7tCNPS01v+IStmPxTQgGbAyW66exp7lnpNM nYwXG9SynNZmnKVDdaq2m3s5ZA7LXR9jTwCy1MiWDrc2eOwLBAWXgXwCQ5xz2Ej1ya0N 8t7w== X-Gm-Message-State: AOAM532RiLwgpJT4bvKNTUDNBF23e9SNf0Kg0SbuGuAkgVB2tGYszM26 +uOfro5nkfcRb3ZHMR7R8Ft0VhiFpAtxoQ== X-Google-Smtp-Source: ABdhPJwWEKhNqf1JZzX3FA0R0DGU3cjYeegcCormXg5HGMlO+9TulADkuk8ct4HcDBxgzuptFuLYHg== X-Received: by 2002:a17:906:4983:: with SMTP id p3mr20017289eju.589.1642499709124; Tue, 18 Jan 2022 01:55:09 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-52-8-210.retail.telecomitalia.it. [82.52.8.210]) by smtp.gmail.com with ESMTPSA id w3sm5173520eji.134.2022.01.18.01.55.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Jan 2022 01:55:08 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Michael Trimarchi , Dario Binacchi , Sascha Hauer , Boris Brezillon , Han Xu , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org Subject: [PATCH 2/4] mtd: rawnand: gpmi: fix controller timings setting Date: Tue, 18 Jan 2022 10:54:32 +0100 Message-Id: <20220118095434.35081-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220118095434.35081-1-dario.binacchi@amarulasolutions.com> References: <20220118095434.35081-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Set the controller registers according to the real clock rate. The controller registers configuration (setup, hold, timeout, ... cycles) depends on the clock rate of the GPMI. Using the real rate instead of the ideal one, avoids that this inaccuracy (required_rate - real_rate) affects the registers setting. This patch has been tested on two custom boards with i.MX28 and i.MX6 SOCs: - i.MX28: required rate 100MHz, real rate 99.3MHz - i.MX6 required rate 100MHz, real rate 99MHz Fixes: b1206122069a ("mtd: rawnand: gpmi: use core timings instead of an em= pirical derivation") Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi Tested-by: Sascha Hauer Reviewed-by: Sascha Hauer --- drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/= raw/gpmi-nand/gpmi-nand.c index 1b64c5a5140d..73c3bf59b55e 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -648,6 +648,7 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_d= ata *this, const struct nand_sdr_timings *sdr) { struct gpmi_nfc_hardware_timing *hw =3D &this->hw; + struct resources *r =3D &this->resources; unsigned int dll_threshold_ps =3D this->devdata->max_chain_delay; unsigned int period_ps, reference_period_ps; unsigned int data_setup_cycles, data_hold_cycles, addr_setup_cycles; @@ -671,6 +672,8 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_d= ata *this, wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; } =20 + hw->clk_rate =3D clk_round_rate(r->clock[0], hw->clk_rate); + /* SDR core timings are given in picoseconds */ period_ps =3D div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); =20 --=20 2.32.0 From nobody Tue Jun 30 12:08:07 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0FC5CC433EF for ; Tue, 18 Jan 2022 09:55:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236389AbiARJzT (ORCPT ); Tue, 18 Jan 2022 04:55:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50046 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234608AbiARJzM (ORCPT ); Tue, 18 Jan 2022 04:55:12 -0500 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [IPv6:2a00:1450:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD68CC061401 for ; Tue, 18 Jan 2022 01:55:11 -0800 (PST) Received: by mail-ed1-x52f.google.com with SMTP id b13so77183862edn.0 for ; Tue, 18 Jan 2022 01:55:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kSvqY/5S0QFADP0pgb9XGlsw5TRpNqIg0fhRE44Mq5E=; b=l6u/e5IOPb+4gYA90QO5gRDCDZXCQ2zmHpYzQdG9BtlyR/mS8/p+Xvg8CbMFf+/sgU bu8oZhR30WEC8m3SitZUyZDQfTVKtg67sM29IKiiw+/9HtTqoF81wbsGI50rSPgMwkX1 nNI52OYRWktjsHsISt0frQEp4QwPn7i+hN5AI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kSvqY/5S0QFADP0pgb9XGlsw5TRpNqIg0fhRE44Mq5E=; b=DDaFb0oXWSG2zOZ+883QOPd228IJ+uLMUcsDhOimdAvUmBRiK0EXt/j0keHB2wOyyz TJlJzrUlJIKdkO16cAhWTCPzKnlR+4ooNOO6IHWXFVtLEgIabtxqW+RV+b8iML4A4CDo SV1vyP9t5HwZ0cPKgh2sXCyGukd69u/sWns/BHk9fZQx6WXT6u2vTYjb7ukCuq2OTgoY oxQDmpOxGT5ujWMJ2ncyrjxaHpaODa8JqPigpoRdX+VUIg0PzeE3bN/VTe4qbMrOl+T8 dw6NbecFzrGjkJoQ8l3LiyrHU/Z7BAToKbhCiXDg5exYK4eENr2wli8+QtCN/4v6m1xN TjEw== X-Gm-Message-State: AOAM530ohuTjIaEIafIuaP99zB94fedYL+NcRhTeB0XRaKCfzNDzds0R WzLwEcox8uAaLUw/eidc9Qz5pE6K/JHG3Q== X-Google-Smtp-Source: ABdhPJwj0kpN9v1eErF/ySo+HicD0yhDGIvcY/CcHCimzle6yodFZvEqmagNXGojVGD7SSZ3TId/qg== X-Received: by 2002:a17:907:9809:: with SMTP id ji9mr19842129ejc.142.1642499710202; Tue, 18 Jan 2022 01:55:10 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-52-8-210.retail.telecomitalia.it. [82.52.8.210]) by smtp.gmail.com with ESMTPSA id w3sm5173520eji.134.2022.01.18.01.55.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Jan 2022 01:55:09 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Michael Trimarchi , Dario Binacchi , Sascha Hauer , Han Xu , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org Subject: [PATCH 3/4] mtd: rawnand: gpmi: validate controller clock rate Date: Tue, 18 Jan 2022 10:54:33 +0100 Message-Id: <20220118095434.35081-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220118095434.35081-1-dario.binacchi@amarulasolutions.com> References: <20220118095434.35081-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" What to do when the real rate of the gpmi clock is not equal to the required one? The solutions proposed in [1] did not lead to a conclusion on how to validate the clock rate, so, inspired by the document [2], I consider the rate correct only if not lower or equal to the rate of the previous edo mode. In fact, in chapter 4.16.2 (NV-DDR) of the document [2], it is written that "If the host selects timing mode n, then its clock period shall be faster than the clock period of timing mode n-1 and slower than or equal to the clock period of timing mode n.". I thought that it could therefore also be used in this case, without therefore having to define the valid rate ranges empirically. For example, suppose that gpmi_nfc_compute_timings() is called to set edo mode 5 (100MHz) but the rate returned by clk_round_rate() is 80MHz (edo mode 4). In this case gpmi_nfc_compute_timings() will return error, and will be called again to set edo mode 4, which this time will be successful. [1] https://lore.kernel.org/r/20210702065350.209646-5-ebiggers@kernel.org [2] http://www.onfi.org/-/media/client/onfi/specs/onfi_3_0_gold.pdf?la=3Den Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi Tested-by: Sascha Hauer Reviewed-by: Sascha Hauer --- drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/= raw/gpmi-nand/gpmi-nand.c index 73c3bf59b55e..cf35f4206030 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -644,8 +644,8 @@ static int bch_set_geometry(struct gpmi_nand_data *this) * RDN_DELAY =3D ----------------------- {3} * RP */ -static void gpmi_nfc_compute_timings(struct gpmi_nand_data *this, - const struct nand_sdr_timings *sdr) +static int gpmi_nfc_compute_timings(struct gpmi_nand_data *this, + const struct nand_sdr_timings *sdr) { struct gpmi_nfc_hardware_timing *hw =3D &this->hw; struct resources *r =3D &this->resources; @@ -657,23 +657,33 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand= _data *this, int sample_delay_ps, sample_delay_factor; u16 busy_timeout_cycles; u8 wrn_dly_sel; + unsigned long clk_rate, min_rate; =20 if (sdr->tRC_min >=3D 30000) { /* ONFI non-EDO modes [0-3] */ hw->clk_rate =3D 22000000; + min_rate =3D 0; wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_4_TO_8NS; } else if (sdr->tRC_min >=3D 25000) { /* ONFI EDO mode 4 */ hw->clk_rate =3D 80000000; + min_rate =3D 22000000; wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; } else { /* ONFI EDO mode 5 */ hw->clk_rate =3D 100000000; + min_rate =3D 80000000; wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; } =20 - hw->clk_rate =3D clk_round_rate(r->clock[0], hw->clk_rate); + clk_rate =3D clk_round_rate(r->clock[0], hw->clk_rate); + if (clk_rate <=3D min_rate) { + dev_err(this->dev, "clock setting: expected %ld, got %ld\n", + hw->clk_rate, clk_rate); + return -ENOTSUPP; + } =20 + hw->clk_rate =3D clk_rate; /* SDR core timings are given in picoseconds */ period_ps =3D div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); =20 @@ -714,6 +724,7 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_d= ata *this, hw->ctrl1n |=3D BF_GPMI_CTRL1_RDN_DELAY(sample_delay_factor) | BM_GPMI_CTRL1_DLL_ENABLE | (use_half_period ? BM_GPMI_CTRL1_HALF_PERIOD : 0); + return 0; } =20 static int gpmi_nfc_apply_timings(struct gpmi_nand_data *this) @@ -769,6 +780,7 @@ static int gpmi_setup_interface(struct nand_chip *chip,= int chipnr, { struct gpmi_nand_data *this =3D nand_get_controller_data(chip); const struct nand_sdr_timings *sdr; + int ret; =20 /* Retrieve required NAND timings */ sdr =3D nand_get_sdr_timings(conf); @@ -784,7 +796,9 @@ static int gpmi_setup_interface(struct nand_chip *chip,= int chipnr, return 0; =20 /* Do the actual derivation of the controller timings */ - gpmi_nfc_compute_timings(this, sdr); + ret =3D gpmi_nfc_compute_timings(this, sdr); + if (ret) + return ret; =20 this->hw.must_apply_timings =3D true; =20 --=20 2.32.0 From nobody Tue Jun 30 12:08:07 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68C09C433EF for ; Tue, 18 Jan 2022 09:55:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236763AbiARJzW (ORCPT ); Tue, 18 Jan 2022 04:55:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50062 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236462AbiARJzP (ORCPT ); Tue, 18 Jan 2022 04:55:15 -0500 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 02173C061748 for ; Tue, 18 Jan 2022 01:55:13 -0800 (PST) Received: by mail-ed1-x52a.google.com with SMTP id b13so77184075edn.0 for ; Tue, 18 Jan 2022 01:55:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gS+McM99BOsxvgHxeM4x0busg1n4mFja6rUY4zotoT4=; b=ZSEH8tiAoctr1Ec2wZ8zFylBCoSFuEj9+zg3vdt9ziHlmbbcDITIMOJN/df6wna54c j+8+LTG3J04j2sWDJMga11YnnHXzUPSaQLC1tC+R/LCSElwitRxA+xsoOov0NdfEdF7l DhF5/2gHDaXCg0o0SQN3CCp+S7v1HBSCYnEpg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gS+McM99BOsxvgHxeM4x0busg1n4mFja6rUY4zotoT4=; b=z3Y1jUOYQ8/w+8b5aCw/y5XyGvXZA6KV2WItF8iaU49dg+wujN6o4KYlbnPQfPsTzG GZEsGnt0l46De+psRxWDcN4VyY1UCrgD3/r3IRxQt+WX08q3zMzruEsnqbjiuU9QoTyR ijIVZ4KCTyXaJta5SnxWc9aesoiChCkyCxx1iqXYGtEnpN2MO9Hs1BagB09VbANN4AJK duHsUbHXlLKd4IoHi6JCPRQVr1dpJ4jS6zL8kP3SRnuLi491KxB8RSNpaHa02n+T2hN0 S85zs4xgCb+anHIgZd0j/2MhFrnnNDHEf4wXyEWwSS9yb2gzfyc4oEacVRRY457YYaT0 aQXQ== X-Gm-Message-State: AOAM533rETQsoxfGLcsS1odCzSsn5TjfK4I7wRurk0MZUz08F7EsNOQ2 Ag89JjTtgr/Cy0mPNgGPsbdGF4GB3cKfuQ== X-Google-Smtp-Source: ABdhPJw7G96SDLNhtQf0/8gp+iDRI2d7IwV0mbK8W3Y3mEzeEuJ4ngwDBUWmFlLiOlbmnlKt2rK16g== X-Received: by 2002:a05:6402:27c7:: with SMTP id c7mr5259157ede.116.1642499711260; Tue, 18 Jan 2022 01:55:11 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-52-8-210.retail.telecomitalia.it. [82.52.8.210]) by smtp.gmail.com with ESMTPSA id w3sm5173520eji.134.2022.01.18.01.55.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Jan 2022 01:55:10 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Michael Trimarchi , Dario Binacchi , Sascha Hauer , Han Xu , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org Subject: [PATCH 4/4] mtd: rawnand: gpmi: support fast edo timings for mx28 Date: Tue, 18 Jan 2022 10:54:34 +0100 Message-Id: <20220118095434.35081-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220118095434.35081-1-dario.binacchi@amarulasolutions.com> References: <20220118095434.35081-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In the i.MX28 manual (MCIMX28RM, Rev. 1, 2010) you can find an example (15.2.4 High-Speed NAND Timing) of how to configure the GPMI controller to manage High-Speed =E2=80=8B=E2=80=8BNAND devices, so it was wrong to ass= ume that only i.MX6 can achieve EDO timings. This patch has been tested on a 2048/64 byte NAND (Micron MT29F2G08ABAEAH4). Kernel mtd tests: - mtd_nandbiterrs - mtd_nandecctest - mtd_oobtest - mtd_pagetest - mtd_readtest - mtd_speedtest - mtd_stresstest - mtd_subpagetest - mtd_torturetest [cycles_count =3D 10000000] run without errors. Before this patch (mode 0): --------------------------- eraseblock write speed is 2098 KiB/s eraseblock read speed is 2680 KiB/s page write speed is 1689 KiB/s page read speed is 2522 KiB/s 2 page write speed is 1899 KiB/s 2 page read speed is 2579 KiB/s erase speed is 128000 KiB/s 2x multi-block erase speed is 73142 KiB/s 4x multi-block erase speed is 204800 KiB/s 8x multi-block erase speed is 256000 KiB/s 16x multi-block erase speed is 256000 KiB/s 32x multi-block erase speed is 256000 KiB/s 64x multi-block erase speed is 256000 KiB/s After this patch (mode 5): ------------------------- eraseblock write speed is 3390 KiB/s eraseblock read speed is 5688 KiB/s page write speed is 2680 KiB/s page read speed is 4876 KiB/s 2 page write speed is 2909 KiB/s 2 page read speed is 5224 KiB/s erase speed is 170666 KiB/s 2x multi-block erase speed is 204800 KiB/s 4x multi-block erase speed is 256000 KiB/s 8x multi-block erase speed is 256000 KiB/s 16x multi-block erase speed is 256000 KiB/s 32x multi-block erase speed is 256000 KiB/s 64x multi-block erase speed is 256000 KiB/s Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi Tested-by: Sascha Hauer Reviewed-by: Sascha Hauer --- drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/= raw/gpmi-nand/gpmi-nand.c index cf35f4206030..d96899fa90b7 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -787,8 +787,8 @@ static int gpmi_setup_interface(struct nand_chip *chip,= int chipnr, if (IS_ERR(sdr)) return PTR_ERR(sdr); =20 - /* Only MX6 GPMI controller can reach EDO timings */ - if (sdr->tRC_min <=3D 25000 && !GPMI_IS_MX6(this)) + /* Only MX28/MX6 GPMI controller can reach EDO timings */ + if (sdr->tRC_min <=3D 25000 && !GPMI_IS_MX28(this) && !GPMI_IS_MX6(this)) return -ENOTSUPP; =20 /* Stop here if this call was just a check */ --=20 2.32.0