From nobody Tue Jun 30 12:02:16 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C74CBC433F5 for ; Mon, 17 Jan 2022 16:18:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241028AbiAQQSQ (ORCPT ); Mon, 17 Jan 2022 11:18:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35344 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241010AbiAQQSN (ORCPT ); Mon, 17 Jan 2022 11:18:13 -0500 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8D7B5C06161C for ; Mon, 17 Jan 2022 08:18:13 -0800 (PST) Received: by mail-ed1-x52a.google.com with SMTP id c71so67793869edf.6 for ; Mon, 17 Jan 2022 08:18:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fGanoGVnUA7ogI50sGef8k6e4+3YsWfksfB0nBzF5U4=; b=riRGZqlkwAHgCtFuquE9dgZtNhN3ch3F56qRaqv1FAPuqEfrMBXSq/8s58k/9ZcUlj nkPnt/9Wn2TYAkmZzWhJI4fFv2JKf8avnv1574uQdPs9HosWZ+I+sKz3DQBOI2d91ugs IuS+BK7TNl8yffJslZwqTzN3tWh/cyUFRu2wI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fGanoGVnUA7ogI50sGef8k6e4+3YsWfksfB0nBzF5U4=; b=nqVQokI5qwAOvI3P9Jq0hEsb3TWLR4H61KOP4/mnC9I9IUi+bbjChS1g33BZFzCviU aCZCXiyeegCwITwiGr5e6AOMrgMd83YlnssWWxGk1SQ0nRCcCybrilHM43CHpbTuXQ2+ secpGWodSdcCGMdyPKqDQIuQ4EEvKPQuDIyrGcMATYsXHhHnl7mh7hUIACukNp44RPgM wsXOPsi0MaN82lalMwjdGk3gzF92x6S6dSqtFbmreiCcwunvvxNlgpszFFc7ZDa/8hi3 yL3vgUA/FoMyjw7LX/+wmSLiNNzdTgBznuAqJDWCZA11PJ9yQo7Y+RBTYurr+e5EtuU5 Xw5Q== X-Gm-Message-State: AOAM532Yzk1wBXepbDt39EpZ1jqC9L0kGj6vk7rj/yVvt2C7nLBxxQT1 Q3QELvGcN3ojyw9G+RQoblggQ/QZUz9ZAw== X-Google-Smtp-Source: ABdhPJwS1xgJ2aU3JW86nj1q1s23inQuC/RyS5X6gxK/3Q8TAmFzdCX6xM2FYHDRMW7f2/Ti8Wi6RA== X-Received: by 2002:a05:6402:2282:: with SMTP id cw2mr12661577edb.161.1642436291827; Mon, 17 Jan 2022 08:18:11 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-52-8-210.retail.telecomitalia.it. [82.52.8.210]) by smtp.gmail.com with ESMTPSA id s4sm4147652ejm.146.2022.01.17.08.18.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 08:18:11 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Michael Trimarchi , Dario Binacchi , Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , Stephen Boyd , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH v3 1/4] ARM: dts: imx28: reparent gpmi clock to ref_gpmi Date: Mon, 17 Jan 2022 17:17:52 +0100 Message-Id: <20220117161755.1863579-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220117161755.1863579-1-dario.binacchi@amarulasolutions.com> References: <20220117161755.1863579-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Since ref_gpmi is sourced from pll0 (480MHz), It allows the GPMI controller to manage High-Speed =E2=80=8B=E2=80=8BNAND Timing (edo mode 3,4= and 5). Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi Reviewed-by: Sascha Hauer Tested-by: Sascha Hauer --- (no changes since v2) Changes in v2: - Reparent by device tree instead of code (drivers/clk/mxs/clk-imx28.c). Suggested by Stephen Boyd. arch/arm/boot/dts/imx28.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 84d0176d5193..130b4145af82 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -110,6 +110,8 @@ gpmi: nand-controller@8000c000 { interrupt-names =3D "bch"; clocks =3D <&clks 50>; clock-names =3D "gpmi_io"; + assigned-clocks =3D <&clks 13>; + assigned-clock-parents =3D <&clks 10>; dmas =3D <&dma_apbh 4>; dma-names =3D "rx-tx"; status =3D "disabled"; --=20 2.32.0 From nobody Tue Jun 30 12:02:16 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75CDCC433EF for ; Mon, 17 Jan 2022 16:18:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241032AbiAQQSS (ORCPT ); Mon, 17 Jan 2022 11:18:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35348 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240997AbiAQQSO (ORCPT ); Mon, 17 Jan 2022 11:18:14 -0500 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84930C061574 for ; Mon, 17 Jan 2022 08:18:14 -0800 (PST) Received: by mail-ed1-x52d.google.com with SMTP id a18so67806906edj.7 for ; Mon, 17 Jan 2022 08:18:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9REQV9VUHF/RRnZE0ju+SnWMY/5CBxb+FFHFaOix1wk=; b=fn+mo15mN5OLz1/1FjeSghX/opgVerV9w0pyZgmqzgRCPh05eGakNeu8MbxtVBVSld 3GnjsXIyhQW0+JTLxOjUrxPdEzCGjMCLNhG7+ma71dUwLY7UxRkZUX86KrrcmUk436/g aUYzLKO/yL5O7Q+Ti5XY+JoZFBX5xGoDl58Ug= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9REQV9VUHF/RRnZE0ju+SnWMY/5CBxb+FFHFaOix1wk=; b=Dj9BBgfSzC0k2bCSQvrYucPxcZWlIP7jeZKEjNZ2C0+/8UXRojh2a9a5Sork0/1tr7 SaEVl8sYenvLsMwcQXKlQC9GAuy3zSArM6e5yObzryj5G7SuECKaRYeIykqv+UYMQCwy q9+CUgP5bG2pEW6MEDILTCHJSiX5fOoST6G0XgoUBJwtaJOx+GOINUzX+XUOnsrPLHUR GMq3RtUNX2uWp6rZ1s/xYEfWcKGhEcNpWqA5J3JZKlr1cjjfXVcEyhxHjVp/zTZeO3kM AcSPpvoBzlE9uwTP4lOuEyMLwhPU0XQVWCUwZiCpTWibEAkmKWJdVOTNMx6w8ZVh3FNG W4vg== X-Gm-Message-State: AOAM533RpvqsmxfAckwwgax0YckhngDaVFgYcKxO0mbRxgmJUMiVuy0N kRdwf58fFH4EMTPNDINRTb91q79qM4UwwQ== X-Google-Smtp-Source: ABdhPJxlH+heyB1LM4NMeH1SwpQd4drcVL9osv2R0ZUdgy5ISXEcrQtJY2p5IFIrivwXZZpvbWlozA== X-Received: by 2002:aa7:ccda:: with SMTP id y26mr6237449edt.371.1642436292967; Mon, 17 Jan 2022 08:18:12 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-52-8-210.retail.telecomitalia.it. [82.52.8.210]) by smtp.gmail.com with ESMTPSA id s4sm4147652ejm.146.2022.01.17.08.18.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 08:18:12 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Michael Trimarchi , Dario Binacchi , Boris Brezillon , Han Xu , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org Subject: [RFC PATCH v3 2/4] mtd: rawnand: gpmi: fix controller timings setting Date: Mon, 17 Jan 2022 17:17:53 +0100 Message-Id: <20220117161755.1863579-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220117161755.1863579-1-dario.binacchi@amarulasolutions.com> References: <20220117161755.1863579-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Set the controller registers according to the real clock rate. The controller registers configuration (setup, hold, timeout, ... cycles) depends on the clock rate of the GPMI. Using the real rate instead of the ideal one, avoids that this inaccuracy (required_rate - real_rate) affects the registers setting. This patch has been tested on two custom boards with i.MX28 and i.MX6 SOCs: - i.MX28: required rate 100MHz, real rate 99.3MHz - i.MX6 required rate 100MHz, real rate 99MHz Fixes: b1206122069a ("mtd: rawnand: gpmi: use core timings instead of an em= pirical derivation") Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi Reviewed-by: Sascha Hauer Tested-by: Sascha Hauer --- (no changes since v2) Changes in v2: - Improve the commit description. - give examples of frequencies on my setup. drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/= raw/gpmi-nand/gpmi-nand.c index 1b64c5a5140d..73c3bf59b55e 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -648,6 +648,7 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_d= ata *this, const struct nand_sdr_timings *sdr) { struct gpmi_nfc_hardware_timing *hw =3D &this->hw; + struct resources *r =3D &this->resources; unsigned int dll_threshold_ps =3D this->devdata->max_chain_delay; unsigned int period_ps, reference_period_ps; unsigned int data_setup_cycles, data_hold_cycles, addr_setup_cycles; @@ -671,6 +672,8 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_d= ata *this, wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; } =20 + hw->clk_rate =3D clk_round_rate(r->clock[0], hw->clk_rate); + /* SDR core timings are given in picoseconds */ period_ps =3D div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); =20 --=20 2.32.0 From nobody Tue Jun 30 12:02:16 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B92DC433F5 for ; Mon, 17 Jan 2022 16:18:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241044AbiAQQSU (ORCPT ); Mon, 17 Jan 2022 11:18:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241020AbiAQQSQ (ORCPT ); Mon, 17 Jan 2022 11:18:16 -0500 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D364BC061574 for ; Mon, 17 Jan 2022 08:18:15 -0800 (PST) Received: by mail-ed1-x52a.google.com with SMTP id g22so21266137edu.1 for ; Mon, 17 Jan 2022 08:18:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gsZSLbMzMCUtYGaf0gWZ0uuBEAA6iy7oiMig3gzLyxY=; b=FpzqaeFutVXXlVAX0Ax8r9DmQxyuIHHNFxqePFvmcxbEx4Haz72Vhy6FU1st3+HVP3 jMIiV5ELJK0BYq1ehNWYCo0MnY0OCqF0r1oWI8QRzSF8kdTlzlmV6UFaEPb/RldxT2yF fzNHwU8A8ZksP94/QG8AFrFC7VjeoEb+5cD2s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gsZSLbMzMCUtYGaf0gWZ0uuBEAA6iy7oiMig3gzLyxY=; b=Zd3VovF+Hn9iNYvcdbrxmTG56/aRpXmUUCpkXE8glgIY6AQlV37gTkbsk/Jy1Nihyd wAyw57N4FqiUhBGp4NsoNw4Y9Jm7ha2ecnzIeT4WjDxVLQcgGQz1J3+a7QMDqxU9DWIK yrrbtKym/xa6xVV3KA1QQnSXs9Oq8X6PxH2G3X4Lneu2eSyjcCt+jryeBmZpGQa6B+A+ DF7Rh1YiZ0BqUXv9rZ20uXTXS/iWnjnSRNx9qVzN/gsgtJg4bXCq71xSGsuI7twfa2ol RxWf9qljBbxBNUWO0jpdMS8nlHDsVdsSIn+rHnFTg495N8wbnZJKfcH9aaGp5LWJAa7b 9XEg== X-Gm-Message-State: AOAM530RVYg+niEIfsdyTIyio3n2+7452u3D3dZlrbetCRZHNE5ALprj vdkJGljmMRSuh5cwMjE+gz4pXG2tsbEowQ== X-Google-Smtp-Source: ABdhPJyK72rzpHJ978ZqYIpz5Z3wLmpWDsmIwzBaJFJ7pygK2XoCLJisgeYMDOuN+6G2IawZhsxHiw== X-Received: by 2002:a17:907:8a1a:: with SMTP id sc26mr17417046ejc.498.1642436294120; Mon, 17 Jan 2022 08:18:14 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-52-8-210.retail.telecomitalia.it. [82.52.8.210]) by smtp.gmail.com with ESMTPSA id s4sm4147652ejm.146.2022.01.17.08.18.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 08:18:13 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Michael Trimarchi , Dario Binacchi , Han Xu , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org Subject: [RFC PATCH v3 3/4] mtd: rawnand: gpmi: validate controller clock rate Date: Mon, 17 Jan 2022 17:17:54 +0100 Message-Id: <20220117161755.1863579-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220117161755.1863579-1-dario.binacchi@amarulasolutions.com> References: <20220117161755.1863579-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" What to do when the real rate of the gpmi clock is not equal to the required one? The solutions proposed in [1] did not lead to a conclusion on how to validate the clock rate, so, inspired by the document [2], I consider the rate correct only if not lower or equal to the rate of the previous edo mode. In fact, in chapter 4.16.2 (NV-DDR) of the document [2], it is written that "If the host selects timing mode n, then its clock period shall be faster than the clock period of timing mode n-1 and slower than or equal to the clock period of timing mode n.". I thought that it could therefore also be used in this case, without therefore having to define the valid rate ranges empirically. For example, suppose that gpmi_nfc_compute_timings() is called to set edo mode 5 (100MHz) but the rate returned by clk_round_rate() is 80MHz (edo mode 4). In this case gpmi_nfc_compute_timings() will return error, and will be called again to set edo mode 4, which this time will be successful. [1] https://lore.kernel.org/r/20210702065350.209646-5-ebiggers@kernel.org [2] http://www.onfi.org/-/media/client/onfi/specs/onfi_3_0_gold.pdf?la=3Den Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi Reviewed-by: Sascha Hauer Tested-by: Sascha Hauer --- Changes in v3: - Remove the "mtd: rawnand: gpmi: use a table to get EDO mode setup" patch. - Simplify the validation logic (suggested by Sascha Hauer ). Changes in v2: - Fix commit description. - Add an example to the commit description to better understand the problem solved by the patch. - Split the patch. drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/= raw/gpmi-nand/gpmi-nand.c index 73c3bf59b55e..cf35f4206030 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -644,8 +644,8 @@ static int bch_set_geometry(struct gpmi_nand_data *this) * RDN_DELAY =3D ----------------------- {3} * RP */ -static void gpmi_nfc_compute_timings(struct gpmi_nand_data *this, - const struct nand_sdr_timings *sdr) +static int gpmi_nfc_compute_timings(struct gpmi_nand_data *this, + const struct nand_sdr_timings *sdr) { struct gpmi_nfc_hardware_timing *hw =3D &this->hw; struct resources *r =3D &this->resources; @@ -657,23 +657,33 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand= _data *this, int sample_delay_ps, sample_delay_factor; u16 busy_timeout_cycles; u8 wrn_dly_sel; + unsigned long clk_rate, min_rate; =20 if (sdr->tRC_min >=3D 30000) { /* ONFI non-EDO modes [0-3] */ hw->clk_rate =3D 22000000; + min_rate =3D 0; wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_4_TO_8NS; } else if (sdr->tRC_min >=3D 25000) { /* ONFI EDO mode 4 */ hw->clk_rate =3D 80000000; + min_rate =3D 22000000; wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; } else { /* ONFI EDO mode 5 */ hw->clk_rate =3D 100000000; + min_rate =3D 80000000; wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; } =20 - hw->clk_rate =3D clk_round_rate(r->clock[0], hw->clk_rate); + clk_rate =3D clk_round_rate(r->clock[0], hw->clk_rate); + if (clk_rate <=3D min_rate) { + dev_err(this->dev, "clock setting: expected %ld, got %ld\n", + hw->clk_rate, clk_rate); + return -ENOTSUPP; + } =20 + hw->clk_rate =3D clk_rate; /* SDR core timings are given in picoseconds */ period_ps =3D div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); =20 @@ -714,6 +724,7 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_d= ata *this, hw->ctrl1n |=3D BF_GPMI_CTRL1_RDN_DELAY(sample_delay_factor) | BM_GPMI_CTRL1_DLL_ENABLE | (use_half_period ? BM_GPMI_CTRL1_HALF_PERIOD : 0); + return 0; } =20 static int gpmi_nfc_apply_timings(struct gpmi_nand_data *this) @@ -769,6 +780,7 @@ static int gpmi_setup_interface(struct nand_chip *chip,= int chipnr, { struct gpmi_nand_data *this =3D nand_get_controller_data(chip); const struct nand_sdr_timings *sdr; + int ret; =20 /* Retrieve required NAND timings */ sdr =3D nand_get_sdr_timings(conf); @@ -784,7 +796,9 @@ static int gpmi_setup_interface(struct nand_chip *chip,= int chipnr, return 0; =20 /* Do the actual derivation of the controller timings */ - gpmi_nfc_compute_timings(this, sdr); + ret =3D gpmi_nfc_compute_timings(this, sdr); + if (ret) + return ret; =20 this->hw.must_apply_timings =3D true; =20 --=20 2.32.0 From nobody Tue Jun 30 12:02:16 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1824DC433F5 for ; Mon, 17 Jan 2022 16:18:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241058AbiAQQSV (ORCPT ); Mon, 17 Jan 2022 11:18:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35378 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241019AbiAQQSR (ORCPT ); Mon, 17 Jan 2022 11:18:17 -0500 Received: from mail-ed1-x531.google.com (mail-ed1-x531.google.com [IPv6:2a00:1450:4864:20::531]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 366ECC06161C for ; Mon, 17 Jan 2022 08:18:17 -0800 (PST) Received: by mail-ed1-x531.google.com with SMTP id k15so67649237edk.13 for ; Mon, 17 Jan 2022 08:18:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XLwG7XRfre6R+aQSdeErC+1iFRSY828R4VD71xP5o0w=; b=MiN7ibyXaw8dNl1iR4wiSvvN1GMlk9PZOGdk4g7mr7DrP1/Th/2U4RbDWc/BBnGvfP dl23vitA6D3p4CrilUxRiWqONsoZTTyT1M/J1k1kMMyKQllo7JI6Gvo2QonGAdlpvP3q LdjaIE5eRd7bJqDeBzFvYmFEC1uRw7gtVPy28= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XLwG7XRfre6R+aQSdeErC+1iFRSY828R4VD71xP5o0w=; b=eggO/EkEYygjiSYgCacx2zMBNLLflkjw+qxmuJiZ23HiB7iDh80hGJLYEe2qA5P1U1 ZGgCexkFQ4iw242PO9dEBsXbIAPOi9rTT9pxTSX3PlCoCBnDh0aNU/7lVcsw6Sm8RiYY vzYry6V+h7woCA+gA7dfYl6iMtboMOjKOQlqzTHdc0lXhboe7GTWT0XalkaHq0qr/Bsq 6A87ZnZtsKv/eQO6iGvqVk6YE1Vb3HsRTFZYvYeZ9+7cQZi+4humGIiWaJxy+z4OVpsJ iPYJwvKbgQjBHyLSjPw7Bub97hrAX4+UggUUTGOZTY4lgo0IacSRwI7alqbbWJPDrd92 kTfw== X-Gm-Message-State: AOAM530vheOtP8GRZGA1Nn0p4Y8oSrlmeQwUfIFlnmKc4SzEVRrKKeYc zH2mJbNxxGrL/qEykLFEp3qkIgfE9YeSNg== X-Google-Smtp-Source: ABdhPJzivBEVN9pJF+YeJqeoaLhyI85GbGL/0qRS9Y5rLC/zDWRgTEerETio7ZlsXLA7FE9MoLWzVQ== X-Received: by 2002:aa7:c79a:: with SMTP id n26mr14887264eds.350.1642436295531; Mon, 17 Jan 2022 08:18:15 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-52-8-210.retail.telecomitalia.it. [82.52.8.210]) by smtp.gmail.com with ESMTPSA id s4sm4147652ejm.146.2022.01.17.08.18.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 08:18:15 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Michael Trimarchi , Dario Binacchi , Han Xu , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org Subject: [RFC PATCH v3 4/4] mtd: rawnand: gpmi: support fast edo timings for mx28 Date: Mon, 17 Jan 2022 17:17:55 +0100 Message-Id: <20220117161755.1863579-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220117161755.1863579-1-dario.binacchi@amarulasolutions.com> References: <20220117161755.1863579-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In the i.MX28 manual (MCIMX28RM, Rev. 1, 2010) you can find an example (15.2.4 High-Speed NAND Timing) of how to configure the GPMI controller to manage High-Speed =E2=80=8B=E2=80=8BNAND devices, so it was wrong to ass= ume that only i.MX6 can achieve EDO timings. This patch has been tested on a 2048/64 byte NAND (Micron MT29F2G08ABAEAH4). Kernel mtd tests: - mtd_nandbiterrs - mtd_nandecctest - mtd_oobtest - mtd_pagetest - mtd_readtest - mtd_speedtest - mtd_stresstest - mtd_subpagetest - mtd_torturetest [cycles_count =3D 10000000] run without errors. Before this patch (mode 0): Reviewed-by: Sascha Hauer Tested-by: Sascha Hauer --------------------------- eraseblock write speed is 2098 KiB/s eraseblock read speed is 2680 KiB/s page write speed is 1689 KiB/s page read speed is 2522 KiB/s 2 page write speed is 1899 KiB/s 2 page read speed is 2579 KiB/s erase speed is 128000 KiB/s 2x multi-block erase speed is 73142 KiB/s 4x multi-block erase speed is 204800 KiB/s 8x multi-block erase speed is 256000 KiB/s 16x multi-block erase speed is 256000 KiB/s 32x multi-block erase speed is 256000 KiB/s 64x multi-block erase speed is 256000 KiB/s After this patch (mode 5): ------------------------- eraseblock write speed is 3390 KiB/s eraseblock read speed is 5688 KiB/s page write speed is 2680 KiB/s page read speed is 4876 KiB/s 2 page write speed is 2909 KiB/s 2 page read speed is 5224 KiB/s erase speed is 170666 KiB/s 2x multi-block erase speed is 204800 KiB/s 4x multi-block erase speed is 256000 KiB/s 8x multi-block erase speed is 256000 KiB/s 16x multi-block erase speed is 256000 KiB/s 32x multi-block erase speed is 256000 KiB/s 64x multi-block erase speed is 256000 KiB/s Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- (no changes since v2) Changes in v2: - Improve the commit message. - Move the patch to the end of the series. drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/= raw/gpmi-nand/gpmi-nand.c index cf35f4206030..d96899fa90b7 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -787,8 +787,8 @@ static int gpmi_setup_interface(struct nand_chip *chip,= int chipnr, if (IS_ERR(sdr)) return PTR_ERR(sdr); =20 - /* Only MX6 GPMI controller can reach EDO timings */ - if (sdr->tRC_min <=3D 25000 && !GPMI_IS_MX6(this)) + /* Only MX28/MX6 GPMI controller can reach EDO timings */ + if (sdr->tRC_min <=3D 25000 && !GPMI_IS_MX28(this) && !GPMI_IS_MX6(this)) return -ENOTSUPP; =20 /* Stop here if this call was just a check */ --=20 2.32.0