From nobody Tue Jun 30 13:04:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 979BCC433EF for ; Mon, 17 Jan 2022 11:18:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236690AbiAQLSi (ORCPT ); Mon, 17 Jan 2022 06:18:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51074 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236437AbiAQLSh (ORCPT ); Mon, 17 Jan 2022 06:18:37 -0500 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C1805C06161C for ; Mon, 17 Jan 2022 03:18:36 -0800 (PST) Received: by mail-ed1-x52c.google.com with SMTP id f21so7005356eds.11 for ; Mon, 17 Jan 2022 03:18:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vgCBczBtPEHYRyvjWuI0A9ytv/aIykozzgSEOheUqfc=; b=ipKDNBWS97vbGXeveLzLfhig0ox/GDOkJQwZz2+gK8EJtkwmWpun3D8fzxs2KkCh9j xx6BphHNZOA663TTRHAhOj7SIOwZX7Rhhr4W3T2lm3EzeYG0yrkJgK1jPG4P2jitsNvl ASAqdvv6DfAJz8VDUyqZ6ESkYA6ALLbFZ8kxE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vgCBczBtPEHYRyvjWuI0A9ytv/aIykozzgSEOheUqfc=; b=IbSkuMx9C8xPwGVIgkNE5hCs14tuAg+/ua2U8r3aNkx0S0+LuVD8Z43xL8n/hohVCD 1k0pg7oh1cVAsFfvNJ3npzqNrjeU3sbE9/rDopsysO+eAPXnQcjN9PalDndP0GpTsXbA M0WDR25d42au9GPrKWtOg5HIZP1J6ihnxeHV7TYid1UQCyFWIJMszxNiNoJHauXduQH1 Vnq7ep94R11ECOMuY3ee87jyH3/XKiN1GrvqKyjIvQ7mMbtSdJChy5y3MgVD/Sq6zgFa ii4qRi3W+OcpAejI7PEpM8LngJLm+TN9x4xoajhSwTBPV2zvVVto6WD2IbxwCxhiynm9 KE6A== X-Gm-Message-State: AOAM533vz5WPTpYC4Pf9NtZccGF5FKoUg+H+Dqdp7aASTvejfGaTohv9 UCFBC/Fxct+jE3TtoLUrbHBOjNXFjRIAGDv6 X-Google-Smtp-Source: ABdhPJyhbA1cojSmJmnyYivZ1NJrFNBpQkyDlYNQjQ1LgTp8AX9cifsCVJdU9uZlz9hbiLtPVIAdJw== X-Received: by 2002:a17:906:328d:: with SMTP id 13mr12429218ejw.28.1642418315019; Mon, 17 Jan 2022 03:18:35 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-52-8-210.retail.telecomitalia.it. [82.52.8.210]) by smtp.gmail.com with ESMTPSA id f11sm5142713edv.67.2022.01.17.03.18.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 03:18:34 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Michael Trimarchi , Dario Binacchi , Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , Stephen Boyd , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH v2 1/5] ARM: dts: imx28: reparent gpmi clock to ref_gpmi Date: Mon, 17 Jan 2022 12:18:25 +0100 Message-Id: <20220117111829.1811997-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220117111829.1811997-1-dario.binacchi@amarulasolutions.com> References: <20220117111829.1811997-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Since ref_gpmi is sourced from pll0 (480MHz), It allows the GPMI controller to manage High-Speed =E2=80=8B=E2=80=8BNAND Timing (edo mode 3,4= and 5). Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- Changes in v2: - Reparent by device tree instead of code (drivers/clk/mxs/clk-imx28.c). Suggested by Stephen Boyd. arch/arm/boot/dts/imx28.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 84d0176d5193..130b4145af82 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -110,6 +110,8 @@ gpmi: nand-controller@8000c000 { interrupt-names =3D "bch"; clocks =3D <&clks 50>; clock-names =3D "gpmi_io"; + assigned-clocks =3D <&clks 13>; + assigned-clock-parents =3D <&clks 10>; dmas =3D <&dma_apbh 4>; dma-names =3D "rx-tx"; status =3D "disabled"; --=20 2.32.0 From nobody Tue Jun 30 13:04:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 698E7C433F5 for ; Mon, 17 Jan 2022 11:18:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236761AbiAQLSk (ORCPT ); Mon, 17 Jan 2022 06:18:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236488AbiAQLSi (ORCPT ); Mon, 17 Jan 2022 06:18:38 -0500 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 016DAC061574 for ; Mon, 17 Jan 2022 03:18:38 -0800 (PST) Received: by mail-ed1-x52e.google.com with SMTP id k15so63983595edk.13 for ; Mon, 17 Jan 2022 03:18:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Iq4FM2PRLAcot9iAnDMYHV6yAJ0nWXkPdknU80um0hk=; b=IB+KjWd8cHfC4D1zKJykFmFfRmcOLwb4vXLkbsk9WocfSgH8I5Zsn7Q+ReAXfRq4tI dgQzZE03Y58DdmDRXhZYG8Z1dqsocUfJLE9StlBfkTwhCilKOfJFi1teHXEhCe1mWArK n6fxSeoQ62y8Jjc5gCCy3wM37psn7FkhoDwa4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Iq4FM2PRLAcot9iAnDMYHV6yAJ0nWXkPdknU80um0hk=; b=52ZQfms2VBqrlGs1lNjFWGZG2zKF1DSy7TmO8KI3YVTmTyK2ohqPv5TJV3BFkLt6RL rSkHrBvvIPP/JJ/HEauoGDDYf8+HS8pz2o6gqqzk47kO7nMG6safJsCHc5w7j2ngdrHN 2ZAMgsMVzIBJ7pqw1Kfc7s2dD7ulcV8jVMwdmwgpCevYFGLg6Yb6CvvFjQ4g52ImLA1s udRH8U1kjZK+ibN8evfNZ/XaeRN7RG6CmWZcQ/972/6r/p0yqrV/Mi2jJmPiHO6ko4Am gYIYyzxbI6XXDS7jMU4Qq7HHAgZEInl/eCQJCAnENMMtTNsrNBjnkaZIMke6MsGOzwRP mzlg== X-Gm-Message-State: AOAM531eSh6Ox4tJumpNd444tkKggtfw3h0u4cwikZ1zRrwpzA2/x8DL KJaUVsq9ljN4Pc/WMWBjzg0PE/uDXtzaEfGy X-Google-Smtp-Source: ABdhPJz17OYx8Igx0F5Esesia6peK+Jesr70iLxwxSwJi0kzRAjt0Ua+ypjgQwM6s3j3r35pU8cc2g== X-Received: by 2002:a17:907:3da4:: with SMTP id he36mr1872514ejc.707.1642418316340; Mon, 17 Jan 2022 03:18:36 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-52-8-210.retail.telecomitalia.it. [82.52.8.210]) by smtp.gmail.com with ESMTPSA id f11sm5142713edv.67.2022.01.17.03.18.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 03:18:35 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Michael Trimarchi , Dario Binacchi , Boris Brezillon , Han Xu , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org Subject: [RFC PATCH v2 2/5] mtd: rawnand: gpmi: fix controller timings setting Date: Mon, 17 Jan 2022 12:18:26 +0100 Message-Id: <20220117111829.1811997-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220117111829.1811997-1-dario.binacchi@amarulasolutions.com> References: <20220117111829.1811997-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Set the controller registers according to the real clock rate. The controller registers configuration (setup, hold, timeout, ... cycles) depends on the clock rate of the GPMI. Using the real rate instead of the ideal one, avoids that this inaccuracy (required_rate - real_rate) affects the registers setting. This patch has been tested on two custom boards with i.MX28 and i.MX6 SOCs: - i.MX28: required rate 100MHz, real rate 99.3MHz - i.MX6 required rate 100MHz, real rate 99MHz Fixes: b1206122069a ("mtd: rawnand: gpmi: use core timings instead of an em= pirical derivation") Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- Changes in v2: - Improve the commit description. - give examples of frequencies on my setup. drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/= raw/gpmi-nand/gpmi-nand.c index 1b64c5a5140d..73c3bf59b55e 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -648,6 +648,7 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_d= ata *this, const struct nand_sdr_timings *sdr) { struct gpmi_nfc_hardware_timing *hw =3D &this->hw; + struct resources *r =3D &this->resources; unsigned int dll_threshold_ps =3D this->devdata->max_chain_delay; unsigned int period_ps, reference_period_ps; unsigned int data_setup_cycles, data_hold_cycles, addr_setup_cycles; @@ -671,6 +672,8 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_d= ata *this, wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; } =20 + hw->clk_rate =3D clk_round_rate(r->clock[0], hw->clk_rate); + /* SDR core timings are given in picoseconds */ period_ps =3D div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); =20 --=20 2.32.0 From nobody Tue Jun 30 13:04:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5226FC433EF for ; Mon, 17 Jan 2022 11:18:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239021AbiAQLSn (ORCPT ); Mon, 17 Jan 2022 06:18:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51098 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236728AbiAQLSj (ORCPT ); Mon, 17 Jan 2022 06:18:39 -0500 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2FAE6C06173F for ; Mon, 17 Jan 2022 03:18:39 -0800 (PST) Received: by mail-ed1-x52c.google.com with SMTP id m4so63982342edb.10 for ; Mon, 17 Jan 2022 03:18:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Gk6v+zkr/8Bz9MIGt4fGPVyLyGj2QkozkhBTdVX/PUo=; b=VIXTBpMjhqZKt4rQ3FtVXzMnmqezrKxs8k1eSDAutK1Jfyt7mC1LZ7DYG5m4sXOeYE K94/xRWf2H3fKlAcYXE4wuT6fRf8oiALFqZaYyy3N5mNLpqL9tX+SAmcHQHkhIFd2EZm 3CkbiYwRHinLAv3PxmapAgT73USBoOxYY/nb4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Gk6v+zkr/8Bz9MIGt4fGPVyLyGj2QkozkhBTdVX/PUo=; b=lRtnUWD2MWruZh07HBD26OhNhOK5zOTo5VqLcvrxPFpJO9QLqIXhute6KVFogW+LDK FGKgAtV1MOMAq95vv7c/vrVFKlBAHCVG7LXAlPJ+tgRIov5KnllNZmNXJxclNHiTDz8k 4GBbsAhaqZE14TIsWFn5Ix5PFUx8QVqLH+WgKgo+PoMgGZ0LIseQJ8qR8cAczFMBApHF 7NS9IoT7QH11LoS8eMlEg0lNlbWZxzq4k3gkrn+QX+UMi4qwANGnRXDBvBMQtIdHXLyY lPObYKkxh9vs21cI9FugXyv3x2+9C6biQiKH7LYhPFEw0bkLcQF/CJN6zw0FRuegtePU xvbQ== X-Gm-Message-State: AOAM533DT64j1v+UJu7IwOxxG3cum7cODTrM07Grbx1tp8MQ8MX+YzSD 3GXaRb03IyC6b1tKXXTj842D5XBU79KC5g== X-Google-Smtp-Source: ABdhPJzfcTUuKvzsSykyLHp6DawCurAnU7xOZb2fKrRxwC5e0xT0BSoq7Nb96brhwacD7RdAXwP73A== X-Received: by 2002:a17:906:49c4:: with SMTP id w4mr16071378ejv.745.1642418317529; Mon, 17 Jan 2022 03:18:37 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-52-8-210.retail.telecomitalia.it. [82.52.8.210]) by smtp.gmail.com with ESMTPSA id f11sm5142713edv.67.2022.01.17.03.18.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 03:18:37 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Michael Trimarchi , Dario Binacchi , Han Xu , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org Subject: [RFC PATCH v2 3/5] mtd: rawnand: gpmi: use a table to get EDO mode setup Date: Mon, 17 Jan 2022 12:18:27 +0100 Message-Id: <20220117111829.1811997-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220117111829.1811997-1-dario.binacchi@amarulasolutions.com> References: <20220117111829.1811997-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This is a preparation patch for the upcoming validation of the GPMI controller clock rate. Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- Changes in v2: - Add the patch to the series. drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 43 +++++++++++++++------- 1 file changed, 30 insertions(+), 13 deletions(-) diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/= raw/gpmi-nand/gpmi-nand.c index 73c3bf59b55e..4ac695aa5131 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -570,6 +570,27 @@ static int bch_set_geometry(struct gpmi_nand_data *thi= s) return ret; } =20 +struct edo_mode { + u32 tRC_min; + long clk_rate; + u8 wrn_dly_sel; +}; + +static const struct edo_mode edo_modes[] =3D { + {.tRC_min =3D 30000, .clk_rate =3D 22000000, + .wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_4_TO_8NS}, + {.tRC_min =3D 30000, .clk_rate =3D 22000000, + .wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_4_TO_8NS}, + {.tRC_min =3D 30000, .clk_rate =3D 22000000, + .wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_4_TO_8NS}, + {.tRC_min =3D 30000, .clk_rate =3D 22000000, + .wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_4_TO_8NS}, + {.tRC_min =3D 25000, .clk_rate =3D 80000000, + .wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY}, + {.tRC_min =3D 20000, .clk_rate =3D 100000000, + .wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY}, +}; + /* * <1> Firstly, we should know what's the GPMI-clock means. * The GPMI-clock is the internal clock in the gpmi nand controller. @@ -657,22 +678,18 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand= _data *this, int sample_delay_ps, sample_delay_factor; u16 busy_timeout_cycles; u8 wrn_dly_sel; + int i, emode =3D ARRAY_SIZE(edo_modes) - 1; =20 - if (sdr->tRC_min >=3D 30000) { - /* ONFI non-EDO modes [0-3] */ - hw->clk_rate =3D 22000000; - wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_4_TO_8NS; - } else if (sdr->tRC_min >=3D 25000) { - /* ONFI EDO mode 4 */ - hw->clk_rate =3D 80000000; - wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; - } else { - /* ONFI EDO mode 5 */ - hw->clk_rate =3D 100000000; - wrn_dly_sel =3D BV_GPMI_CTRL1_WRN_DLY_SEL_NO_DELAY; + /* Search the required EDO mode */ + for (i =3D 0; i < ARRAY_SIZE(edo_modes); i++) { + if (sdr->tRC_min >=3D edo_modes[i].tRC_min) { + emode =3D i; + break; + } } =20 - hw->clk_rate =3D clk_round_rate(r->clock[0], hw->clk_rate); + hw->clk_rate =3D clk_round_rate(r->clock[0], edo_modes[emode].clk_rate); + wrn_dly_sel =3D edo_modes[emode].wrn_dly_sel; =20 /* SDR core timings are given in picoseconds */ period_ps =3D div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate); --=20 2.32.0 From nobody Tue Jun 30 13:04:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4706C433EF for ; Mon, 17 Jan 2022 11:18:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239035AbiAQLSr (ORCPT ); Mon, 17 Jan 2022 06:18:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236771AbiAQLSk (ORCPT ); Mon, 17 Jan 2022 06:18:40 -0500 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F293C061574 for ; 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Mon, 17 Jan 2022 03:18:38 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-52-8-210.retail.telecomitalia.it. [82.52.8.210]) by smtp.gmail.com with ESMTPSA id f11sm5142713edv.67.2022.01.17.03.18.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 03:18:38 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Michael Trimarchi , Dario Binacchi , Han Xu , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org Subject: [RFC PATCH v2 4/5] mtd: rawnand: gpmi: validate controller clock rate Date: Mon, 17 Jan 2022 12:18:28 +0100 Message-Id: <20220117111829.1811997-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220117111829.1811997-1-dario.binacchi@amarulasolutions.com> References: <20220117111829.1811997-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" What to do when the real rate of the gpmi clock is not equal to the required one? The solutions proposed in [1] did not lead to a conclusion on how to validate the clock rate, so, inspired by the document [2], I consider the rate correct only if not lower or equal to the rate of the previous edo mode. In fact, in chapter 4.16.2 (NV-DDR) of the document [2], it is written that "If the host selects timing mode n, then its clock period shall be faster than the clock period of timing mode n-1 and slower than or equal to the clock period of timing mode n.". I thought that it could therefore also be used in this case, without therefore having to define the valid rate ranges empirically. For example, suppose that gpmi_nfc_compute_timings() is called for edo mode 5 configuration (100MHz, from the `edo_modes' table) but the rate returned by clk_round_rate() is 80MHz (edo mode 4 from the `edo_modes' table). In this case gpmi_nfc_compute_timings() will return error, and will be called again for edo mode 4 configuration, which this time will be successful. [1] https://lore.kernel.org/r/20210702065350.209646-5-ebiggers@kernel.org [2] http://www.onfi.org/-/media/client/onfi/specs/onfi_3_0_gold.pdf?la=3Den Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- Changes in v2: - Fix commit description. - Add an example to the commit description to better understand the problem solved by the patch. - Split the patch. drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 24 ++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/= raw/gpmi-nand/gpmi-nand.c index 4ac695aa5131..7ae7a37775a3 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -665,8 +665,8 @@ static const struct edo_mode edo_modes[] =3D { * RDN_DELAY =3D ----------------------- {3} * RP */ -static void gpmi_nfc_compute_timings(struct gpmi_nand_data *this, - const struct nand_sdr_timings *sdr) +static int gpmi_nfc_compute_timings(struct gpmi_nand_data *this, + const struct nand_sdr_timings *sdr) { struct gpmi_nfc_hardware_timing *hw =3D &this->hw; struct resources *r =3D &this->resources; @@ -679,6 +679,7 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_d= ata *this, u16 busy_timeout_cycles; u8 wrn_dly_sel; int i, emode =3D ARRAY_SIZE(edo_modes) - 1; + long clk_rate; =20 /* Search the required EDO mode */ for (i =3D 0; i < ARRAY_SIZE(edo_modes); i++) { @@ -688,7 +689,18 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_= data *this, } } =20 - hw->clk_rate =3D clk_round_rate(r->clock[0], edo_modes[emode].clk_rate); + clk_rate =3D clk_round_rate(r->clock[0], edo_modes[emode].clk_rate); + if (emode > 0 && !(clk_rate <=3D edo_modes[emode].clk_rate && + clk_rate > edo_modes[emode - 1].clk_rate)) { + dev_err(this->dev, + "edo mode %d clock setting: expected %ld, got %ld\n", + emode, edo_modes[emode].clk_rate, clk_rate); + return -ENOTSUPP; + } + + dev_dbg(this->dev, "edo mode %d @ %ld Hz\n", emode, clk_rate); + + hw->clk_rate =3D clk_rate; wrn_dly_sel =3D edo_modes[emode].wrn_dly_sel; =20 /* SDR core timings are given in picoseconds */ @@ -731,6 +743,7 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_d= ata *this, hw->ctrl1n |=3D BF_GPMI_CTRL1_RDN_DELAY(sample_delay_factor) | BM_GPMI_CTRL1_DLL_ENABLE | (use_half_period ? BM_GPMI_CTRL1_HALF_PERIOD : 0); + return 0; } =20 static int gpmi_nfc_apply_timings(struct gpmi_nand_data *this) @@ -786,6 +799,7 @@ static int gpmi_setup_interface(struct nand_chip *chip,= int chipnr, { struct gpmi_nand_data *this =3D nand_get_controller_data(chip); const struct nand_sdr_timings *sdr; + int ret; =20 /* Retrieve required NAND timings */ sdr =3D nand_get_sdr_timings(conf); @@ -801,7 +815,9 @@ static int gpmi_setup_interface(struct nand_chip *chip,= int chipnr, return 0; =20 /* Do the actual derivation of the controller timings */ - gpmi_nfc_compute_timings(this, sdr); + ret =3D gpmi_nfc_compute_timings(this, sdr); + if (ret) + return ret; =20 this->hw.must_apply_timings =3D true; =20 --=20 2.32.0 From nobody Tue Jun 30 13:04:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29C51C433F5 for ; Mon, 17 Jan 2022 11:18:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239058AbiAQLSt (ORCPT ); Mon, 17 Jan 2022 06:18:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51114 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238938AbiAQLSm (ORCPT ); Mon, 17 Jan 2022 06:18:42 -0500 Received: from mail-ed1-x532.google.com (mail-ed1-x532.google.com [IPv6:2a00:1450:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A5170C061401 for ; Mon, 17 Jan 2022 03:18:41 -0800 (PST) Received: by mail-ed1-x532.google.com with SMTP id m4so63982790edb.10 for ; Mon, 17 Jan 2022 03:18:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1U+MO7BClWc4cGfvNBl6cQXhNHZ2EpawrE7wpyjmSlU=; b=H68wnCWCkg20QgNO8XJpB6pf6OSiPm1Nv2FITEANqlmGTdw2efMMfOEbbWmNs9ajC9 46SEzeFfEUUG1Q/9PaOAZouyJ8WfFBMtiGHqKWTh4ATWtEAnoAmpTTA7L0zQqcpY85gy RCaHaQrgR8L7gGP6hTcWXy4Wk0mTaW2Y4VInA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1U+MO7BClWc4cGfvNBl6cQXhNHZ2EpawrE7wpyjmSlU=; b=nG0t9bwRUsadel7ATqWNnVzTvZq3H57XH24C85daIjG1KtFAglQhhP443PjOfl/gbv X6Q88vywsd7M+vHd3A2zvH0jdALeTQUB9mSogbp42n9myMQYrlnOiO/LjSgYE6BGJwwW CEuLtYVYi9NVaSIl9/dc9A79iHajMWhw5XWC805xJ5ALIOR420Egwz+ykR2jmmxrrM1G xYANGfLwvrTv70r66X/0wj/DVCX7Rzi7A0cLhne5PVN5rVBjkIEFY0le1Y/dB5tgwNyo uA9oXbGZqkXIV4qbq28+e2KTwEhLB3stHCvitN3ap0vnAinfU7PiKPmVP2dI9JKb6lBB zEHg== X-Gm-Message-State: AOAM5311rgqQk4kFQiVxQpZ3yV1zxpK10OAOOqB1Q8Rldd/Ey4dxpJ0P tNKl1DxtXGUruALaN38rgZKSQWlPhh7xDg== X-Google-Smtp-Source: ABdhPJwYitGMTeD2cK5kj6+zGxi4gy5j3Ikqrx28OOGxKCPjSf2TZwLzdfYgk1MnXae2y9supUWsRQ== X-Received: by 2002:a17:906:8cf:: with SMTP id o15mr15146840eje.603.1642418320033; Mon, 17 Jan 2022 03:18:40 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-82-52-8-210.retail.telecomitalia.it. [82.52.8.210]) by smtp.gmail.com with ESMTPSA id f11sm5142713edv.67.2022.01.17.03.18.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jan 2022 03:18:39 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Michael Trimarchi , Dario Binacchi , Han Xu , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org Subject: [RFC PATCH v2 5/5] mtd: rawnand: gpmi: support fast edo timings for mx28 Date: Mon, 17 Jan 2022 12:18:29 +0100 Message-Id: <20220117111829.1811997-6-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220117111829.1811997-1-dario.binacchi@amarulasolutions.com> References: <20220117111829.1811997-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In the i.MX28 manual (MCIMX28RM, Rev. 1, 2010) you can find an example (15.2.4 High-Speed NAND Timing) of how to configure the GPMI controller to manage High-Speed =E2=80=8B=E2=80=8BNAND devices, so it was wrong to ass= ume that only i.MX6 can achieve EDO timings. This patch has been tested on a 2048/64 byte NAND (Micron MT29F2G08ABAEAH4). Kernel mtd tests: - mtd_nandbiterrs - mtd_nandecctest - mtd_oobtest - mtd_pagetest - mtd_readtest - mtd_speedtest - mtd_stresstest - mtd_subpagetest - mtd_torturetest [cycles_count =3D 10000000] run without errors. Before this patch (mode 0): --------------------------- eraseblock write speed is 2098 KiB/s eraseblock read speed is 2680 KiB/s page write speed is 1689 KiB/s page read speed is 2522 KiB/s 2 page write speed is 1899 KiB/s 2 page read speed is 2579 KiB/s erase speed is 128000 KiB/s 2x multi-block erase speed is 73142 KiB/s 4x multi-block erase speed is 204800 KiB/s 8x multi-block erase speed is 256000 KiB/s 16x multi-block erase speed is 256000 KiB/s 32x multi-block erase speed is 256000 KiB/s 64x multi-block erase speed is 256000 KiB/s After this patch (mode 5): ------------------------- eraseblock write speed is 3390 KiB/s eraseblock read speed is 5688 KiB/s page write speed is 2680 KiB/s page read speed is 4876 KiB/s 2 page write speed is 2909 KiB/s 2 page read speed is 5224 KiB/s erase speed is 170666 KiB/s 2x multi-block erase speed is 204800 KiB/s 4x multi-block erase speed is 256000 KiB/s 8x multi-block erase speed is 256000 KiB/s 16x multi-block erase speed is 256000 KiB/s 32x multi-block erase speed is 256000 KiB/s 64x multi-block erase speed is 256000 KiB/s Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- Changes in v2: - Improve the commit message. - Move the patch to the end of the series. drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/= raw/gpmi-nand/gpmi-nand.c index 7ae7a37775a3..7b9191a70ed1 100644 --- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c +++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c @@ -806,8 +806,8 @@ static int gpmi_setup_interface(struct nand_chip *chip,= int chipnr, if (IS_ERR(sdr)) return PTR_ERR(sdr); =20 - /* Only MX6 GPMI controller can reach EDO timings */ - if (sdr->tRC_min <=3D 25000 && !GPMI_IS_MX6(this)) + /* Only MX28/MX6 GPMI controller can reach EDO timings */ + if (sdr->tRC_min <=3D 25000 && !GPMI_IS_MX28(this) && !GPMI_IS_MX6(this)) return -ENOTSUPP; =20 /* Stop here if this call was just a check */ --=20 2.32.0