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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id hb11sm4311083ejc.33.2022.01.12.02.00.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jan 2022 02:00:50 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Andi Shyti , Mark Brown , Rob Herring , Pratyush Yadav , linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Sam Protsenko Subject: [PATCH v3 1/4] ARM: dts: exynos: split dmas into array of phandles in Exynos5250 Date: Wed, 12 Jan 2022 11:00:43 +0100 Message-Id: <20220112100046.68068-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220112100046.68068-1-krzysztof.kozlowski@canonical.com> References: <20220112100046.68068-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" "dmas" property should be rather an array of phandles, as dtschema points. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Andi Shyti --- arch/arm/boot/dts/exynos5250.dtsi | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos52= 50.dtsi index 139778928b93..102bb57bf704 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -496,8 +496,7 @@ spi_0: spi@12d20000 { status =3D "disabled"; reg =3D <0x12d20000 0x100>; interrupts =3D ; - dmas =3D <&pdma0 5 - &pdma0 4>; + dmas =3D <&pdma0 5>, <&pdma0 4>; dma-names =3D "tx", "rx"; #address-cells =3D <1>; #size-cells =3D <0>; @@ -512,8 +511,7 @@ spi_1: spi@12d30000 { status =3D "disabled"; reg =3D <0x12d30000 0x100>; interrupts =3D ; - dmas =3D <&pdma1 5 - &pdma1 4>; + dmas =3D <&pdma1 5>, <&pdma1 4>; dma-names =3D "tx", "rx"; #address-cells =3D <1>; #size-cells =3D <0>; @@ -528,8 +526,7 @@ spi_2: spi@12d40000 { status =3D "disabled"; reg =3D <0x12d40000 0x100>; interrupts =3D ; - dmas =3D <&pdma0 7 - &pdma0 6>; + dmas =3D <&pdma0 7>, <&pdma0 6>; dma-names =3D "tx", "rx"; #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.32.0 From nobody Tue Jun 30 17:50:50 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C4C7C433F5 for ; Wed, 12 Jan 2022 10:01:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239771AbiALKBx (ORCPT ); Wed, 12 Jan 2022 05:01:53 -0500 Received: from smtp-relay-internal-1.canonical.com ([185.125.188.123]:58430 "EHLO smtp-relay-internal-1.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352220AbiALKBJ (ORCPT ); Wed, 12 Jan 2022 05:01:09 -0500 Received: from mail-ed1-f72.google.com (mail-ed1-f72.google.com [209.85.208.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 56E084031A for ; Wed, 12 Jan 2022 10:00:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1641981656; bh=ShG10dDQ0m2Ksx4bQGuuHioEPbEONzuC0YfanP+jiak=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WA1EYuz0cUn2+HSPm6nqGOtdg+HkJMEJz/X2jlFJ/urGoKED+qgbUS/BLBSqNZ4A8 jRaI10cWuo5tlNtIEgHzIOn17mxkfHBBvkgkNZDUBM0CnoqHC7zeS4fYe+LfG8nKIO Rw2UdBcaqVx8YmT9cwLmRefHjwtoEvzwdzp4Zd3VQVLn1H3ukyYDJAvR8fpw3Iw3Zl 7448bbH3lDklPf1Y3OjOZ8y2tY6xMNOc9K4ivta2OsPmsr85MxvpV24eTK5Gw6Rbj3 nbPGb1Zgzvi/2UVk0moL8pSSXf/BU0XdM+3rLrd6EvsW4iYifwqPd/ux+ikDvvxUcs hPvtbqFD7RLHQ== Received: by mail-ed1-f72.google.com with SMTP id c8-20020a05640227c800b003fdc1684cdeso1805728ede.12 for ; Wed, 12 Jan 2022 02:00:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ShG10dDQ0m2Ksx4bQGuuHioEPbEONzuC0YfanP+jiak=; b=V4NX4vpHzkuUciPmAjLpVkGnzba/D5ggCEb20naVsNe4mqeYaoCn7JxwZnFPWf3SeC 8JmSuuejTZwzhb+ouQSvuzWwiyxiDKTBtnmEayiZB2lC+p2mrSTLENcY/qESKQIBAk4Y 0Ok9SztNxH2oOloFYyduVRbFpDsU5G9r+05/BXrKINLtUZRFU8TPUS2umdSMyqYyXUV+ +b1oZbebvCCw5F+YX4zFU2HgT3isWKniBt+Xr0Q+iP3aia3h4qmt4rhdyx9yrBxmrF5O 2SjONH8INpQaE5awR6O1OERQPQUwRTvsXcVtkH3YNda8GCXo82ibFMcm1iblHAppw2eN EAOA== X-Gm-Message-State: AOAM532BrFfzvkvHdx4DTUQtEXDOlPfzOodIwNNo0fkJ134BMkse34X1 ShJcYcmBx9P37YtF+Ba+HBSshPkGV61yLIL5NPdRIR3Q9X1UVMs/fliaMgHQTVXdOl0bYeNm73x X26Sk0hkztzBZpe83F29FL6V7Ll+BnjTBoHYT/qJQQQ== X-Received: by 2002:a17:906:7315:: with SMTP id di21mr6904752ejc.700.1641981654260; Wed, 12 Jan 2022 02:00:54 -0800 (PST) X-Google-Smtp-Source: ABdhPJw+diLWP0KLMMq0aIMEUg7U5zfiI+rhf3/4AeUGcZCvnhh/sIXKdXM7SdsuYm5oRrd8dBQ1PA== X-Received: by 2002:a17:906:7315:: with SMTP id di21mr6904656ejc.700.1641981652462; Wed, 12 Jan 2022 02:00:52 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id hb11sm4311083ejc.33.2022.01.12.02.00.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jan 2022 02:00:52 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Andi Shyti , Mark Brown , Rob Herring , Pratyush Yadav , linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Sam Protsenko Subject: [PATCH v3 2/4] spi: dt-bindings: samsung: convert to dtschema Date: Wed, 12 Jan 2022 11:00:44 +0100 Message-Id: <20220112100046.68068-3-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220112100046.68068-1-krzysztof.kozlowski@canonical.com> References: <20220112100046.68068-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Convert the Samsung SoC (S3C24xx, S3C64xx, S5Pv210, Exynos) SPI controller bindings to DT schema format Signed-off-by: Krzysztof Kozlowski Reviewed-by: Sam Protsenko --- .../spi/samsung,spi-peripheral-props.yaml | 35 ++++ .../devicetree/bindings/spi/samsung,spi.yaml | 187 ++++++++++++++++++ .../bindings/spi/spi-peripheral-props.yaml | 1 + .../devicetree/bindings/spi/spi-samsung.txt | 122 ------------ MAINTAINERS | 2 +- 5 files changed, 224 insertions(+), 123 deletions(-) create mode 100644 Documentation/devicetree/bindings/spi/samsung,spi-perip= heral-props.yaml create mode 100644 Documentation/devicetree/bindings/spi/samsung,spi.yaml delete mode 100644 Documentation/devicetree/bindings/spi/spi-samsung.txt diff --git a/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-p= rops.yaml b/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-pr= ops.yaml new file mode 100644 index 000000000000..aa5a1f48494b --- /dev/null +++ b/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.ya= ml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/samsung,spi-peripheral-props.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Peripheral-specific properties for Samsung S3C/S5P/Exynos SoC SPI c= ontroller + +maintainers: + - Krzysztof Kozlowski + +description: + See spi-peripheral-props.yaml for more info. + +properties: + controller-data: + type: object + additionalProperties: false + + properties: + samsung,spi-feedback-delay: + description: | + The sampling phase shift to be applied on the miso line (to acco= unt + for any lag in the miso line). Valid values: + - 0: No phase shift. + - 1: 90 degree phase shift sampling. + - 2: 180 degree phase shift sampling. + - 3: 270 degree phase shift sampling. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + + required: + - samsung,spi-feedback-delay + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/spi/samsung,spi.yaml b/Docum= entation/devicetree/bindings/spi/samsung,spi.yaml new file mode 100644 index 000000000000..61c77088e8ee --- /dev/null +++ b/Documentation/devicetree/bindings/spi/samsung,spi.yaml @@ -0,0 +1,187 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/samsung,spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S3C/S5P/Exynos SoC SPI controller + +maintainers: + - Krzysztof Kozlowski + +description: + All the SPI controller nodes should be represented in the aliases node u= sing + the following format 'spi{n}' where n is a unique number for the alias. + +properties: + compatible: + oneOf: + - enum: + - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450 + - samsung,s3c6410-spi + - samsung,s5pv210-spi # for S5PV210 and S5PC110 + - samsung,exynos5433-spi + - const: samsung,exynos7-spi + deprecated: true + + clocks: + minItems: 2 + maxItems: 3 + + clock-names: + minItems: 2 + maxItems: 3 + + cs-gpios: true + + dmas: + minItems: 2 + maxItems: 2 + + dma-names: + items: + - const: tx + - const: rx + + interrupts: + maxItems: 1 + + no-cs-readback: + description: + The CS line is disconnected, therefore the device should not operate + based on CS signalling. + type: boolean + + num-cs: + minimum: 1 + maximum: 4 + default: 1 + + samsung,spi-src-clk: + description: + If the spi controller includes a internal clock mux to select the cl= ock + source for the spi bus clock, this property can be used to indicate = the + clock to be used for driving the spi bus clock. If not specified, the + clock number 0 is used as default. + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + + reg: + maxItems: 1 + +required: + - compatible + - clocks + - clock-names + - dmas + - dma-names + - interrupts + - reg + +allOf: + - $ref: spi-controller.yaml# + - if: + properties: + compatible: + contains: + const: samsung,exynos5433-spi + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + items: + - const: spi + - enum: + - spi_busclk0 + - spi_busclk1 + - spi_busclk2 + - spi_busclk3 + - const: spi_ioclk + else: + properties: + clocks: + minItems: 2 + maxItems: 2 + clock-names: + items: + - const: spi + - enum: + - spi_busclk0 + - spi_busclk1 + - spi_busclk2 + - spi_busclk3 + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + + spi@14d30000 { + compatible =3D "samsung,exynos5433-spi"; + reg =3D <0x14d30000 0x100>; + interrupts =3D ; + dmas =3D <&pdma0 11>, <&pdma0 10>; + dma-names =3D "tx", "rx"; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric CLK_PCLK_SPI1>, + <&cmu_peric CLK_SCLK_SPI1>, + <&cmu_peric CLK_SCLK_IOCLK_SPI1>; + clock-names =3D "spi", + "spi_busclk0", + "spi_ioclk"; + samsung,spi-src-clk =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spi1_bus>; + num-cs =3D <1>; + + cs-gpios =3D <&gpd6 3 GPIO_ACTIVE_HIGH>; + + audio-codec@0 { + compatible =3D "wlf,wm5110"; + reg =3D <0x0>; + spi-max-frequency =3D <20000000>; + interrupt-parent =3D <&gpa0>; + interrupts =3D <4 IRQ_TYPE_NONE>; + clocks =3D <&pmu_system_controller 0>, + <&s2mps13_osc S2MPS11_CLK_BT>; + clock-names =3D "mclk1", "mclk2"; + + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + + wlf,micd-detect-debounce =3D <300>; + wlf,micd-bias-start-time =3D <0x1>; + wlf,micd-rate =3D <0x7>; + wlf,micd-dbtime =3D <0x2>; + wlf,micd-force-micbias; + wlf,micd-configs =3D <0x0 1 0>; + wlf,hpdet-channel =3D <1>; + wlf,gpsw =3D <0x1>; + wlf,inmode =3D <2 0 2 0>; + + wlf,reset =3D <&gpc0 7 GPIO_ACTIVE_HIGH>; + wlf,ldoena =3D <&gpf0 0 GPIO_ACTIVE_HIGH>; + + /* core supplies */ + AVDD-supply =3D <&ldo18_reg>; + DBVDD1-supply =3D <&ldo18_reg>; + CPVDD-supply =3D <&ldo18_reg>; + DBVDD2-supply =3D <&ldo18_reg>; + DBVDD3-supply =3D <&ldo18_reg>; + SPKVDDL-supply =3D <&ldo18_reg>; + SPKVDDR-supply =3D <&ldo18_reg>; + + controller-data { + samsung,spi-feedback-delay =3D <0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yam= l b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index 5dd209206e88..df885eeb144f 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -85,5 +85,6 @@ properties: # The controller specific properties go here. allOf: - $ref: cdns,qspi-nor-peripheral-props.yaml# + - $ref: samsung,spi-peripheral-props.yaml# =20 additionalProperties: true diff --git a/Documentation/devicetree/bindings/spi/spi-samsung.txt b/Docume= ntation/devicetree/bindings/spi/spi-samsung.txt deleted file mode 100644 index 49028a4f5df1..000000000000 --- a/Documentation/devicetree/bindings/spi/spi-samsung.txt +++ /dev/null @@ -1,122 +0,0 @@ -* Samsung SPI Controller - -The Samsung SPI controller is used to interface with various devices such = as flash -and display controllers using the SPI communication interface. - -Required SoC Specific Properties: - -- compatible: should be one of the following. - - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms - - samsung,s3c6410-spi: for s3c6410 platforms - - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms - - samsung,exynos5433-spi: for exynos5433 compatible controllers - - samsung,exynos7-spi: for exynos7 platforms - -- reg: physical base address of the controller and length of memory mapped - region. - -- interrupts: The interrupt number to the cpu. The interrupt specifier for= mat - depends on the interrupt controller. - -- dmas : Two or more DMA channel specifiers following the convention outli= ned - in bindings/dma/dma.txt - -- dma-names: Names for the dma channels. There must be at least one channel - named "tx" for transmit and named "rx" for receive. - -- clocks: specifies the clock IDs provided to the SPI controller; they are - required for interacting with the controller itself, for synchronizing t= he bus - and as I/O clock (the latter is required by exynos5433 and exynos7). - -- clock-names: string names of the clocks in the 'clocks' property; for al= l the - the devices the names must be "spi", "spi_busclkN" (where N is determine= d by - "samsung,spi-src-clk"), while Exynos5433 should specify a third clock - "spi_ioclk" for the I/O clock. - -Required Board Specific Properties: - -- #address-cells: should be 1. -- #size-cells: should be 0. - -Optional Board Specific Properties: - -- samsung,spi-src-clk: If the spi controller includes a internal clock mux= to - select the clock source for the spi bus clock, this property can be used= to - indicate the clock to be used for driving the spi bus clock. If not spec= ified, - the clock number 0 is used as default. - -- num-cs: Specifies the number of chip select lines supported. If - not specified, the default number of chip select lines is set to 1. - -- cs-gpios: should specify GPIOs used for chipselects (see spi-bus.txt) - -- no-cs-readback: the CS line is disconnected, therefore the device should= not - operate based on CS signalling. - -SPI Controller specific data in SPI slave nodes: - -- The spi slave nodes should provide the following information which is re= quired - by the spi controller. - - - samsung,spi-feedback-delay: The sampling phase shift to be applied on = the - miso line (to account for any lag in the miso line). The following are= the - valid values. - - - 0: No phase shift. - - 1: 90 degree phase shift sampling. - - 2: 180 degree phase shift sampling. - - 3: 270 degree phase shift sampling. - -Aliases: - -- All the SPI controller nodes should be represented in the aliases node u= sing - the following format 'spi{n}' where n is a unique number for the alias. - - -Example: - -- SoC Specific Portion: - - spi_0: spi@12d20000 { - compatible =3D "samsung,exynos4210-spi"; - reg =3D <0x12d20000 0x100>; - interrupts =3D <0 66 0>; - dmas =3D <&pdma0 5 - &pdma0 4>; - dma-names =3D "tx", "rx"; - #address-cells =3D <1>; - #size-cells =3D <0>; - }; - -- Board Specific Portion: - - spi_0: spi@12d20000 { - #address-cells =3D <1>; - #size-cells =3D <0>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&spi0_bus>; - cs-gpios =3D <&gpa2 5 0>; - - w25q80bw@0 { - #address-cells =3D <1>; - #size-cells =3D <1>; - compatible =3D "w25x80"; - reg =3D <0>; - spi-max-frequency =3D <10000>; - - controller-data { - samsung,spi-feedback-delay =3D <0>; - }; - - partition@0 { - label =3D "U-Boot"; - reg =3D <0x0 0x40000>; - read-only; - }; - - partition@40000 { - label =3D "Kernel"; - reg =3D <0x40000 0xc0000>; - }; - }; - }; diff --git a/MAINTAINERS b/MAINTAINERS index 5ea5655a29c3..1f951bc877f0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17054,7 +17054,7 @@ M: Andi Shyti L: linux-spi@vger.kernel.org L: linux-samsung-soc@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/spi/spi-samsung.txt +F: Documentation/devicetree/bindings/spi/samsung,spi*.yaml F: drivers/spi/spi-s3c* F: include/linux/platform_data/spi-s3c64xx.h F: include/linux/spi/s3c24xx-fiq.h --=20 2.32.0 From nobody Tue Jun 30 17:50:50 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42EE8C4332F for ; Wed, 12 Jan 2022 10:01:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239651AbiALKBO (ORCPT ); Wed, 12 Jan 2022 05:01:14 -0500 Received: from smtp-relay-internal-1.canonical.com ([185.125.188.123]:58338 "EHLO smtp-relay-internal-1.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239524AbiALKAz (ORCPT ); Wed, 12 Jan 2022 05:00:55 -0500 Received: from mail-ed1-f72.google.com (mail-ed1-f72.google.com [209.85.208.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 6F9443F1EE for ; Wed, 12 Jan 2022 10:00:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1641981654; bh=sxpoeazVKfRv/TTxlIPcEu0VInhZebJSCyyifiEPVW0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=QZUYb41T2r0gJfdj/JmDwla5q8wYEtI9NUG9iQdPMhA0U0eXvqP8G0mA3astSE+vI FUIBSv15HA131v5blSaslsxmFsSnm7J1jz1A82Y0ircmq4DaeBUt0XCtYSaVwJlllQ F+fuL08NAZz093cOHoav4Y2w+Dqt5TQ12lAg8ZrQcs10zAQf3FB5Xv8Lx08qPWaBqA f3t4fwZYvrqr0dRI87CpyfyRVcFmVVwbdS7DhOVXqobVtDHOoFt1irdOOzeoUereyr FPCYroFeRq/qJVjnavE4rIIkn1u4PG/PJP2BPebaBNpp4I66qQoyyxR8ROHChuvvCl ChjA46oUZG4HQ== Received: by mail-ed1-f72.google.com with SMTP id q15-20020a056402518f00b003f87abf9c37so1786808edd.15 for ; Wed, 12 Jan 2022 02:00:54 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sxpoeazVKfRv/TTxlIPcEu0VInhZebJSCyyifiEPVW0=; b=mPBAtVT/q4yQ0F7DOEw7Z52LMZOqcfCBcm7iXJJOXWI5IBlvILvAU+Aj0MuN9bQ8gV uDIMgKXKUQi74QC8I4Oe7yygijCIUnOijdRVG0YEOleGoUYv+q8/oJbrwxTjAwPj4nJE Ie0GQb8xmn4+oQhjDPpFkbVlfjSX1UYt8FGJJfkRuCq6qnl2ACadPqr3y8o5RaacPwzQ o4/u3SXGOVr8knGBTH1TmDV7PbUSOrcyTX9msKIMFUaRyccEG/YOw+f8zwzAWicAx9pO CsP/rfsbEoKrmQ7fQews0/4m2WuUeZ4Fb4xqxj0Di6YCe9f9EuyY+WaSPx77MOnpNclu og6g== X-Gm-Message-State: AOAM533AsVzRgw6hvDNHHRGRhUxIoaaSN15SkB+jrio3m026o0Y9BaIp /Itrsc6mrOZOVW7U0+YB1quVWzsx4S45dfXH6ME1NtkKYRyloejsJdL7zAfetUURqdfMZO1+Wso AMtODcHdD+UW8OGsw5dop7RnHOuIy6wEAua8LKwzIdg== X-Received: by 2002:a17:907:7d8a:: with SMTP id oz10mr2375257ejc.320.1641981653521; Wed, 12 Jan 2022 02:00:53 -0800 (PST) X-Google-Smtp-Source: ABdhPJzzzXqkrKxbgq5mvkmGUzVcTyBUQLnw1MTu9OyibOn3Q74mOavVnNmdXwrnaGEsFJ/VZr09+g== X-Received: by 2002:a17:907:7d8a:: with SMTP id oz10mr2375244ejc.320.1641981653311; Wed, 12 Jan 2022 02:00:53 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id hb11sm4311083ejc.33.2022.01.12.02.00.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jan 2022 02:00:52 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Andi Shyti , Mark Brown , Rob Herring , Pratyush Yadav , linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Sam Protsenko , Rob Herring Subject: [PATCH v3 3/4] spi: dt-bindings: samsung: allow controller-data to be optional Date: Wed, 12 Jan 2022 11:00:45 +0100 Message-Id: <20220112100046.68068-4-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220112100046.68068-1-krzysztof.kozlowski@canonical.com> References: <20220112100046.68068-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Samsung SoC SPI bindings requires to provide controller-data node for each of SPI peripheral device nodes. Make this controller-data node optional, so DTS could be simpler. Suggested-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../devicetree/bindings/spi/samsung,spi-peripheral-props.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-p= rops.yaml b/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-pr= ops.yaml index aa5a1f48494b..cadc8a5f061f 100644 --- a/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.ya= ml +++ b/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.ya= ml @@ -28,6 +28,7 @@ properties: - 3: 270 degree phase shift sampling. $ref: /schemas/types.yaml#/definitions/uint32 enum: [0, 1, 2, 3] + default: 0 =20 required: - samsung,spi-feedback-delay --=20 2.32.0 From nobody Tue Jun 30 17:50:50 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F65FC433F5 for ; Wed, 12 Jan 2022 10:01:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352403AbiALKBp (ORCPT ); Wed, 12 Jan 2022 05:01:45 -0500 Received: from smtp-relay-internal-1.canonical.com ([185.125.188.123]:58422 "EHLO smtp-relay-internal-1.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239501AbiALKBH (ORCPT ); Wed, 12 Jan 2022 05:01:07 -0500 Received: from mail-ed1-f72.google.com (mail-ed1-f72.google.com [209.85.208.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 4105D4031B for ; Wed, 12 Jan 2022 10:00:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1641981655; bh=vkZ3shAsrts82aZQTD9Odzm7oGr7rqF0WKQDjTKTwd8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=S7HG6Oi3Xdgd9IQ6IB9xO4/FlOuXdwlL8p1wzr9IojJNAoPTeYo67CeiQ4Mm/5j0d msHHEZ4yo7CPwhZd5krDR22Iw0HHyfhXOiqZvcEQoEJWkxQzKTcFci4W94vJy+H51p eoxvOHwkhT74ZwkxvVVoS+W6bPbrzwkiU4Dnwak0G7EJhoUZw36e7W6i91NpR4vcCD 8E5bfO1LETYSLd2qNVh7GM9ye3rrzf+JfQYguNy5W8gr2o3SK2o4nlhxYQuPjd/YVI y2vjmevgk2iPzNt3rm2YzD/Y/sWoMdNvgHKDni/q0BqdlQOehu/wKWqsCIhyQBfspA 4dCcUxe13IWkg== Received: by mail-ed1-f72.google.com with SMTP id m8-20020a056402510800b003f9d22c4d48so1766949edd.21 for ; Wed, 12 Jan 2022 02:00:55 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vkZ3shAsrts82aZQTD9Odzm7oGr7rqF0WKQDjTKTwd8=; b=0eMT0CCbXONNlihETBJ4Nbz3VoZGZoGdMhwCmrL19hcAEFXsKid4CYsru+Nsvhmxf5 JhfxlVj0J2ng7G21G1tLQQL9RKasMVeaG1PDWlLRGFW/nCcc8QUiDjIIe9RHIGSriV1c F6vBrXIQzOk4CpE9Y5Y9tTcy1rsI7O0gT5D2xaa7KKCcn/uFeTnPxMXML8uvwcGZFCwh 2BAqA2jfrdIf8UvW33+3AFRfISu7sJKOGJVksv7AMuLgR5VTM5kMOflZrAw/4ua6xhSL k7uN7FEiaVThQMNAkkCdyDBIatFTWkswb628Zk4NwDmXb9WuediX2ZvJwy9Wein1CHlK X73g== X-Gm-Message-State: AOAM530tj7xuysxTVLs3JKGb/egVwvmh/obqYlIRMPHevJrpaKTuwfJ7 C2uKlOM5Inek8koGp9RzCD5WYWOm9bY5qv5yquOy9umDaiVMKoURN93ssTEx8H6tgFHYRLXI2Ik Qb5jzLYm+DlKoemF9/j8nOHwbIxuMJ8dOQMepNUmMGw== X-Received: by 2002:a17:907:7295:: with SMTP id dt21mr6749935ejc.453.1641981654827; Wed, 12 Jan 2022 02:00:54 -0800 (PST) X-Google-Smtp-Source: ABdhPJxr7AHmnhL8e6o/jXCWgESvLqrOYDTSQTTXkoaFmOMriyvAZ3QFfDrNia5S1pL4Lx8Q/Cv4WQ== X-Received: by 2002:a17:907:7295:: with SMTP id dt21mr6749917ejc.453.1641981654645; Wed, 12 Jan 2022 02:00:54 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id hb11sm4311083ejc.33.2022.01.12.02.00.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jan 2022 02:00:53 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Andi Shyti , Mark Brown , Rob Herring , Pratyush Yadav , linux-spi@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Sam Protsenko , Rob Herring Subject: [PATCH v3 4/4] spi: s3c64xx: allow controller-data to be optional Date: Wed, 12 Jan 2022 11:00:46 +0100 Message-Id: <20220112100046.68068-5-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220112100046.68068-1-krzysztof.kozlowski@canonical.com> References: <20220112100046.68068-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Samsung SoC SPI driver requires to provide controller-data node for each of SPI peripheral device nodes. Make this controller-data node optional, so DTS could be simpler. Suggested-by: Rob Herring Signed-off-by: Krzysztof Kozlowski --- drivers/spi/spi-s3c64xx.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 8755cd85e83c..769d958a2f86 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -796,16 +796,14 @@ static struct s3c64xx_spi_csinfo *s3c64xx_get_slave_c= trldata( return ERR_PTR(-EINVAL); } =20 - data_np =3D of_get_child_by_name(slave_np, "controller-data"); - if (!data_np) { - dev_err(&spi->dev, "child node 'controller-data' not found\n"); - return ERR_PTR(-EINVAL); - } - cs =3D kzalloc(sizeof(*cs), GFP_KERNEL); - if (!cs) { - of_node_put(data_np); + if (!cs) return ERR_PTR(-ENOMEM); + + data_np =3D of_get_child_by_name(slave_np, "controller-data"); + if (!data_np) { + dev_info(&spi->dev, "child node 'controller-data' not found, using defau= lts\n"); + return cs; } =20 of_property_read_u32(data_np, "samsung,spi-feedback-delay", &fb_delay); --=20 2.32.0