From nobody Tue Jun 30 20:11:00 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA853C43217 for ; Mon, 10 Jan 2022 10:42:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244115AbiAJKmv (ORCPT ); Mon, 10 Jan 2022 05:42:51 -0500 Received: from mail-sh.amlogic.com ([58.32.228.43]:41675 "EHLO mail-sh.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244091AbiAJKmr (ORCPT ); Mon, 10 Jan 2022 05:42:47 -0500 Received: from droid06.amlogic.com (10.18.11.248) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2176.14; Mon, 10 Jan 2022 18:42:44 +0800 From: Yu Tu To: , , , , CC: Greg Kroah-Hartman , Rob Herring , Jiri Slaby , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Yu Tu Subject: [PATCH V5 1/5] dt-bindings: serial: meson: Drop legacy compatible. Date: Mon, 10 Jan 2022 18:42:10 +0800 Message-ID: <20220110104214.25321-2-yu.tu@amlogic.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220110104214.25321-1-yu.tu@amlogic.com> References: <20220110104214.25321-1-yu.tu@amlogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.18.11.248] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Deprecated, don't use anymore because legacy amlogic,meson-gx-uart compatible. Don't differentiate between GXBB, GXL and G12A which have different revisions of the UART IP. So it's split into GXBB,GXL and G12A. Signed-off-by: Yu Tu --- .../devicetree/bindings/serial/amlogic,meson-uart.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.ya= ml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml index 72e8868db3e0..ad9f1f4537a0 100644 --- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml +++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml @@ -28,7 +28,10 @@ properties: - amlogic,meson6-uart - amlogic,meson8-uart - amlogic,meson8b-uart - - amlogic,meson-gx-uart + - amlogic,meson-gx-uart # deprecated, use revision specific = property below + - amlogic,meson-gxbb-uart + - amlogic,meson-gxl-uart + - amlogic,meson-g12a-uart - amlogic,meson-s4-uart - const: amlogic,meson-ao-uart - description: Everything-Else power domain UART controller @@ -36,7 +39,10 @@ properties: - amlogic,meson6-uart - amlogic,meson8-uart - amlogic,meson8b-uart - - amlogic,meson-gx-uart + - amlogic,meson-gx-uart # deprecated, use revision specific prop= erty below + - amlogic,meson-gxbb-uart + - amlogic,meson-gxl-uart + - amlogic,meson-g12a-uart - amlogic,meson-s4-uart =20 reg: --=20 2.33.1 From nobody Tue Jun 30 20:11:00 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EE7FC4332F for ; Mon, 10 Jan 2022 10:42:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244121AbiAJKmx (ORCPT ); Mon, 10 Jan 2022 05:42:53 -0500 Received: from mail-sh.amlogic.com ([58.32.228.43]:41675 "EHLO mail-sh.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244104AbiAJKmu (ORCPT ); Mon, 10 Jan 2022 05:42:50 -0500 Received: from droid06.amlogic.com (10.18.11.248) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2176.14; Mon, 10 Jan 2022 18:42:46 +0800 From: Yu Tu To: , , , , CC: Greg Kroah-Hartman , Rob Herring , Jiri Slaby , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Yu Tu Subject: [PATCH V5 2/5] tty: serial: meson: Move request the register region. Date: Mon, 10 Jan 2022 18:42:11 +0800 Message-ID: <20220110104214.25321-3-yu.tu@amlogic.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220110104214.25321-1-yu.tu@amlogic.com> References: <20220110104214.25321-1-yu.tu@amlogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.18.11.248] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This simplifies resetting the UART controller during probe and will make it easier to integrate the common clock code which will require the registers at probe time as well. Signed-off-by: Yu Tu --- drivers/tty/serial/meson_uart.c | 24 ++++++------------------ 1 file changed, 6 insertions(+), 18 deletions(-) diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uar= t.c index 45e00d928253..7570958d010c 100644 --- a/drivers/tty/serial/meson_uart.c +++ b/drivers/tty/serial/meson_uart.c @@ -395,24 +395,11 @@ static int meson_uart_verify_port(struct uart_port *p= ort, =20 static void meson_uart_release_port(struct uart_port *port) { - devm_iounmap(port->dev, port->membase); - port->membase =3D NULL; - devm_release_mem_region(port->dev, port->mapbase, port->mapsize); + /* nothing to do */ } =20 static int meson_uart_request_port(struct uart_port *port) { - if (!devm_request_mem_region(port->dev, port->mapbase, port->mapsize, - dev_name(port->dev))) { - dev_err(port->dev, "Memory region busy\n"); - return -EBUSY; - } - - port->membase =3D devm_ioremap(port->dev, port->mapbase, - port->mapsize); - if (!port->membase) - return -ENOMEM; - return 0; } =20 @@ -733,6 +720,10 @@ static int meson_uart_probe(struct platform_device *pd= ev) if (!port) return -ENOMEM; =20 + port->membase =3D devm_ioremap_resource(&pdev->dev, res_mem); + if (IS_ERR(port->membase)) + return PTR_ERR(port->membase); + ret =3D meson_uart_probe_clocks(pdev, port); if (ret) return ret; @@ -754,10 +745,7 @@ static int meson_uart_probe(struct platform_device *pd= ev) platform_set_drvdata(pdev, port); =20 /* reset port before registering (and possibly registering console) */ - if (meson_uart_request_port(port) >=3D 0) { - meson_uart_reset(port); - meson_uart_release_port(port); - } + meson_uart_reset(port); =20 ret =3D uart_add_one_port(&meson_uart_driver, port); if (ret) --=20 2.33.1 From nobody Tue Jun 30 20:11:00 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDE7BC433EF for ; Mon, 10 Jan 2022 10:43:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244183AbiAJKnK (ORCPT ); Mon, 10 Jan 2022 05:43:10 -0500 Received: from mail-sh.amlogic.com ([58.32.228.43]:41675 "EHLO mail-sh.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244117AbiAJKmx (ORCPT ); Mon, 10 Jan 2022 05:42:53 -0500 Received: from droid06.amlogic.com (10.18.11.248) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2176.14; Mon, 10 Jan 2022 18:42:48 +0800 From: Yu Tu To: , , , , CC: Greg Kroah-Hartman , Rob Herring , Jiri Slaby , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Yu Tu Subject: [PATCH V5 3/5] tty: serial: meson: Using the common clock code describe. Date: Mon, 10 Jan 2022 18:42:12 +0800 Message-ID: <20220110104214.25321-4-yu.tu@amlogic.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220110104214.25321-1-yu.tu@amlogic.com> References: <20220110104214.25321-1-yu.tu@amlogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.18.11.248] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Using the common Clock code to describe the UART baud rate clock makes it easier for the UART driver to be compatible with the baud rate requirements of the UART IP on different meson chips. Signed-off-by: Yu Tu --- drivers/tty/serial/meson_uart.c | 224 +++++++++++++++++++++++--------- 1 file changed, 163 insertions(+), 61 deletions(-) diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uar= t.c index 7570958d010c..1004fd0b0c9e 100644 --- a/drivers/tty/serial/meson_uart.c +++ b/drivers/tty/serial/meson_uart.c @@ -6,6 +6,7 @@ */ =20 #include +#include #include #include #include @@ -65,9 +66,7 @@ #define AML_UART_RECV_IRQ(c) ((c) & 0xff) =20 /* AML_UART_REG5 bits */ -#define AML_UART_BAUD_MASK 0x7fffff #define AML_UART_BAUD_USE BIT(23) -#define AML_UART_BAUD_XTAL BIT(24) =20 #define AML_UART_PORT_NUM 12 #define AML_UART_PORT_OFFSET 6 @@ -76,6 +75,13 @@ #define AML_UART_POLL_USEC 5 #define AML_UART_TIMEOUT_USEC 10000 =20 +struct meson_uart_data { + struct uart_port port; + struct clk *pclk; + struct clk *baud_clk; + bool use_xtal_clk; +}; + static struct uart_driver meson_uart_driver; =20 static struct uart_port *meson_ports[AML_UART_PORT_NUM]; @@ -268,14 +274,11 @@ static void meson_uart_reset(struct uart_port *port) static int meson_uart_startup(struct uart_port *port) { u32 val; - int ret =3D 0; + int ret; =20 - val =3D readl(port->membase + AML_UART_CONTROL); - val |=3D AML_UART_CLEAR_ERR; - writel(val, port->membase + AML_UART_CONTROL); - val &=3D ~AML_UART_CLEAR_ERR; - writel(val, port->membase + AML_UART_CONTROL); + meson_uart_reset(port); =20 + val =3D readl(port->membase + AML_UART_CONTROL); val |=3D (AML_UART_RX_EN | AML_UART_TX_EN); writel(val, port->membase + AML_UART_CONTROL); =20 @@ -293,19 +296,17 @@ static int meson_uart_startup(struct uart_port *port) =20 static void meson_uart_change_speed(struct uart_port *port, unsigned long = baud) { + struct meson_uart_data *private_data =3D port->private_data; u32 val; =20 while (!meson_uart_tx_empty(port)) cpu_relax(); =20 - if (port->uartclk =3D=3D 24000000) { - val =3D ((port->uartclk / 3) / baud) - 1; - val |=3D AML_UART_BAUD_XTAL; - } else { - val =3D ((port->uartclk * 10 / (baud * 4) + 5) / 10) - 1; - } + val =3D readl(port->membase + AML_UART_REG5); val |=3D AML_UART_BAUD_USE; writel(val, port->membase + AML_UART_REG5); + + clk_set_rate(private_data->baud_clk, baud); } =20 static void meson_uart_set_termios(struct uart_port *port, @@ -395,11 +396,27 @@ static int meson_uart_verify_port(struct uart_port *p= ort, =20 static void meson_uart_release_port(struct uart_port *port) { - /* nothing to do */ + struct meson_uart_data *private_data =3D port->private_data; + + clk_disable_unprepare(private_data->baud_clk); + clk_disable_unprepare(private_data->pclk); } =20 static int meson_uart_request_port(struct uart_port *port) { + struct meson_uart_data *private_data =3D port->private_data; + int ret; + + ret =3D clk_prepare_enable(private_data->pclk); + if (ret) + return ret; + + ret =3D clk_prepare_enable(private_data->baud_clk); + if (ret) { + clk_disable_unprepare(private_data->pclk); + return ret; + } + return 0; } =20 @@ -629,55 +646,105 @@ static struct uart_driver meson_uart_driver =3D { .cons =3D MESON_SERIAL_CONSOLE, }; =20 -static inline struct clk *meson_uart_probe_clock(struct device *dev, - const char *id) +#define CLK_NAME(name) \ +({\ + char clk_name[32];\ + snprintf(clk_name, sizeof(clk_name), "%s#%s", dev_name(port->dev), #name)= ;\ + clk_name;\ +}) + +static struct clk_div_table xtal_div_table[] =3D { + { 0, 3 }, + { 1, 1 }, + { 2, 2 }, + { 3, 2 }, +}; + +static int meson_uart_probe_clocks(struct uart_port *port) { - struct clk *clk =3D NULL; - int ret; + struct meson_uart_data *private_data =3D port->private_data; + struct clk *clk_baud, *clk_xtal; + struct clk_hw *hw; + struct clk_parent_data use_xtal_mux_parents[2] =3D { + { .index =3D -1, }, + { .index =3D -1, }, + }; =20 - clk =3D devm_clk_get(dev, id); - if (IS_ERR(clk)) - return clk; + private_data->pclk =3D devm_clk_get(port->dev, "pclk"); + if (IS_ERR(private_data->pclk)) + return dev_err_probe(port->dev, PTR_ERR(private_data->pclk), + "Failed to get the 'pclk' clock\n"); =20 - ret =3D clk_prepare_enable(clk); - if (ret) { - dev_err(dev, "couldn't enable clk\n"); - return ERR_PTR(ret); + clk_baud =3D devm_clk_get(port->dev, "baud"); + if (IS_ERR(clk_baud)) { + dev_err(port->dev, "Failed to get the 'baud' clock\n"); + return PTR_ERR(clk_baud); } =20 - devm_add_action_or_reset(dev, - (void(*)(void *))clk_disable_unprepare, - clk); - - return clk; -} - -static int meson_uart_probe_clocks(struct platform_device *pdev, - struct uart_port *port) -{ - struct clk *clk_xtal =3D NULL; - struct clk *clk_pclk =3D NULL; - struct clk *clk_baud =3D NULL; - - clk_pclk =3D meson_uart_probe_clock(&pdev->dev, "pclk"); - if (IS_ERR(clk_pclk)) - return PTR_ERR(clk_pclk); - - clk_xtal =3D meson_uart_probe_clock(&pdev->dev, "xtal"); + clk_xtal =3D devm_clk_get(port->dev, "xtal"); if (IS_ERR(clk_xtal)) - return PTR_ERR(clk_xtal); - - clk_baud =3D meson_uart_probe_clock(&pdev->dev, "baud"); - if (IS_ERR(clk_baud)) - return PTR_ERR(clk_baud); + return dev_err_probe(port->dev, PTR_ERR(clk_xtal), + "Failed to get the 'xtal' clock\n"); + + if (private_data->use_xtal_clk) { + hw =3D devm_clk_hw_register_divider_table(port->dev, + CLK_NAME(xtal_div), + __clk_get_name(clk_baud), + CLK_SET_RATE_NO_REPARENT, + port->membase + AML_UART_REG5, + 26, 2, + CLK_DIVIDER_READ_ONLY, + xtal_div_table, NULL); + if (IS_ERR(hw)) + return PTR_ERR(hw); + + use_xtal_mux_parents[1].hw =3D hw; + } else { + hw =3D devm_clk_hw_register_fixed_factor(port->dev, + CLK_NAME(clk81_div4), + __clk_get_name(clk_baud), + CLK_SET_RATE_NO_REPARENT, + 1, 4); + if (IS_ERR(hw)) + return PTR_ERR(hw); + + use_xtal_mux_parents[0].hw =3D hw; + } =20 - port->uartclk =3D clk_get_rate(clk_baud); + hw =3D __devm_clk_hw_register_mux(port->dev, NULL, + CLK_NAME(use_xtal), + ARRAY_SIZE(use_xtal_mux_parents), + NULL, NULL, + use_xtal_mux_parents, + CLK_SET_RATE_PARENT, + port->membase + AML_UART_REG5, + 24, 0x1, + CLK_MUX_READ_ONLY, + NULL, NULL); + if (IS_ERR(hw)) + return PTR_ERR(hw); + + port->uartclk =3D clk_hw_get_rate(hw); + + hw =3D devm_clk_hw_register_divider(port->dev, + CLK_NAME(baud_div), + clk_hw_get_name(hw), + CLK_SET_RATE_PARENT, + port->membase + AML_UART_REG5, + 0, 23, + CLK_DIVIDER_ROUND_CLOSEST, + NULL); + if (IS_ERR(hw)) + return PTR_ERR(hw); + + private_data->baud_clk =3D clk_hw_get_clk(hw, "baud_rate"); =20 return 0; } =20 static int meson_uart_probe(struct platform_device *pdev) { + struct meson_uart_data *private_data; struct resource *res_mem; struct uart_port *port; u32 fifosize =3D 64; /* Default is 64, 128 for EE UART_0 */ @@ -716,18 +783,20 @@ static int meson_uart_probe(struct platform_device *p= dev) return -EBUSY; } =20 - port =3D devm_kzalloc(&pdev->dev, sizeof(struct uart_port), GFP_KERNEL); - if (!port) + private_data =3D devm_kzalloc(&pdev->dev, sizeof(*private_data), + GFP_KERNEL); + if (!private_data) return -ENOMEM; =20 + if (device_get_match_data(&pdev->dev)) + private_data->use_xtal_clk =3D true; + + port =3D &private_data->port; + port->membase =3D devm_ioremap_resource(&pdev->dev, res_mem); if (IS_ERR(port->membase)) return PTR_ERR(port->membase); =20 - ret =3D meson_uart_probe_clocks(pdev, port); - if (ret) - return ret; - port->iotype =3D UPIO_MEM; port->mapbase =3D res_mem->start; port->mapsize =3D resource_size(res_mem); @@ -740,7 +809,11 @@ static int meson_uart_probe(struct platform_device *pd= ev) port->x_char =3D 0; port->ops =3D &meson_uart_ops; port->fifosize =3D fifosize; + port->private_data =3D private_data; =20 + ret =3D meson_uart_probe_clocks(port); + if (ret) + return ret; meson_ports[pdev->id] =3D port; platform_set_drvdata(pdev, port); =20 @@ -766,10 +839,39 @@ static int meson_uart_remove(struct platform_device *= pdev) } =20 static const struct of_device_id meson_uart_dt_match[] =3D { - { .compatible =3D "amlogic,meson6-uart" }, - { .compatible =3D "amlogic,meson8-uart" }, - { .compatible =3D "amlogic,meson8b-uart" }, - { .compatible =3D "amlogic,meson-gx-uart" }, + { + .compatible =3D "amlogic,meson6-uart", + .data =3D (void *)false, + }, + { + .compatible =3D "amlogic,meson8-uart", + .data =3D (void *)false, + }, + { + .compatible =3D "amlogic,meson8b-uart", + .data =3D (void *)false, + }, + { + .compatible =3D "amlogic,meson-gxbb-uart", + .data =3D (void *)false, + }, + { + .compatible =3D "amlogic,meson-gxl-uart", + .data =3D (void *)true, + }, + { + .compatible =3D "amlogic,meson-g12a-uart", + .data =3D (void *)true, + }, + /* + * deprecated, don't use anymore because it doesn't differentiate + * between GXBB, GXL and G12A which have different revisions + * of the UART IP. + */ + { + .compatible =3D "amlogic,meson-gx-uart", + .data =3D (void *)false, + }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, meson_uart_dt_match); --=20 2.33.1 From nobody Tue Jun 30 20:11:00 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04955C433EF for ; Mon, 10 Jan 2022 10:43:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244156AbiAJKnd (ORCPT ); Mon, 10 Jan 2022 05:43:33 -0500 Received: from mail-sh.amlogic.com ([58.32.228.43]:41675 "EHLO mail-sh.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244122AbiAJKnF (ORCPT ); Mon, 10 Jan 2022 05:43:05 -0500 Received: from droid06.amlogic.com (10.18.11.248) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2176.14; Mon, 10 Jan 2022 18:42:51 +0800 From: Yu Tu To: , , , , CC: Greg Kroah-Hartman , Rob Herring , Jiri Slaby , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Yu Tu Subject: [PATCH V5 4/5] tty: serial: meson: Make some bit of the REG5 register writable. Date: Mon, 10 Jan 2022 18:42:13 +0800 Message-ID: <20220110104214.25321-5-yu.tu@amlogic.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220110104214.25321-1-yu.tu@amlogic.com> References: <20220110104214.25321-1-yu.tu@amlogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.18.11.248] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The UART_REG5 register defaults to 0. The console port is set in ROMCODE. But other UART ports default to 0, so make bit24 and bit[26,27] writable so that the UART can choose a more appropriate clock. Signed-off-by: Yu Tu --- drivers/tty/serial/meson_uart.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uar= t.c index 1004fd0b0c9e..fd128878e91a 100644 --- a/drivers/tty/serial/meson_uart.c +++ b/drivers/tty/serial/meson_uart.c @@ -693,7 +693,7 @@ static int meson_uart_probe_clocks(struct uart_port *po= rt) CLK_SET_RATE_NO_REPARENT, port->membase + AML_UART_REG5, 26, 2, - CLK_DIVIDER_READ_ONLY, + CLK_DIVIDER_ROUND_CLOSEST, xtal_div_table, NULL); if (IS_ERR(hw)) return PTR_ERR(hw); @@ -719,7 +719,7 @@ static int meson_uart_probe_clocks(struct uart_port *po= rt) CLK_SET_RATE_PARENT, port->membase + AML_UART_REG5, 24, 0x1, - CLK_MUX_READ_ONLY, + CLK_MUX_ROUND_CLOSEST, NULL, NULL); if (IS_ERR(hw)) return PTR_ERR(hw); --=20 2.33.1 From nobody Tue Jun 30 20:11:00 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAFADC433EF for ; Mon, 10 Jan 2022 10:45:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244170AbiAJKpY (ORCPT ); Mon, 10 Jan 2022 05:45:24 -0500 Received: from mail-sh.amlogic.com ([58.32.228.43]:44509 "EHLO mail-sh.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244253AbiAJKoD (ORCPT ); Mon, 10 Jan 2022 05:44:03 -0500 Received: from droid06.amlogic.com (10.18.11.248) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2176.14; Mon, 10 Jan 2022 18:44:01 +0800 From: Yu Tu To: , , , , CC: Greg Kroah-Hartman , Rob Herring , Jiri Slaby , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Yu Tu Subject: [PATCH V5 5/5] tty: serial: meson: Added S4 SOC compatibility. Date: Mon, 10 Jan 2022 18:42:14 +0800 Message-ID: <20220110104214.25321-6-yu.tu@amlogic.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220110104214.25321-1-yu.tu@amlogic.com> References: <20220110104214.25321-1-yu.tu@amlogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.18.11.248] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Make UART driver compatible with S4 SOC UART. Signed-off-by: Yu Tu --- drivers/tty/serial/meson_uart.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uar= t.c index fd128878e91a..d6aa04cc31ba 100644 --- a/drivers/tty/serial/meson_uart.c +++ b/drivers/tty/serial/meson_uart.c @@ -863,6 +863,10 @@ static const struct of_device_id meson_uart_dt_match[]= =3D { .compatible =3D "amlogic,meson-g12a-uart", .data =3D (void *)true, }, + { + .compatible =3D "amlogic,meson-s4-uart", + .data =3D (void *)true, + }, /* * deprecated, don't use anymore because it doesn't differentiate * between GXBB, GXL and G12A which have different revisions --=20 2.33.1