From nobody Tue Jun 30 23:31:34 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67269C433EF for ; Thu, 6 Jan 2022 17:31:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241872AbiAFRbp (ORCPT ); Thu, 6 Jan 2022 12:31:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241843AbiAFRbl (ORCPT ); Thu, 6 Jan 2022 12:31:41 -0500 Received: from mail-qt1-x834.google.com (mail-qt1-x834.google.com [IPv6:2607:f8b0:4864:20::834]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A5D1DC0611FD for ; Thu, 6 Jan 2022 09:31:41 -0800 (PST) Received: by mail-qt1-x834.google.com with SMTP id o17so3016842qtk.1 for ; Thu, 06 Jan 2022 09:31:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TDDnwGKq7j79QqZXmn72oSVxIDOX3iu+00Xl+MNaV1M=; b=XEPnHUwAT8QfIVWdTQDeLIf0QFldNQzXv8Aj/4H2jwwTm5FXsyYf3UDL95WfEZnzAW NotmkqxYEvKgInwT0FOz+qMYeXdppmhnUYU4/P5bgTvHxkO/NRNMsXGROf5kifi9BviF 4jvf8Z0FbZGB7bC2oIirK/EVZuCFxszao0tcMHu8d9S60gPskTnftUhi5xyip+YTMtSV EiAIRGy6wGwXT/cJ5nlfTHu9IGTYUyW81AcTO45PoyM/Il0gopuSHawxh+5e2kK76R2R d/WH6W3e8i/D258Iq3dWMJZs3vM3Q/M+HuH4Hs7SwDhvdZiXvWBYxFFqgaT9vjZZA9Th 7GEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TDDnwGKq7j79QqZXmn72oSVxIDOX3iu+00Xl+MNaV1M=; b=zR3n7vrkZs9+ig6oGUNU2bwhFclIdoUrXyQn54TVgtGcNkt6E47dWerlf2qhdR15de hSmyyyPkDIegkOb+HNBcX/2EooshaJAEiL4xdywMU1wKpU189IgNPCjnlM2FDMYLMjEm c7uGVEh2NafJBF7lf012EFehMdy4tt0xcgqaOz4DmZKUmCjyVe/REjnZY1ARkTTADFLq 8PBN7/8S8lJJnjGY83bgYKPqK8ty6gVvkrN98oQhwWBuGODfeNTP8dnBYb6f/clHaTQX j/f3xWODFJgidXoc1n9cp/jhD+Wcicw7ZfZk7HEei8vAE6DfP+DXY2b/GLKCzpt9Bp/G NAVw== X-Gm-Message-State: AOAM533Z2q+BSdmFFeWnglr8hih7/fz8yIFFH6XjGIfg+wx5z2FiM/BY S2lAJXSutAr/E7ZoSzzGwF2t4Q== X-Google-Smtp-Source: ABdhPJxDcpuylfy5ph9maf/00Exbhb7Ol9pBq9qIkLWae1lonkx08SVnpHHQ9GDFP+sUQCxF4nl/UA== X-Received: by 2002:a05:622a:1743:: with SMTP id l3mr50383523qtk.98.1641490300756; Thu, 06 Jan 2022 09:31:40 -0800 (PST) Received: from pop-os.fios-router.home (pool-71-163-245-5.washdc.fios.verizon.net. [71.163.245.5]) by smtp.googlemail.com with ESMTPSA id i21sm2126536qti.31.2022.01.06.09.31.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Jan 2022 09:31:40 -0800 (PST) From: Thara Gopinath To: agross@kernel.org, bjorn.andersson@linaro.org, daniel.lezcano@linaro.org, rafael@kernel.org, rui.zhang@intel.com, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [Patch v3 1/3] thermal: qcom: lmh: Add support for sm8150 Date: Thu, 6 Jan 2022 12:31:36 -0500 Message-Id: <20220106173138.411097-2-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220106173138.411097-1-thara.gopinath@linaro.org> References: <20220106173138.411097-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add compatible to support LMh for sm8150 SoC. sm8150 does not require explicit enabling for various LMh subsystems. Add a variable indicating the same as match data which is set for sdm845. Execute the piece of code enabling various LMh subsystems only if enable algorithm match data is present. Signed-off-by: Thara Gopinath Reviewed-by: Bjorn Andersson --- v2->v3: - use of_device_get_match_data to get the data from match table rather than using of_match_device and subsequent ->data, as per Bjorn's review comments. - Minor fixes as per Bjorn's review comments. v1->v2: - Added LMH_ENABLE_ALGOS of_device_id match data to indicate whether LMh subsytems need explicit enabling or not. drivers/thermal/qcom/lmh.c | 62 +++++++++++++++++++++----------------- 1 file changed, 35 insertions(+), 27 deletions(-) diff --git a/drivers/thermal/qcom/lmh.c b/drivers/thermal/qcom/lmh.c index eafa7526eb8b..c7f91cbdccc7 100644 --- a/drivers/thermal/qcom/lmh.c +++ b/drivers/thermal/qcom/lmh.c @@ -28,6 +28,8 @@ =20 #define LMH_REG_DCVS_INTR_CLR 0x8 =20 +#define LMH_ENABLE_ALGOS 1 + struct lmh_hw_data { void __iomem *base; struct irq_domain *domain; @@ -90,6 +92,7 @@ static int lmh_probe(struct platform_device *pdev) struct device_node *cpu_node; struct lmh_hw_data *lmh_data; int temp_low, temp_high, temp_arm, cpu_id, ret; + unsigned int enable_alg; u32 node_id; =20 lmh_data =3D devm_kzalloc(dev, sizeof(*lmh_data), GFP_KERNEL); @@ -141,32 +144,36 @@ static int lmh_probe(struct platform_device *pdev) if (!qcom_scm_lmh_dcvsh_available()) return -EINVAL; =20 - ret =3D qcom_scm_lmh_dcvsh(LMH_SUB_FN_CRNT, LMH_ALGO_MODE_ENABLE, 1, - LMH_NODE_DCVS, node_id, 0); - if (ret) - dev_err(dev, "Error %d enabling current subfunction\n", ret); - - ret =3D qcom_scm_lmh_dcvsh(LMH_SUB_FN_REL, LMH_ALGO_MODE_ENABLE, 1, - LMH_NODE_DCVS, node_id, 0); - if (ret) - dev_err(dev, "Error %d enabling reliability subfunction\n", ret); - - ret =3D qcom_scm_lmh_dcvsh(LMH_SUB_FN_BCL, LMH_ALGO_MODE_ENABLE, 1, - LMH_NODE_DCVS, node_id, 0); - if (ret) - dev_err(dev, "Error %d enabling BCL subfunction\n", ret); - - ret =3D qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_ALGO_MODE_ENABLE, 1, - LMH_NODE_DCVS, node_id, 0); - if (ret) { - dev_err(dev, "Error %d enabling thermal subfunction\n", ret); - return ret; - } - - ret =3D qcom_scm_lmh_profile_change(0x1); - if (ret) { - dev_err(dev, "Error %d changing profile\n", ret); - return ret; + enable_alg =3D (uintptr_t)of_device_get_match_data(dev); + + if (enable_alg) { + ret =3D qcom_scm_lmh_dcvsh(LMH_SUB_FN_CRNT, LMH_ALGO_MODE_ENABLE, 1, + LMH_NODE_DCVS, node_id, 0); + if (ret) + dev_err(dev, "Error %d enabling current subfunction\n", ret); + + ret =3D qcom_scm_lmh_dcvsh(LMH_SUB_FN_REL, LMH_ALGO_MODE_ENABLE, 1, + LMH_NODE_DCVS, node_id, 0); + if (ret) + dev_err(dev, "Error %d enabling reliability subfunction\n", ret); + + ret =3D qcom_scm_lmh_dcvsh(LMH_SUB_FN_BCL, LMH_ALGO_MODE_ENABLE, 1, + LMH_NODE_DCVS, node_id, 0); + if (ret) + dev_err(dev, "Error %d enabling BCL subfunction\n", ret); + + ret =3D qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_ALGO_MODE_ENABLE, 1, + LMH_NODE_DCVS, node_id, 0); + if (ret) { + dev_err(dev, "Error %d enabling thermal subfunction\n", ret); + return ret; + } + + ret =3D qcom_scm_lmh_profile_change(0x1); + if (ret) { + dev_err(dev, "Error %d changing profile\n", ret); + return ret; + } } =20 /* Set default thermal trips */ @@ -213,7 +220,8 @@ static int lmh_probe(struct platform_device *pdev) } =20 static const struct of_device_id lmh_table[] =3D { - { .compatible =3D "qcom,sdm845-lmh", }, + { .compatible =3D "qcom,sdm845-lmh", .data =3D (void *)LMH_ENABLE_ALGOS}, + { .compatible =3D "qcom,sm8150-lmh", }, {} }; MODULE_DEVICE_TABLE(of, lmh_table); --=20 2.25.1 From nobody Tue Jun 30 23:31:34 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74A95C433FE for ; Thu, 6 Jan 2022 17:31:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241951AbiAFRbx (ORCPT ); Thu, 6 Jan 2022 12:31:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41678 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241850AbiAFRbn (ORCPT ); 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[71.163.245.5]) by smtp.googlemail.com with ESMTPSA id i21sm2126536qti.31.2022.01.06.09.31.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Jan 2022 09:31:41 -0800 (PST) From: Thara Gopinath To: agross@kernel.org, bjorn.andersson@linaro.org, daniel.lezcano@linaro.org, rafael@kernel.org, rui.zhang@intel.com, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [Patch v3 2/3] arm64: dts: qcom: sm8150: Add support for LMh node Date: Thu, 6 Jan 2022 12:31:37 -0500 Message-Id: <20220106173138.411097-3-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220106173138.411097-1-thara.gopinath@linaro.org> References: <20220106173138.411097-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add LMh nodes for cpu cluster0 and cpu cluster1 for sm8150 SoC. Signed-off-by: Thara Gopinath --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qco= m/sm8150.dtsi index 81b4ff2cc4cd..e755d7ab78dd 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3650,6 +3650,30 @@ cpufreq_hw: cpufreq@18323000 { #freq-domain-cells =3D <1>; }; =20 + lmh_cluster1: lmh@18350800 { + compatible =3D "qcom,sm8150-lmh"; + reg =3D <0 0x18350800 0 0x400>; + interrupts =3D ; + cpus =3D <&CPU4>; + qcom,lmh-temp-arm-millicelsius =3D <60000>; + qcom,lmh-temp-low-millicelsius =3D <84500>; + qcom,lmh-temp-high-millicelsius =3D <85000>; + interrupt-controller; + #interrupt-cells =3D <1>; + }; + + lmh_cluster0: lmh@18358800 { + compatible =3D "qcom,sm8150-lmh"; + reg =3D <0 0x18358800 0 0x400>; + interrupts =3D ; + cpus =3D <&CPU0>; + qcom,lmh-temp-arm-millicelsius =3D <60000>; + qcom,lmh-temp-low-millicelsius =3D <84500>; + qcom,lmh-temp-high-millicelsius =3D <85000>; + interrupt-controller; + #interrupt-cells =3D <1>; + }; + wifi: wifi@18800000 { compatible =3D "qcom,wcn3990-wifi"; reg =3D <0 0x18800000 0 0x800000>; --=20 2.25.1 From nobody Tue Jun 30 23:31:34 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E927C43217 for ; Thu, 6 Jan 2022 17:31:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241913AbiAFRbu (ORCPT ); Thu, 6 Jan 2022 12:31:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41694 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241865AbiAFRbo (ORCPT ); Thu, 6 Jan 2022 12:31:44 -0500 Received: from mail-qt1-x82d.google.com (mail-qt1-x82d.google.com [IPv6:2607:f8b0:4864:20::82d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86A3EC06118C for ; Thu, 6 Jan 2022 09:31:43 -0800 (PST) Received: by mail-qt1-x82d.google.com with SMTP id m25so2962892qtq.13 for ; Thu, 06 Jan 2022 09:31:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GgGIgMajEhcXcb+pSiiU8hULLmnW3Ix8+OrCDOiX3Lw=; b=Jo6aOpRcqwgI1DHuAffeVnOLWMf0maPodl1wC1IQJq7vARxmfu+Ue9aSJc4yugEI4p g/2Bq7w0n9AuMlWZlOOslHlaI8qBSCc0vtrE+g05Dkk7NZnFchZR3i7B6hJoegjpSE18 wfKSaXEugDx9AQIqP32HpdpeMj8P2f6r0queG+dCI2fjF7K5daJkAZI12QzVKyBE5gFt aMr0w98EAqRDp+2CBvDXAUK4CXzdJmkpfve6qvuhPXOV64Vjq27yLAXibZ/3QQQEbQAs iVhuJr3wFhiQzI0rpwndBz8ZESpWrmR3Xnmhx6ELhkbgeRY7c1PQ9KsfWeIGGq6suDHO XrLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GgGIgMajEhcXcb+pSiiU8hULLmnW3Ix8+OrCDOiX3Lw=; b=LVGqcd5ksK2EUSIeHNugRJ0OWdhCI8hZ1UBgWYpVqqBmxeWVIODexnfGm+vmahzsFs h24yKTMg/gZndklpGuDW1QIxs+jdMPutukitWj/6MglblQLDCEfFrNpkcEBSZ5b77aWL cpPh4V2W+Qhgz6ZQ5oyE/e7U05FfpQYaIJCVSXlbZtkR+u3ygOlN86MmhcOK4rgKJkgB U7VJGdKPg/lAdYPhKTWXlINFUkALcqWLMUZIFq4PbBGI/ET8mFVO4ZRsFa64Asp7Mv5h GcR5VQm5nm+pA1iDwuWpVN/hHjrO7+9uTYVev1sTf8B47OX8Qyx5vgRV7S+kd17fdkdA P0Nw== X-Gm-Message-State: AOAM530kjNETXEv7hI7HL+buk5FESp3UrKVLsyk0iKpTRa0fbhHGlTEz Ya5uzdEyvj2ruf2GtKQRH+qeYw== X-Google-Smtp-Source: ABdhPJxV1YhSckhNaETNVUzcFICOYgIeIzL0P7GqkFpNo8sOKp0GrBfISIqDVzY7He5aFMmfCGamtg== X-Received: by 2002:a05:622a:28b:: with SMTP id z11mr53231851qtw.242.1641490302620; Thu, 06 Jan 2022 09:31:42 -0800 (PST) Received: from pop-os.fios-router.home (pool-71-163-245-5.washdc.fios.verizon.net. [71.163.245.5]) by smtp.googlemail.com with ESMTPSA id i21sm2126536qti.31.2022.01.06.09.31.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Jan 2022 09:31:42 -0800 (PST) From: Thara Gopinath To: agross@kernel.org, bjorn.andersson@linaro.org, daniel.lezcano@linaro.org, rafael@kernel.org, rui.zhang@intel.com, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [Patch v3 3/3] dt-bindings: thermal: Add sm8150 compatible string for LMh Date: Thu, 6 Jan 2022 12:31:38 -0500 Message-Id: <20220106173138.411097-4-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220106173138.411097-1-thara.gopinath@linaro.org> References: <20220106173138.411097-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Extend the LMh dt binding document to include compatible string supporting sm8150 SoC. Signed-off-by: Thara Gopinath Acked-by: Rob Herring --- Documentation/devicetree/bindings/thermal/qcom-lmh.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml b/Docu= mentation/devicetree/bindings/thermal/qcom-lmh.yaml index 289e9a845600..a9b7388ca9ac 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml @@ -19,6 +19,7 @@ properties: compatible: enum: - qcom,sdm845-lmh + - qcom,sm8150-lmh =20 reg: items: --=20 2.25.1