From nobody Sun Sep 22 11:43:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0DBD7C433F5 for ; Fri, 10 Dec 2021 17:52:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244787AbhLJR4L (ORCPT ); Fri, 10 Dec 2021 12:56:11 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:44502 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244769AbhLJR4H (ORCPT ); Fri, 10 Dec 2021 12:56:07 -0500 X-UUID: 8a704a79d9994999820373d7523642ca-20211211 X-UUID: 8a704a79d9994999820373d7523642ca-20211211 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 257280221; Sat, 11 Dec 2021 01:52:30 +0800 Received: from mtkexhb02.mediatek.inc (172.21.101.103) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Sat, 11 Dec 2021 01:52:28 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 11 Dec 2021 01:52:28 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:52:28 +0800 From: Flora Fu To: Matthias Brugger , Pi-Cheng Chen , Yong Wu CC: , , , Flora Fu , "JB Tsai" Subject: [PATCH 01/12] dt-bindings: memory: mediatek: Add MT8195 apu iommu bindings Date: Sat, 11 Dec 2021 01:52:12 +0800 Message-ID: <20211210175223.31131-2-flora.fu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211210175223.31131-1-flora.fu@mediatek.com> References: <20211210175223.31131-1-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There are two apu iommu hardwares in MT8195. Add MT8195 apu iommu bindings. Signed-off-by: Flora Fu --- Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml | 3 +++ include/dt-bindings/memory/mt8195-memory-port.h | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/= Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml index 14fae9642ec9..ba1b3ce6cf99 100644 --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml @@ -81,6 +81,7 @@ properties: - mediatek,mt8195-iommu-vdo # generation two - mediatek,mt8195-iommu-vpp # generation two - mediatek,mt8195-iommu-infra # generation two + - mediatek,mt8195-iommu-apu # generation two =20 - description: mt7623 generation one items: @@ -158,6 +159,7 @@ allOf: - mediatek,mt8192-iommu-apu - mediatek,mt8195-iommu-vdo - mediatek,mt8195-iommu-vpp + - mediatek,mt8195-iommu-apu =20 then: required: @@ -170,6 +172,7 @@ allOf: enum: - mediatek,mt8192-iommu-apu - mediatek,mt8195-iommu-infra + - mediatek,mt8195-iommu-apu =20 then: required: diff --git a/include/dt-bindings/memory/mt8195-memory-port.h b/include/dt-b= indings/memory/mt8195-memory-port.h index 9882877cda9d..438e75140717 100644 --- a/include/dt-bindings/memory/mt8195-memory-port.h +++ b/include/dt-bindings/memory/mt8195-memory-port.h @@ -405,4 +405,8 @@ #define IOMMU_PORT_INFRA_SSUSB_R MTK_IFAIOMMU_PERI_ID(30) #define IOMMU_PORT_INFRA_SSUSB_W MTK_IFAIOMMU_PERI_ID(31) =20 +#define IOMMU_PORT_APU_DATA MTK_M4U_ID(0, 0) +#define IOMMU_PORT_APU_VLM MTK_M4U_ID(0, 1) +#define IOMMU_PORT_APU_VPU MTK_M4U_ID(0, 2) + #endif --=20 2.18.0 From nobody Sun Sep 22 11:43:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6026C433FE for ; Fri, 10 Dec 2021 17:52:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244825AbhLJR4Q (ORCPT ); Fri, 10 Dec 2021 12:56:16 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:50114 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244777AbhLJR4J (ORCPT ); Fri, 10 Dec 2021 12:56:09 -0500 X-UUID: babdb047d42a4ca28c1e225bf01d50c6-20211211 X-UUID: babdb047d42a4ca28c1e225bf01d50c6-20211211 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1950574557; Sat, 11 Dec 2021 01:52:32 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 11 Dec 2021 01:52:30 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:52:31 +0800 From: Flora Fu To: Matthias Brugger , Pi-Cheng Chen , Yong Wu CC: , , , Flora Fu , JB Tsai Subject: [PATCH 02/12] dt-bindings: remoteproc: mediatek: Add MT8195 in apu rproc Date: Sat, 11 Dec 2021 01:52:13 +0800 Message-ID: <20211210175223.31131-3-flora.fu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211210175223.31131-1-flora.fu@mediatek.com> References: <20211210175223.31131-1-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the binding description for the MT8195 remote processor. Signed-off-by: Flora Fu --- .../devicetree/bindings/remoteproc/mediatek,apu-rv.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/remoteproc/mediatek,apu-rv.y= aml b/Documentation/devicetree/bindings/remoteproc/mediatek,apu-rv.yaml index c390b85040eb..cb945bc33318 100644 --- a/Documentation/devicetree/bindings/remoteproc/mediatek,apu-rv.yaml +++ b/Documentation/devicetree/bindings/remoteproc/mediatek,apu-rv.yaml @@ -22,6 +22,7 @@ properties: items: - enum: - mediatek,mt8192-apusys-rv + - mediatek,mt8195-apusys-rv - const: simple-mfd =20 reg: --=20 2.18.0 From nobody Sun Sep 22 11:43:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A435CC433F5 for ; Fri, 10 Dec 2021 17:52:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244851AbhLJR4T (ORCPT ); Fri, 10 Dec 2021 12:56:19 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:50148 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244793AbhLJR4M (ORCPT ); Fri, 10 Dec 2021 12:56:12 -0500 X-UUID: 1c019f4130a5403398ab93a1e9e240df-20211211 X-UUID: 1c019f4130a5403398ab93a1e9e240df-20211211 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1481951548; Sat, 11 Dec 2021 01:52:34 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Sat, 11 Dec 2021 01:52:33 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:52:33 +0800 From: Flora Fu To: Matthias Brugger , Pi-Cheng Chen , Yong Wu CC: , , , Flora Fu , "JB Tsai" Subject: [PATCH 03/12] dt-bindings: soc: mediatek: apu: Add MT8195 APU power bindings Date: Sat, 11 Dec 2021 01:52:14 +0800 Message-ID: <20211210175223.31131-4-flora.fu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211210175223.31131-1-flora.fu@mediatek.com> References: <20211210175223.31131-1-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add MT8195 APU power bindings. Signed-off-by: Flora Fu --- .../soc/mediatek/mediatek,apu-pwr.yaml | 23 ++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,apu-pw= r.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,apu-pwr.ya= ml index 00f67dddb162..93afb9919f1f 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,apu-pwr.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,apu-pwr.yaml @@ -19,6 +19,7 @@ properties: items: - enum: - mediatek,mt8192-apu-power + - mediatek,mt8195-apu-power reg: minItems: 1 =20 @@ -47,7 +48,27 @@ required: - vvpu-supply - vmdla-supply =20 -additionalProperties: false +additionalProperties: + if: + properties: + compatible: + enum: + - mediatek,mt8195-apu-power + then: + type: object + description: + Represent node that will trigger early probing to all iommu device. + The APU device all iommu device to be probed before boot remote tiny= sys. + properties: + compatible: + enum: + - mediatek,apu_combo_iommu0 + - mediatek,apu_combo_iommu1 + iommus: + maxItems: 1 + required: + - compatible + - iommus =20 examples: - | --=20 2.18.0 From nobody Sun Sep 22 11:43:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C659DC433EF for ; Fri, 10 Dec 2021 17:53:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244965AbhLJR4m (ORCPT ); Fri, 10 Dec 2021 12:56:42 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:44676 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244816AbhLJR4P (ORCPT ); Fri, 10 Dec 2021 12:56:15 -0500 X-UUID: 5b3d7f91eb6d48e1b8622f788aab8c6f-20211211 X-UUID: 5b3d7f91eb6d48e1b8622f788aab8c6f-20211211 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1621512975; Sat, 11 Dec 2021 01:52:36 +0800 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 11 Dec 2021 01:52:34 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 11 Dec 2021 01:52:34 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:52:34 +0800 From: Flora Fu To: Matthias Brugger , Pi-Cheng Chen , Yong Wu CC: , , , Flora Fu , "JB Tsai" Subject: [PATCH 04/12] iommu/mediatek: Add APU iommu data for mt8195 Date: Sat, 11 Dec 2021 01:52:15 +0800 Message-ID: <20211210175223.31131-5-flora.fu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211210175223.31131-1-flora.fu@mediatek.com> References: <20211210175223.31131-1-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add hardware settins for support mt8195 apu iommu. Signed-off-by: Yong Wu Signed-off-by: Flora Fu --- drivers/iommu/mtk_iommu.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 4bc7c76062e6..3fda9ad9f925 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -218,6 +218,13 @@ static const struct mtk_iommu_iova_region mt8192_multi= _dom_apu[] =3D { { .iova_base =3D 0x70000000ULL, .size =3D 0x12600000}, /* APU REG */ }; =20 +static const struct mtk_iommu_iova_region mt8195_multi_dom_apu[] =3D { + { .iova_base =3D 0x0, .size =3D SZ_4G}, /* APU DATA */ + { .iova_base =3D 0x8000000ULL, .size =3D 0x8000000}, /* APU VLM */ + { .iova_base =3D 0x20000000ULL, .size =3D 0xe0000000}, /* APU VPU */ + { .iova_base =3D 0x70000000ULL, .size =3D 0x12600000}, /* APU REG */ +}; + /* If 2 M4U share a domain(use the same hwlist), Put the corresponding inf= o in first data.*/ static struct mtk_iommu_data *mtk_iommu_get_frst_data(struct list_head *hw= list) { @@ -1312,6 +1319,18 @@ static const struct mtk_iommu_plat_data mt8192_data_= apu =3D { .iova_region_nr =3D ARRAY_SIZE(mt8192_multi_dom_apu), }; =20 +static const struct mtk_iommu_plat_data mt8195_data_apu =3D { + .m4u_plat =3D M4U_MT8195, + .flags =3D DCM_DISABLE | MTK_IOMMU_TYPE_APU | + SHARE_PGTABLE, + .inv_sel_reg =3D REG_MMU_INV_SEL_GEN2, + .hw_list =3D &apulist, + .bank_nr =3D 1, + .bank_enable =3D {true}, + .iova_region =3D mt8195_multi_dom_apu, + .iova_region_nr =3D ARRAY_SIZE(mt8195_multi_dom_apu), +}; + static const struct mtk_iommu_plat_data mt8195_data_infra =3D { .m4u_plat =3D M4U_MT8195, .flags =3D WR_THROT_EN | DCM_DISABLE | @@ -1368,6 +1387,7 @@ static const struct of_device_id mtk_iommu_of_ids[] = =3D { { .compatible =3D "mediatek,mt8183-m4u", .data =3D &mt8183_data}, { .compatible =3D "mediatek,mt8192-m4u", .data =3D &mt8192_data}, { .compatible =3D "mediatek,mt8192-iommu-apu", .data =3D &mt8192_data_a= pu}, + { .compatible =3D "mediatek,mt8195-iommu-apu", .data =3D &mt8195_data_a= pu}, { .compatible =3D "mediatek,mt8195-iommu-infra", .data =3D &mt8195_data_i= nfra}, { .compatible =3D "mediatek,mt8195-iommu-vdo", .data =3D &mt8195_data_v= do}, { .compatible =3D "mediatek,mt8195-iommu-vpp", .data =3D &mt8195_data_v= pp}, --=20 2.18.0 From nobody Sun Sep 22 11:43:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5AECEC433F5 for ; Fri, 10 Dec 2021 17:53:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244806AbhLJR4p (ORCPT ); Fri, 10 Dec 2021 12:56:45 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:44692 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244826AbhLJR4Q (ORCPT ); Fri, 10 Dec 2021 12:56:16 -0500 X-UUID: 1d12d83c1db0411ba7f306d0e10d676e-20211211 X-UUID: 1d12d83c1db0411ba7f306d0e10d676e-20211211 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1684738223; Sat, 11 Dec 2021 01:52:36 +0800 Received: from mtkexhb02.mediatek.inc (172.21.101.103) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Sat, 11 Dec 2021 01:52:35 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 11 Dec 2021 01:52:35 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:52:35 +0800 From: Flora Fu To: Matthias Brugger , Pi-Cheng Chen , Yong Wu CC: , , , Flora Fu , "JB Tsai" Subject: [PATCH 05/12] remoteproc: mediatek: Add MT8195 APU remoteproc support Date: Sat, 11 Dec 2021 01:52:16 +0800 Message-ID: <20211210175223.31131-6-flora.fu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211210175223.31131-1-flora.fu@mediatek.com> References: <20211210175223.31131-1-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add MT8195 platform data in the APU remoteproc driver. Signed-off-by: Flora Fu --- drivers/remoteproc/mtk-apu-rproc.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/remoteproc/mtk-apu-rproc.c b/drivers/remoteproc/mtk-ap= u-rproc.c index 40af8e88f41a..dc54b87ad661 100644 --- a/drivers/remoteproc/mtk-apu-rproc.c +++ b/drivers/remoteproc/mtk-apu-rproc.c @@ -997,8 +997,23 @@ const struct mtk_apu_platdata mt8192_platdata =3D { }, }; =20 +const struct mtk_apu_platdata mt8195_platdata =3D { + .flags =3D F_AUTO_BOOT, + .ipi_attrs =3D mt81xx_ipi_attrs, + .ops =3D { + .start =3D mt81xx_rproc_start, + .stop =3D mt81xx_rproc_stop, + .resume =3D mt81xx_rproc_resume, + .apu_memmap_init =3D mt81xx_apu_memmap_init, + .apu_memmap_remove =3D mt81xx_apu_memmap_remove, + .power_on =3D mt81xx_apu_power_on, + .power_off =3D mt81xx_apu_power_off, + }, +}; + static const struct of_device_id apu_of_match[] =3D { { .compatible =3D "mediatek,mt8192-apusys-rv", .data =3D &mt8192_platdata= }, + { .compatible =3D "mediatek,mt8195-apusys-rv", .data =3D &mt8195_platdata= }, {}, }; MODULE_DEVICE_TABLE(of, apu_of_match); --=20 2.18.0 From nobody Sun Sep 22 11:43:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4820C433EF for ; Fri, 10 Dec 2021 17:53:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244933AbhLJR4f (ORCPT ); Fri, 10 Dec 2021 12:56:35 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:44656 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244808AbhLJR4O (ORCPT ); Fri, 10 Dec 2021 12:56:14 -0500 X-UUID: fe157854d93f49da8b203f4f07e58695-20211211 X-UUID: fe157854d93f49da8b203f4f07e58695-20211211 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2043753425; Sat, 11 Dec 2021 01:52:36 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 11 Dec 2021 01:52:35 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:52:35 +0800 From: Flora Fu To: Matthias Brugger , Pi-Cheng Chen , Yong Wu CC: , , , Flora Fu , JB Tsai Subject: [PATCH 06/12] soc: mediatek: apu: Add MT8195 APU power driver Date: Sat, 11 Dec 2021 01:52:17 +0800 Message-ID: <20211210175223.31131-7-flora.fu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211210175223.31131-1-flora.fu@mediatek.com> References: <20211210175223.31131-1-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add APU power driver for MT8195 to support for subsys clock and regulator controller. Signed-off-by: Flora Fu --- drivers/soc/mediatek/apusys/apu-pwr.c | 34 ++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/drivers/soc/mediatek/apusys/apu-pwr.c b/drivers/soc/mediatek/a= pusys/apu-pwr.c index e8e54a767aff..73e08b442558 100644 --- a/drivers/soc/mediatek/apusys/apu-pwr.c +++ b/drivers/soc/mediatek/apusys/apu-pwr.c @@ -578,10 +578,25 @@ static struct apupwr_plat_data mt8192_apu_power_data = =3D { .ops =3D &mt8192_pwr_ops, }; =20 +static const struct apupwr_plat_reg mt8195_pwr_reg =3D { + .opp_user =3D 0x40, + .opp_thermal =3D 0x44, + .opp_curr =3D 0x48, + .opp_mask =3D 0xF, +}; + +static struct apupwr_plat_data mt8195_apu_power_data =3D { + .dvfs_user =3D MDLA1, + .plat_regs =3D &mt8195_pwr_reg, +}; + static const struct of_device_id apu_power_of_match[] =3D { { .compatible =3D "mediatek,mt8192-apu-power", .data =3D &mt8192_apu_power_data + }, { + .compatible =3D "mediatek,mt8195-apu-power", + .data =3D &mt8195_apu_power_data }, { /* Terminator */ }, @@ -597,13 +612,30 @@ static struct platform_driver apu_power_driver =3D { }, }; =20 +static const struct of_device_id apu_combo_iommu[] =3D { + { .compatible =3D "mediatek,apu_combo_iommu0"}, + { .compatible =3D "mediatek,apu_combo_iommu1"}, + {}, +}; +MODULE_DEVICE_TABLE(of, apu_combo_iommu); + +static struct platform_driver apu_combo_iommu_driver =3D { + .driver =3D { + .name =3D "apu_combo_iommu", + .of_match_table =3D of_match_ptr(apu_combo_iommu), + }, +}; + static int __init apu_power_drv_init(void) { - return platform_driver_register(&apu_power_driver); + platform_driver_register(&apu_power_driver); + platform_driver_register(&apu_combo_iommu_driver); + return 0; } =20 static void __exit apu_power_drv_exit(void) { + platform_driver_unregister(&apu_combo_iommu_driver); platform_driver_unregister(&apu_power_driver); } =20 --=20 2.18.0 From nobody Sun Sep 22 11:43:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74822C433F5 for ; Fri, 10 Dec 2021 17:52:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244821AbhLJR40 (ORCPT ); Fri, 10 Dec 2021 12:56:26 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:44636 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244798AbhLJR4N (ORCPT ); Fri, 10 Dec 2021 12:56:13 -0500 X-UUID: 5a36e2d2beb145a09bcd5d3fa98ed22a-20211211 X-UUID: 5a36e2d2beb145a09bcd5d3fa98ed22a-20211211 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1555568712; Sat, 11 Dec 2021 01:52:36 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Sat, 11 Dec 2021 01:52:36 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:52:36 +0800 From: Flora Fu To: Matthias Brugger , Pi-Cheng Chen , Yong Wu CC: , , , Flora Fu , "JB Tsai" Subject: [PATCH 07/12] arm64: dts: mt8195: Add APU mtk-apu-mailbox node Date: Sat, 11 Dec 2021 01:52:18 +0800 Message-ID: <20211210175223.31131-8-flora.fu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211210175223.31131-1-flora.fu@mediatek.com> References: <20211210175223.31131-1-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add mtk-apu-mailbox for mt8195 SOC. Signed-off-by: Pi-Cheng Chen Signed-off-by: Flora Fu --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 6e60c4a38495..7e31e64e6b39 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -1360,6 +1360,13 @@ #clock-cells =3D <1>; }; =20 + apu_mailbox: apu_mailbox@19000000 { + compatible =3D "mediatek,mtk-apu-mailbox"; + reg =3D <0 0x19000000 0 0x100>; + interrupts =3D ; + #mbox-cells =3D <1>; + }; + apu_conn: syscon@19020000 { compatible =3D "mediatek,mt8195-apu-conn", "syscon"; reg =3D <0 0x19020000 0 0x1000>; --=20 2.18.0 From nobody Sun Sep 22 11:43:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC26FC433FE for ; Fri, 10 Dec 2021 17:53:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245008AbhLJR4t (ORCPT ); Fri, 10 Dec 2021 12:56:49 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:50148 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244833AbhLJR4R (ORCPT ); Fri, 10 Dec 2021 12:56:17 -0500 X-UUID: 8815f233d66e41d9b0548b8310c6bd78-20211211 X-UUID: 8815f233d66e41d9b0548b8310c6bd78-20211211 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2007635512; Sat, 11 Dec 2021 01:52:38 +0800 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 11 Dec 2021 01:52:36 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 11 Dec 2021 01:52:36 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:52:36 +0800 From: Flora Fu To: Matthias Brugger , Pi-Cheng Chen , Yong Wu CC: , , , Flora Fu , "JB Tsai" Subject: [PATCH 08/12] arm64: dts: mt8195: Add APU-IOMMU nodes Date: Sat, 11 Dec 2021 01:52:19 +0800 Message-ID: <20211210175223.31131-9-flora.fu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211210175223.31131-1-flora.fu@mediatek.com> References: <20211210175223.31131-1-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add APU-IOMMI nodes. Signed-off-by: Yong Wu Signed-off-by: Flora Fu --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 7e31e64e6b39..2f14e3326a2c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -1367,6 +1368,22 @@ #mbox-cells =3D <1>; }; =20 + iommu_apu0: iommu@19010000 { + compatible =3D "mediatek,mt8195-iommu-apu"; + reg =3D <0 0x19010000 0 0x1000>; + interrupts =3D ; + #iommu-cells =3D <1>; + power-domains =3D <&apuspm 0>; + }; + + iommu_apu1: iommu@19015000 { + compatible =3D "mediatek,mt8195-iommu-apu"; + reg =3D <0 0x19015000 0 0x1000>; + interrupts =3D ; + #iommu-cells =3D <1>; + power-domains =3D <&apuspm 0>; + }; + apu_conn: syscon@19020000 { compatible =3D "mediatek,mt8195-apu-conn", "syscon"; reg =3D <0 0x19020000 0 0x1000>; --=20 2.18.0 From nobody Sun Sep 22 11:43:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDA9CC433EF for ; Fri, 10 Dec 2021 17:53:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244842AbhLJR4n (ORCPT ); Fri, 10 Dec 2021 12:56:43 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:50234 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244823AbhLJR4Q (ORCPT ); Fri, 10 Dec 2021 12:56:16 -0500 X-UUID: 30e710115af7425f83d47c728c0077b9-20211211 X-UUID: 30e710115af7425f83d47c728c0077b9-20211211 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 504518008; Sat, 11 Dec 2021 01:52:38 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 11 Dec 2021 01:52:37 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:52:37 +0800 From: Flora Fu To: Matthias Brugger , Pi-Cheng Chen , Yong Wu CC: , , , Flora Fu , JB Tsai Subject: [PATCH 09/12] arm64: dts: mt8195: Add apu tinysys node Date: Sat, 11 Dec 2021 01:52:20 +0800 Message-ID: <20211210175223.31131-10-flora.fu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211210175223.31131-1-flora.fu@mediatek.com> References: <20211210175223.31131-1-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add node for APU tinysys. Signed-off-by: Flora Fu --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 35 ++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 2f14e3326a2c..8f4f56e2f08c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -1368,6 +1368,41 @@ #mbox-cells =3D <1>; }; =20 + apusys_rv: apusys_rv@19001000 { + compatible =3D "mediatek,mt8195-apusys-rv", "simple-mfd"; + reg =3D <0 0x19000000 0 0x1000>, + <0 0x19001000 0 0x1000>, + <0 0x19002000 0 0x10>; + reg-names =3D "apu_mbox", + "md32_sysctrl", + "apu_wdt"; + power-domains =3D <&apuspm 0>; + iommus =3D <&iommu_apu0 IOMMU_PORT_APU_DATA>; + interrupts =3D ; + interrupt-names =3D "apu_wdt"; + mboxes =3D <&apu_mailbox 0>; + + apu_ctrl { + compatible =3D "mediatek,apu-ctrl-rpmsg"; + mediatek,rpmsg-name =3D "apu-ctrl-rpmsg"; + }; + + apu_pwr_tx { + compatible =3D "mediatek,apupwr-tx-rpmsg"; + mediatek,rpmsg-name =3D "apupwr-tx-rpmsg"; + }; + + apu_pwr_rx { + compatible =3D "mediatek,apupwr-rx-rpmsg"; + mediatek,rpmsg-name =3D "apupwr-rx-rpmsg"; + }; + + apu_mdw_rpmsg { + compatible =3D "mediatek,apu-mdw-rpmsg"; + mediatek,rpmsg-name =3D "apu-mdw-rpmsg"; + }; + }; + iommu_apu0: iommu@19010000 { compatible =3D "mediatek,mt8195-iommu-apu"; reg =3D <0 0x19010000 0 0x1000>; --=20 2.18.0 From nobody Sun Sep 22 11:43:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 472FDC433F5 for ; Fri, 10 Dec 2021 17:53:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245025AbhLJR4x (ORCPT ); Fri, 10 Dec 2021 12:56:53 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:50250 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244660AbhLJR4R (ORCPT ); Fri, 10 Dec 2021 12:56:17 -0500 X-UUID: 6681d22034d540ae83d7903cf19a5273-20211211 X-UUID: 6681d22034d540ae83d7903cf19a5273-20211211 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1469939390; Sat, 11 Dec 2021 01:52:39 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Sat, 11 Dec 2021 01:52:37 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:52:37 +0800 From: Flora Fu To: Matthias Brugger , Pi-Cheng Chen , Yong Wu CC: , , , Flora Fu , "JB Tsai" Subject: [PATCH 10/12] arm64: dts: mt8195: Add APU power nodes Date: Sat, 11 Dec 2021 01:52:21 +0800 Message-ID: <20211210175223.31131-11-flora.fu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211210175223.31131-1-flora.fu@mediatek.com> References: <20211210175223.31131-1-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add APU power node for MT8195. Signed-off-by: Flora Fu --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 8f4f56e2f08c..5ab4b2fba0e9 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -1450,6 +1450,25 @@ }; }; =20 + apusys_power: apusys_power@190f1000 { + compatible =3D "mediatek,mt8195-apu-power"; + reg =3D <0 0x190f1000 0 0x1000>, + <0 0x19000600 0 0x100>; + reg-names =3D "apu_pcu", + "apu_spare"; + power-domains =3D <&apuspm 0>; + + apu_combo_iommu0 { + compatible =3D "mediatek,apu_combo_iommu0"; + iommus =3D <&iommu_apu0 IOMMU_PORT_APU_DATA>; + }; + + apu_combo_iommu1 { + compatible =3D "mediatek,apu_combo_iommu1"; + iommus =3D <&iommu_apu1 IOMMU_PORT_APU_DATA>; + }; + }; + apusys_pll: clock-controller@190f3000 { compatible =3D "mediatek,mt8195-apusys_pll"; reg =3D <0 0x190f3000 0 0x1000>; --=20 2.18.0 From nobody Sun Sep 22 11:43:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C9FDC433F5 for ; Fri, 10 Dec 2021 17:53:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245041AbhLJR4z (ORCPT ); Fri, 10 Dec 2021 12:56:55 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:44706 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244792AbhLJR4R (ORCPT ); Fri, 10 Dec 2021 12:56:17 -0500 X-UUID: 6b9e18729b07423180c51e62bc78824f-20211211 X-UUID: 6b9e18729b07423180c51e62bc78824f-20211211 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 814582509; Sat, 11 Dec 2021 01:52:39 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Sat, 11 Dec 2021 01:52:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:52:38 +0800 From: Flora Fu To: Matthias Brugger , Pi-Cheng Chen , Yong Wu CC: , , , Flora Fu , "JB Tsai" Subject: [PATCH 11/12] arm64: dts: mt8195: Add apu-sw-logger node Date: Sat, 11 Dec 2021 01:52:22 +0800 Message-ID: <20211210175223.31131-12-flora.fu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211210175223.31131-1-flora.fu@mediatek.com> References: <20211210175223.31131-1-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add apu-sw-logger node to enable debug into tinysys for MT8195 SOC. Signed-off-by: Flora Fu --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 5ab4b2fba0e9..1f915461636e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -1368,6 +1368,12 @@ #mbox-cells =3D <1>; }; =20 + apusys_sw_logger@0x19000040 { + compatible =3D "mediatek,apu-sw-logger"; + reg =3D <0 0x19000040 0 0x10>; + iommus =3D <&iommu_apu0 IOMMU_PORT_APU_DATA>; + }; + apusys_rv: apusys_rv@19001000 { compatible =3D "mediatek,mt8195-apusys-rv", "simple-mfd"; reg =3D <0 0x19000000 0 0x1000>, --=20 2.18.0 From nobody Sun Sep 22 11:43:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1143C433EF for ; Fri, 10 Dec 2021 17:53:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245060AbhLJR44 (ORCPT ); Fri, 10 Dec 2021 12:56:56 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:44636 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244858AbhLJR4V (ORCPT ); Fri, 10 Dec 2021 12:56:21 -0500 X-UUID: 7cf72667e2404af1994bce5c81c8091b-20211211 X-UUID: 7cf72667e2404af1994bce5c81c8091b-20211211 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1787331640; Sat, 11 Dec 2021 01:52:40 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 11 Dec 2021 01:52:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:52:38 +0800 From: Flora Fu To: Matthias Brugger , Pi-Cheng Chen , Yong Wu CC: , , , Flora Fu , JB Tsai Subject: [PATCH 12/12] arm64: dts: mt8195: Set up regulators for APU subsys Date: Sat, 11 Dec 2021 01:52:23 +0800 Message-ID: <20211210175223.31131-13-flora.fu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211210175223.31131-1-flora.fu@mediatek.com> References: <20211210175223.31131-1-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Set up APU regulators for mdla and vvpu. Signed-off-by: Flora Fu --- arch/arm64/boot/dts/mediatek/mt8195-evb.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195-evb.dts b/arch/arm64/boot/= dts/mediatek/mt8195-evb.dts index 6333cab7929f..f49a460a8767 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8195-evb.dts @@ -44,6 +44,11 @@ }; }; =20 +&apusys_power { + vvpu-supply =3D <&mt6359_vproc1_buck_reg>; + vmdla-supply =3D <&mt6359_vproc2_buck_reg>; +}; + &i2c0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c0_pin>; --=20 2.18.0