From nobody Sun Sep 22 13:17:56 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4528C433F5 for ; Fri, 10 Dec 2021 17:38:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241755AbhLJRln (ORCPT ); Fri, 10 Dec 2021 12:41:43 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:33658 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S241792AbhLJRlf (ORCPT ); Fri, 10 Dec 2021 12:41:35 -0500 X-UUID: 1fadfb714e45486ba51cf2a6cd11e462-20211211 X-UUID: 1fadfb714e45486ba51cf2a6cd11e462-20211211 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1994580294; Sat, 11 Dec 2021 01:37:55 +0800 Received: from mtkexhb02.mediatek.inc (172.21.101.103) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Sat, 11 Dec 2021 01:37:54 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 11 Dec 2021 01:37:54 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 11 Dec 2021 01:37:54 +0800 From: Flora Fu To: Matthias Brugger , Pi-Cheng Chen CC: , , , "Flora Fu" , Yong Wu , JB Tsai , Chun-Jie Chen Subject: [PATCH 4/6] arm64: dts: mt8195: Add APU nodes Date: Sat, 11 Dec 2021 01:37:41 +0800 Message-ID: <20211210173743.30906-5-flora.fu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211210173743.30906-1-flora.fu@mediatek.com> References: <20211210173743.30906-1-flora.fu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add APU nodes to MT8195. Signed-off-by: Flora Fu --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts= /mediatek/mt8195.dtsi index 4980b8329b54..828ac8a6b95f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -1360,6 +1360,21 @@ #clock-cells =3D <1>; }; =20 + apu_conn: syscon@19020000 { + compatible =3D "mediatek,mt8195-apu-conn", "syscon"; + reg =3D <0 0x19020000 0 0x1000>; + }; + + apu_conn1: syscon@19024000 { + compatible =3D "mediatek,mt8195-apu-conn1", "syscon"; + reg =3D <0 0x19024000 0 0x1000>; + }; + + apu_vcore: syscon@19029000 { + compatible =3D "mediatek,mt8195-apu-vcore", "syscon"; + reg =3D <0 0x19029000 0 0x1000>; + }; + apusys_pll: clock-controller@190f3000 { compatible =3D "mediatek,mt8195-apusys_pll"; reg =3D <0 0x190f3000 0 0x1000>; --=20 2.18.0