From nobody Sun Sep 22 13:23:58 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C1EFC433EF for ; Tue, 7 Dec 2021 01:55:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240608AbhLGB7R (ORCPT ); Mon, 6 Dec 2021 20:59:17 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:40786 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S239098AbhLGB6z (ORCPT ); Mon, 6 Dec 2021 20:58:55 -0500 X-UUID: 065ebaed62de4b968d26b520685f448d-20211207 X-UUID: 065ebaed62de4b968d26b520685f448d-20211207 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 878081658; Tue, 07 Dec 2021 09:55:21 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Tue, 7 Dec 2021 09:55:19 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 7 Dec 2021 09:55:18 +0800 From: Biao Huang To: , Jakub Kicinski , Rob Herring CC: Matthias Brugger , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Biao Huang , , , , , , , , , , Subject: [PATCH v5 1/7] net-next: stmmac: dwmac-mediatek: add platform level clocks management Date: Tue, 7 Dec 2021 09:54:59 +0800 Message-ID: <20211207015505.16746-2-biao.huang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211207015505.16746-1-biao.huang@mediatek.com> References: <20211207015505.16746-1-biao.huang@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch implements clks_config callback for dwmac-mediatek platform, which could support platform level clocks management. Signed-off-by: Biao Huang --- .../ethernet/stmicro/stmmac/dwmac-mediatek.c | 25 +++++++++++++------ 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c b/drivers= /net/ethernet/stmicro/stmmac/dwmac-mediatek.c index 58c0feaa8131..0ff57c268dca 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include =20 @@ -359,9 +358,6 @@ static int mediatek_dwmac_init(struct platform_device *= pdev, void *priv) return ret; } =20 - pm_runtime_enable(&pdev->dev); - pm_runtime_get_sync(&pdev->dev); - return 0; } =20 @@ -370,11 +366,25 @@ static void mediatek_dwmac_exit(struct platform_devic= e *pdev, void *priv) struct mediatek_dwmac_plat_data *plat =3D priv; =20 clk_bulk_disable_unprepare(plat->num_clks_to_config, plat->clks); - - pm_runtime_put_sync(&pdev->dev); - pm_runtime_disable(&pdev->dev); } =20 +static int mediatek_dwmac_clks_config(void *priv, bool enabled) +{ + struct mediatek_dwmac_plat_data *plat =3D priv; + int ret =3D 0; + + if (enabled) { + ret =3D clk_bulk_prepare_enable(plat->num_clks_to_config, plat->clks); + if (ret) { + dev_err(plat->dev, "failed to enable clks, err =3D %d\n", ret); + return ret; + } + } else { + clk_bulk_disable_unprepare(plat->num_clks_to_config, plat->clks); + } + + return ret; +} static int mediatek_dwmac_probe(struct platform_device *pdev) { struct mediatek_dwmac_plat_data *priv_plat; @@ -420,6 +430,7 @@ static int mediatek_dwmac_probe(struct platform_device = *pdev) plat_dat->bsp_priv =3D priv_plat; plat_dat->init =3D mediatek_dwmac_init; plat_dat->exit =3D mediatek_dwmac_exit; + plat_dat->clks_config =3D mediatek_dwmac_clks_config; mediatek_dwmac_init(pdev, priv_plat); =20 ret =3D stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); --=20 2.25.1