From nobody Sun Sep 22 13:24:18 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 216C3C433EF for ; Fri, 3 Dec 2021 06:41:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230031AbhLCGob (ORCPT ); Fri, 3 Dec 2021 01:44:31 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:55172 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S238309AbhLCGo3 (ORCPT ); Fri, 3 Dec 2021 01:44:29 -0500 X-UUID: 5b7d823bc31b42199bf06d323a7f92ac-20211203 X-UUID: 5b7d823bc31b42199bf06d323a7f92ac-20211203 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1636601633; Fri, 03 Dec 2021 14:41:04 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 3 Dec 2021 14:41:02 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 3 Dec 2021 14:41:01 +0800 From: Yong Wu To: Krzysztof Kozlowski , Rob Herring , Matthias Brugger CC: Krzysztof Kozlowski , Joerg Roedel , Will Deacon , Robin Murphy , "Tomasz Figa" , , , , , , , , , , , , Subject: [PATCH 1/4] dt-bindings: memory: mediatek: Correct the minItems of clk for larbs Date: Fri, 3 Dec 2021 14:40:24 +0800 Message-ID: <20211203064027.14993-2-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211203064027.14993-1-yong.wu@mediatek.com> References: <20211203064027.14993-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" If a platform's larb support gals, there will be some larbs have a one more "gals" clock while the others still only need "apb"/"smi" clocks. then the minItems is 2 and the maxItems is 3. Fixes: 27bb0e42855a ("dt-bindings: memory: mediatek: Convert SMI to DT sche= ma") Signed-off-by: Yong Wu --- .../bindings/memory-controllers/mediatek,smi-larb.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,= smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediat= ek,smi-larb.yaml index eaeff1ada7f8..a1402f3b8344 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-lar= b.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-lar= b.yaml @@ -81,7 +81,7 @@ allOf: properties: clock: items: - minItems: 3 + minItems: 2 maxItems: 3 clock-names: items: --=20 2.18.0