From nobody Sun Sep 22 13:37:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34604C433EF for ; Tue, 16 Nov 2021 09:49:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1AE386322C for ; Tue, 16 Nov 2021 09:49:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233570AbhKPJwr (ORCPT ); Tue, 16 Nov 2021 04:52:47 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:40868 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S233479AbhKPJwj (ORCPT ); Tue, 16 Nov 2021 04:52:39 -0500 X-UUID: 6e32d49352f347e6b4b110153ffaa555-20211116 X-UUID: 6e32d49352f347e6b4b110153ffaa555-20211116 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 2144681982; Tue, 16 Nov 2021 17:49:38 +0800 Received: from MTKMBS34N1.mediatek.inc (172.27.4.172) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 16 Nov 2021 17:49:36 +0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS34N1.mediatek.inc (172.27.4.172) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 16 Nov 2021 17:49:35 +0800 Received: from mszsdaap41.gcn.mediatek.inc (10.16.6.141) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 16 Nov 2021 17:49:34 +0800 From: Jitao Shi To: Thierry Reding , Sam Ravnborg , David Airlie , Daniel Vetter , Matthias Brugger , Chun-Kuang Hu , Philipp Zabel , , CC: , , , , , , Jitao Shi Subject: [PATCH v3 1/2] drm/panel: panel-boe-tv101wum-nl6: tune the power sequence to avoid leakage Date: Tue, 16 Nov 2021 17:49:29 +0800 Message-ID: <20211116094930.11470-2-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.12.5 In-Reply-To: <20211116094930.11470-1-jitao.shi@mediatek.com> References: <20211116094930.11470-1-jitao.shi@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" "auo,kd101n80-45na" 2st LCD SPEC update, need to modify the timing between IOVCC and mipi data. The 2st version of SPEC modifies the timing requirements from IOVCC to Mipi Data. IOVCC is now required to take precedence over MIPI DATA, otherwise there is a risk of leakage. It is recommended that the time for MIPI to enter LP11 be postponed after IOVCC (delay20ms). Signed-off-by: Jitao Shi Change-Id: Ic5212e2145a7dbf2efef9e5585904a93e1bc5a28 --- drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 88 +++++++++++++++++++---= ---- include/drm/panel_boe_tv101wum_nl6.h | 28 ++++++++ 2 files changed, 94 insertions(+), 22 deletions(-) create mode 100644 include/drm/panel_boe_tv101wum_nl6.h diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/d= rm/panel/panel-boe-tv101wum-nl6.c index db9d0b86d542..02efee06c430 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -49,7 +49,7 @@ struct boe_panel { struct regulator *avee; struct regulator *avdd; struct gpio_desc *enable_gpio; - + int powered_refcnt; bool prepared; }; =20 @@ -488,19 +488,15 @@ static int boe_panel_enter_sleep_mode(struct boe_pane= l *boe) return 0; } =20 -static int boe_panel_unprepare(struct drm_panel *panel) +static int boe_panel_power_off(struct drm_panel *panel) { struct boe_panel *boe =3D to_boe_panel(panel); - int ret; =20 - if (!boe->prepared) - return 0; + if (WARN_ON(boe->powered_refcnt =3D=3D 0)) + return -EINVAL; =20 - ret =3D boe_panel_enter_sleep_mode(boe); - if (ret < 0) { - dev_err(panel->dev, "failed to set panel off: %d\n", ret); - return ret; - } + if (--boe->powered_refcnt !=3D 0) + return 0; =20 msleep(150); =20 @@ -520,17 +516,45 @@ static int boe_panel_unprepare(struct drm_panel *pane= l) regulator_disable(boe->pp1800); } =20 + return 0; +} + +int panel_unprepare_power(struct drm_panel *panel) +{ + if (of_device_is_compatible(panel->dev->of_node, "auo,kd101n80-45na")) + return boe_panel_power_off(panel); + + return 0; +} +EXPORT_SYMBOL(panel_unprepare_power); + +static int boe_panel_unprepare(struct drm_panel *panel) +{ + struct boe_panel *boe =3D to_boe_panel(panel); + int ret; + + if (!boe->prepared) + return 0; + + ret =3D boe_panel_enter_sleep_mode(boe); + if (ret < 0) { + dev_err(panel->dev, "failed to set panel off: %d\n", ret); + return ret; + } + + boe_panel_power_off(panel); + boe->prepared =3D false; =20 return 0; } =20 -static int boe_panel_prepare(struct drm_panel *panel) +static int boe_panel_power_on(struct drm_panel *panel) { struct boe_panel *boe =3D to_boe_panel(panel); int ret; =20 - if (boe->prepared) + if (++boe->powered_refcnt !=3D 1) return 0; =20 gpiod_set_value(boe->enable_gpio, 0); @@ -558,18 +582,8 @@ static int boe_panel_prepare(struct drm_panel *panel) gpiod_set_value(boe->enable_gpio, 1); usleep_range(6000, 10000); =20 - ret =3D boe_panel_init_dcs_cmd(boe); - if (ret < 0) { - dev_err(panel->dev, "failed to init panel: %d\n", ret); - goto poweroff; - } - - boe->prepared =3D true; - return 0; =20 -poweroff: - regulator_disable(boe->avee); poweroffavdd: regulator_disable(boe->avdd); poweroff1v8: @@ -580,6 +594,36 @@ static int boe_panel_prepare(struct drm_panel *panel) return ret; } =20 +int panel_prepare_power(struct drm_panel *panel) +{ + if (of_device_is_compatible(panel->dev->of_node, "auo,kd101n80-45na")) + return boe_panel_power_on(panel); + + return 0; +} +EXPORT_SYMBOL(panel_prepare_power); + +static int boe_panel_prepare(struct drm_panel *panel) +{ + struct boe_panel *boe =3D to_boe_panel(panel); + int ret; + + boe_panel_power_on(panel); + + if (boe->prepared) + return 0; + + ret =3D boe_panel_init_dcs_cmd(boe); + if (ret < 0) { + dev_err(panel->dev, "failed to init panel: %d\n", ret); + return ret; + } + + boe->prepared =3D true; + + return 0; +} + static int boe_panel_enable(struct drm_panel *panel) { msleep(130); diff --git a/include/drm/panel_boe_tv101wum_nl6.h b/include/drm/panel_boe_t= v101wum_nl6.h new file mode 100644 index 000000000000..72abe3eb7840 --- /dev/null +++ b/include/drm/panel_boe_tv101wum_nl6.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2018 MediaTek Inc. + * Author: Jitao Shi + */ + +#ifndef __PANEL_BOE_TV101WUM_NL6_H__ +#define __PANEL_BOE_TV101WUM_NL6_H__ + +#include +#include + +#if defined(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) +int panel_unprepare_power(struct drm_panel *panel); +int panel_prepare_power(struct drm_panel *panel); +#else +int panel_unprepare_power(struct drm_panel *panel) +{ + return 0; +} + +int panel_prepare_power(struct drm_panel *panel) +{ + return 0; +} +#endif +#endif /* __PANEL_BOE_TV101WUM_NL6_H__ */ + --=20 2.12.5 From nobody Sun Sep 22 13:37:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CC88C4332F for ; Tue, 16 Nov 2021 09:49:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8544061B98 for ; Tue, 16 Nov 2021 09:49:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233506AbhKPJwk (ORCPT ); Tue, 16 Nov 2021 04:52:40 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:40824 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232326AbhKPJwi (ORCPT ); Tue, 16 Nov 2021 04:52:38 -0500 X-UUID: cb298c37100c4f9d9fe4e7b8fef3fb26-20211116 X-UUID: cb298c37100c4f9d9fe4e7b8fef3fb26-20211116 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 454372275; Tue, 16 Nov 2021 17:49:39 +0800 Received: from MTKMBS34N1.mediatek.inc (172.27.4.172) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Tue, 16 Nov 2021 17:49:37 +0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS34N1.mediatek.inc (172.27.4.172) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 16 Nov 2021 17:49:36 +0800 Received: from mszsdaap41.gcn.mediatek.inc (10.16.6.141) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 16 Nov 2021 17:49:35 +0800 From: Jitao Shi To: Thierry Reding , Sam Ravnborg , David Airlie , Daniel Vetter , Matthias Brugger , Chun-Kuang Hu , Philipp Zabel , , CC: , , , , , , Jitao Shi Subject: [PATCH v3 2/2] drm/mediatek: control panel's power before MIPI LP11 Date: Tue, 16 Nov 2021 17:49:30 +0800 Message-ID: <20211116094930.11470-3-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.12.5 In-Reply-To: <20211116094930.11470-1-jitao.shi@mediatek.com> References: <20211116094930.11470-1-jitao.shi@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" "auo,kd101n80-45na" requires the panel's IOVDD take precedence over MIPI DATA. Otherwise there is a risk of leakage. Signed-off-by: Jitao Shi Change-Id: I2da6179dea7e15bc5a53fe36db200b6c04f4d551 --- drivers/gpu/drm/mediatek/mtk_dsi.c | 28 ++++++++++++++++++++++------ 1 file changed, 22 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/= mtk_dsi.c index 93b40c245f00..9fff0c483139 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -24,7 +24,7 @@ #include #include #include - +#include #include "mtk_disp_drv.h" #include "mtk_drm_ddp_comp.h" =20 @@ -185,6 +185,7 @@ struct mtk_dsi { struct drm_bridge bridge; struct drm_bridge *next_bridge; struct drm_connector *connector; + struct drm_panel *panel; struct phy *phy; =20 void __iomem *regs; @@ -619,10 +620,16 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) dsi->data_rate =3D DIV_ROUND_UP_ULL(dsi->vm.pixelclock * bit_per_pixel, dsi->lanes); =20 + if (dsi->panel) { + if (panel_prepare_power(dsi->panel)) { + DRM_INFO("can't prepare power the panel\n"); + goto err_refcount; + } + } ret =3D clk_set_rate(dsi->hs_clk, dsi->data_rate); if (ret < 0) { dev_err(dev, "Failed to set data rate: %d\n", ret); - goto err_refcount; + goto err_prepare_power; } =20 phy_power_on(dsi->phy); @@ -665,6 +672,11 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) clk_disable_unprepare(dsi->engine_clk); err_phy_power_off: phy_power_off(dsi->phy); +err_prepare_power: + if (dsi->panel) { + if (panel_unprepare_power(dsi->panel)) + DRM_INFO("Can't unprepare power the panel\n"); + } err_refcount: dsi->refcount--; return ret; @@ -698,6 +710,11 @@ static void mtk_dsi_poweroff(struct mtk_dsi *dsi) clk_disable_unprepare(dsi->digital_clk); =20 phy_power_off(dsi->phy); + + if (dsi->panel) { + if (panel_unprepare_power(dsi->panel)) + DRM_INFO("Can't unprepare power the panel\n"); + } } =20 static void mtk_output_dsi_enable(struct mtk_dsi *dsi) @@ -1001,7 +1018,6 @@ static int mtk_dsi_probe(struct platform_device *pdev) { struct mtk_dsi *dsi; struct device *dev =3D &pdev->dev; - struct drm_panel *panel; struct resource *regs; int irq_num; int ret; @@ -1019,12 +1035,12 @@ static int mtk_dsi_probe(struct platform_device *pd= ev) } =20 ret =3D drm_of_find_panel_or_bridge(dev->of_node, 0, 0, - &panel, &dsi->next_bridge); + &dsi->panel, &dsi->next_bridge); if (ret) goto err_unregister_host; =20 - if (panel) { - dsi->next_bridge =3D devm_drm_panel_bridge_add(dev, panel); + if (dsi->panel) { + dsi->next_bridge =3D devm_drm_panel_bridge_add(dev, dsi->panel); if (IS_ERR(dsi->next_bridge)) { ret =3D PTR_ERR(dsi->next_bridge); goto err_unregister_host; --=20 2.12.5