From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87184C4332F for ; Fri, 12 Nov 2021 10:55:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7165F60EFD for ; Fri, 12 Nov 2021 10:55:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234749AbhKLK6c (ORCPT ); Fri, 12 Nov 2021 05:58:32 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:40084 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234700AbhKLK6a (ORCPT ); Fri, 12 Nov 2021 05:58:30 -0500 X-UUID: 0d6bd849f4864a738652e7d0b59f7f63-20211112 X-UUID: 0d6bd849f4864a738652e7d0b59f7f63-20211112 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 155278778; Fri, 12 Nov 2021 18:55:36 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 12 Nov 2021 18:55:34 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:55:32 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , Subject: [PATCH v9 01/15] dt-binding: mediatek: Get rid of mediatek,larb for multimedia HW Date: Fri, 12 Nov 2021 18:54:55 +0800 Message-ID: <20211112105509.12010-2-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After adding device_link between the consumer with the smi-larbs, if the consumer call its owner pm_runtime_get(_sync), the pm_runtime_get(_sync) of smi-larb and smi-common will be called automatically. Thus, the consumer don't need this property. And IOMMU also know which larb this consumer connects with from iommu id in the "iommus=3D" property. Signed-off-by: Yong Wu Reviewed-by: Rob Herring Reviewed-by: Evan Green Acked-by: AngeloGioacchino Del Regno --- .../bindings/display/mediatek/mediatek,disp.txt | 9 --------- .../devicetree/bindings/media/mediatek-jpeg-decoder.yaml | 9 --------- .../devicetree/bindings/media/mediatek-jpeg-encoder.yaml | 9 --------- Documentation/devicetree/bindings/media/mediatek-mdp.txt | 8 -------- .../devicetree/bindings/media/mediatek-vcodec.txt | 4 ---- 5 files changed, 39 deletions(-) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,di= sp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.t= xt index fbb59c9ddda6..867bd82e2f03 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt @@ -61,8 +61,6 @@ Required properties (DMA function blocks): "mediatek,-disp-rdma" "mediatek,-disp-wdma" the supported chips are mt2701, mt8167 and mt8173. -- larb: Should contain a phandle pointing to the local arbiter device as d= efined - in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-lar= b.yaml - iommus: Should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details. @@ -91,7 +89,6 @@ ovl0: ovl@1400c000 { power-domains =3D <&scpsys MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_OVL0>; iommus =3D <&iommu M4U_PORT_DISP_OVL0>; - mediatek,larb =3D <&larb0>; }; =20 ovl1: ovl@1400d000 { @@ -101,7 +98,6 @@ ovl1: ovl@1400d000 { power-domains =3D <&scpsys MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_OVL1>; iommus =3D <&iommu M4U_PORT_DISP_OVL1>; - mediatek,larb =3D <&larb4>; }; =20 rdma0: rdma@1400e000 { @@ -111,7 +107,6 @@ rdma0: rdma@1400e000 { power-domains =3D <&scpsys MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_RDMA0>; iommus =3D <&iommu M4U_PORT_DISP_RDMA0>; - mediatek,larb =3D <&larb0>; mediatek,rdma-fifosize =3D <8192>; }; =20 @@ -122,7 +117,6 @@ rdma1: rdma@1400f000 { power-domains =3D <&scpsys MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_RDMA1>; iommus =3D <&iommu M4U_PORT_DISP_RDMA1>; - mediatek,larb =3D <&larb4>; }; =20 rdma2: rdma@14010000 { @@ -132,7 +126,6 @@ rdma2: rdma@14010000 { power-domains =3D <&scpsys MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_RDMA2>; iommus =3D <&iommu M4U_PORT_DISP_RDMA2>; - mediatek,larb =3D <&larb4>; }; =20 wdma0: wdma@14011000 { @@ -142,7 +135,6 @@ wdma0: wdma@14011000 { power-domains =3D <&scpsys MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_WDMA0>; iommus =3D <&iommu M4U_PORT_DISP_WDMA0>; - mediatek,larb =3D <&larb0>; }; =20 wdma1: wdma@14012000 { @@ -152,7 +144,6 @@ wdma1: wdma@14012000 { power-domains =3D <&scpsys MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_WDMA1>; iommus =3D <&iommu M4U_PORT_DISP_WDMA1>; - mediatek,larb =3D <&larb4>; }; =20 color0: color@14013000 { diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.= yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml index 9b87f036f178..052e752157b4 100644 --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml @@ -42,13 +42,6 @@ properties: power-domains: maxItems: 1 =20 - mediatek,larb: - $ref: '/schemas/types.yaml#/definitions/phandle' - description: | - Must contain the local arbiters in the current Socs, see - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-la= rb.yaml - for details. - iommus: maxItems: 2 description: | @@ -63,7 +56,6 @@ required: - clocks - clock-names - power-domains - - mediatek,larb - iommus =20 additionalProperties: false @@ -83,7 +75,6 @@ examples: clock-names =3D "jpgdec-smi", "jpgdec"; power-domains =3D <&scpsys MT2701_POWER_DOMAIN_ISP>; - mediatek,larb =3D <&larb2>; iommus =3D <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; }; diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.= yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml index fcd9b829e036..8bfdfdfaba59 100644 --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml @@ -35,13 +35,6 @@ properties: power-domains: maxItems: 1 =20 - mediatek,larb: - $ref: '/schemas/types.yaml#/definitions/phandle' - description: | - Must contain the local arbiters in the current Socs, see - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-la= rb.yaml - for details. - iommus: maxItems: 2 description: | @@ -56,7 +49,6 @@ required: - clocks - clock-names - power-domains - - mediatek,larb - iommus =20 additionalProperties: false @@ -75,7 +67,6 @@ examples: clocks =3D <&imgsys CLK_IMG_VENC>; clock-names =3D "jpgenc"; power-domains =3D <&scpsys MT2701_POWER_DOMAIN_ISP>; - mediatek,larb =3D <&larb2>; iommus =3D <&iommu MT2701_M4U_PORT_JPGENC_RDMA>, <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>; }; diff --git a/Documentation/devicetree/bindings/media/mediatek-mdp.txt b/Doc= umentation/devicetree/bindings/media/mediatek-mdp.txt index caa24943da33..53ef26e2c857 100644 --- a/Documentation/devicetree/bindings/media/mediatek-mdp.txt +++ b/Documentation/devicetree/bindings/media/mediatek-mdp.txt @@ -27,9 +27,6 @@ Required properties (DMA function blocks, child node): - iommus: should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details. -- mediatek,larb: must contain the local arbiters in the current Socs, see - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.y= aml - for details. =20 Example: mdp_rdma0: rdma@14001000 { @@ -40,7 +37,6 @@ Example: <&mmsys CLK_MM_MUTEX_32K>; power-domains =3D <&scpsys MT8173_POWER_DOMAIN_MM>; iommus =3D <&iommu M4U_PORT_MDP_RDMA0>; - mediatek,larb =3D <&larb0>; mediatek,vpu =3D <&vpu>; }; =20 @@ -51,7 +47,6 @@ Example: <&mmsys CLK_MM_MUTEX_32K>; power-domains =3D <&scpsys MT8173_POWER_DOMAIN_MM>; iommus =3D <&iommu M4U_PORT_MDP_RDMA1>; - mediatek,larb =3D <&larb4>; }; =20 mdp_rsz0: rsz@14003000 { @@ -81,7 +76,6 @@ Example: clocks =3D <&mmsys CLK_MM_MDP_WDMA>; power-domains =3D <&scpsys MT8173_POWER_DOMAIN_MM>; iommus =3D <&iommu M4U_PORT_MDP_WDMA>; - mediatek,larb =3D <&larb0>; }; =20 mdp_wrot0: wrot@14007000 { @@ -90,7 +84,6 @@ Example: clocks =3D <&mmsys CLK_MM_MDP_WROT0>; power-domains =3D <&scpsys MT8173_POWER_DOMAIN_MM>; iommus =3D <&iommu M4U_PORT_MDP_WROT0>; - mediatek,larb =3D <&larb0>; }; =20 mdp_wrot1: wrot@14008000 { @@ -99,5 +92,4 @@ Example: clocks =3D <&mmsys CLK_MM_MDP_WROT1>; power-domains =3D <&scpsys MT8173_POWER_DOMAIN_MM>; iommus =3D <&iommu M4U_PORT_MDP_WROT1>; - mediatek,larb =3D <&larb4>; }; diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt b/= Documentation/devicetree/bindings/media/mediatek-vcodec.txt index ad1321e5a22d..71237355cc7e 100644 --- a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt +++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt @@ -13,7 +13,6 @@ Required properties: - reg : Physical base address of the video codec registers and length of memory mapped region. - interrupts : interrupt number to the cpu. -- mediatek,larb : must contain the local arbiters in the current Socs. - clocks : list of clock specifiers, corresponding to entries in the clock-names property. - clock-names: avc encoder must contain "venc_sel", vp8 encoder must @@ -46,7 +45,6 @@ vcodec_dec: vcodec@16000000 { <0 0x16027800 0 0x800>, /*VP8_VL*/ <0 0x16028400 0 0x400>; /*VP9_VD*/ interrupts =3D ; - mediatek,larb =3D <&larb1>; iommus =3D <&iommu M4U_PORT_HW_VDEC_MC_EXT>, <&iommu M4U_PORT_HW_VDEC_PP_EXT>, <&iommu M4U_PORT_HW_VDEC_AVC_MV_EXT>, @@ -99,7 +97,6 @@ vcodec_enc_avc: vcodec@18002000 { <&iommu M4U_PORT_VENC_REF_CHROMA>, <&iommu M4U_PORT_VENC_NBM_RDMA>, <&iommu M4U_PORT_VENC_NBM_WDMA>; - mediatek,larb =3D <&larb3>; mediatek,vpu =3D <&vpu>; clocks =3D <&topckgen CLK_TOP_VENC_SEL>; clock-names =3D "venc_sel"; @@ -120,7 +117,6 @@ vcodec_enc_vp8: vcodec@19002000 { <&iommu M4U_PORT_VENC_CUR_CHROMA_SET2>, <&iommu M4U_PORT_VENC_REF_LUMA_SET2>, <&iommu M4U_PORT_VENC_REC_CHROMA_SET2>; - mediatek,larb =3D <&larb5>; mediatek,vpu =3D <&vpu>; clocks =3D <&topckgen CLK_TOP_VENC_LT_SEL>; clock-names =3D "venc_lt_sel"; --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9F7AC4332F for ; Fri, 12 Nov 2021 10:55:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 941086103E for ; Fri, 12 Nov 2021 10:55:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234769AbhKLK6q (ORCPT ); Fri, 12 Nov 2021 05:58:46 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:40474 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234700AbhKLK6o (ORCPT ); Fri, 12 Nov 2021 05:58:44 -0500 X-UUID: 492fa436d19c4418bb72f5b539602551-20211112 X-UUID: 492fa436d19c4418bb72f5b539602551-20211112 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 82111728; Fri, 12 Nov 2021 18:55:51 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 12 Nov 2021 18:55:49 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:55:48 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , Subject: [PATCH v9 02/15] iommu/mediatek-v1: Free the existed fwspec if the master dev already has Date: Fri, 12 Nov 2021 18:54:56 +0800 Message-ID: <20211112105509.12010-3-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When the iommu master device enters of_iommu_xlate, the ops may be NULL(iommu dev is defered), then it will initialize the fwspec here: [] (dev_iommu_fwspec_set) from [] (iommu_fwspec_init+0xbc/0xd4) [] (iommu_fwspec_init) from [] (of_iommu_xlate+0x7c/0x12c) [] (of_iommu_xlate) from [] (of_iommu_configure+0x144/0x1e8) BUT the mtk_iommu_v1.c only supports arm32, the probing flow still is a bit weird. We always expect create the fwspec internally. otherwise it will enter here and return fail. static int mtk_iommu_create_mapping(struct device *dev, struct of_phandle_args *args) { ... if (!fwspec) { .... } else if (dev_iommu_fwspec_get(dev)->ops !=3D &mtk_iommu_ops) { >>>>>>>>>>Enter here. return fail.<<<<<<<<<<<< return -EINVAL; } ... } Thus, Free the existed fwspec if the master device already has fwspec. This issue is reported at: https://lore.kernel.org/linux-mediatek/trinity-7d9ebdc9-4849-4d93-bfb5-429d= cb4ee449-1626253158870@3c-app-gmx-bs01/ Reported-by: Frank Wunderlich Tested-by: Frank Wunderlich # BPI-R2/MT7623 Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu_v1.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/iommu/mtk_iommu_v1.c b/drivers/iommu/mtk_iommu_v1.c index be22fcf988ce..1467ba1e4417 100644 --- a/drivers/iommu/mtk_iommu_v1.c +++ b/drivers/iommu/mtk_iommu_v1.c @@ -425,6 +425,15 @@ static struct iommu_device *mtk_iommu_probe_device(str= uct device *dev) struct mtk_iommu_data *data; int err, idx =3D 0; =20 + /* + * In the deferred case, free the existed fwspec. + * Always initialize the fwspec internally. + */ + if (fwspec) { + iommu_fwspec_free(dev); + fwspec =3D dev_iommu_fwspec_get(dev); + } + while (!of_parse_phandle_with_args(dev->of_node, "iommus", "#iommu-cells", idx, &iommu_spec)) { --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2DB0FC433F5 for ; Fri, 12 Nov 2021 10:56:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 16CCF60F21 for ; Fri, 12 Nov 2021 10:56:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234822AbhKLK7C (ORCPT ); Fri, 12 Nov 2021 05:59:02 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:57254 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234813AbhKLK65 (ORCPT ); Fri, 12 Nov 2021 05:58:57 -0500 X-UUID: 687e34f9e01146a38cf4ec4b1942b0b9-20211112 X-UUID: 687e34f9e01146a38cf4ec4b1942b0b9-20211112 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1803092374; Fri, 12 Nov 2021 18:56:01 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 12 Nov 2021 18:56:00 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:55:58 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , Subject: [PATCH v9 03/15] iommu/mediatek: Return ENODEV if the device is NULL Date: Fri, 12 Nov 2021 18:54:57 +0800 Message-ID: <20211112105509.12010-4-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The platform device is created at: of_platform_default_populate_init: arch_initcall_sync ->of_platform_populate ->of_platform_device_create_pdata When entering our probe, all the devices should be already created. if it is null, means NODEV. Currently we don't get the fail case. It's a minor fix, no need add fixes tags. Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 2 +- drivers/iommu/mtk_iommu_v1.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index d837adfd1da5..8f566d2e72e5 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -846,7 +846,7 @@ static int mtk_iommu_probe(struct platform_device *pdev) plarbdev =3D of_find_device_by_node(larbnode); if (!plarbdev) { of_node_put(larbnode); - return -EPROBE_DEFER; + return -ENODEV; } data->larb_imu[id].dev =3D &plarbdev->dev; =20 diff --git a/drivers/iommu/mtk_iommu_v1.c b/drivers/iommu/mtk_iommu_v1.c index 1467ba1e4417..68bf02f87cfd 100644 --- a/drivers/iommu/mtk_iommu_v1.c +++ b/drivers/iommu/mtk_iommu_v1.c @@ -604,7 +604,7 @@ static int mtk_iommu_probe(struct platform_device *pdev) plarbdev =3D of_find_device_by_node(larbnode); if (!plarbdev) { of_node_put(larbnode); - return -EPROBE_DEFER; + return -ENODEV; } data->larb_imu[i].dev =3D &plarbdev->dev; =20 --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F973C43217 for ; Fri, 12 Nov 2021 10:56:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 692F660EFD for ; Fri, 12 Nov 2021 10:56:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234577AbhKLK7K (ORCPT ); Fri, 12 Nov 2021 05:59:10 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:41038 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S233619AbhKLK7I (ORCPT ); Fri, 12 Nov 2021 05:59:08 -0500 X-UUID: 60ded804906d4400bf9ac0af5d1c1ced-20211112 X-UUID: 60ded804906d4400bf9ac0af5d1c1ced-20211112 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 663950336; Fri, 12 Nov 2021 18:56:15 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 12 Nov 2021 18:56:13 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:56:11 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , Subject: [PATCH v9 04/15] iommu/mediatek: Add probe_defer for smi-larb Date: Fri, 12 Nov 2021 18:54:58 +0800 Message-ID: <20211112105509.12010-5-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Prepare for adding device_link. The iommu consumer should use device_link to connect with the smi-larb(supplier). then the smi-larb should run before the iommu consumer. Here we delay the iommu driver until the smi driver is ready, then all the iommu consumers always are after the smi driver. When there is no this patch, if some consumer drivers run before smi-larb, the supplier link_status is DL_DEV_NO_DRIVER(0) in the device_link_add, then device_links_driver_bound will use WARN_ON to complain that the link_status of supplier is not right. device_is_bound may be more elegant here. but it is not allowed to EXPORT from https://lore.kernel.org/patchwork/patch/1334670/. Signed-off-by: Yong Wu Tested-by: Frank Wunderlich # BPI-R2/MT7623 --- drivers/iommu/mtk_iommu.c | 4 ++++ drivers/iommu/mtk_iommu_v1.c | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 8f566d2e72e5..0033c0634e5e 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -848,6 +848,10 @@ static int mtk_iommu_probe(struct platform_device *pde= v) of_node_put(larbnode); return -ENODEV; } + if (!plarbdev->dev.driver) { + of_node_put(larbnode); + return -EPROBE_DEFER; + } data->larb_imu[id].dev =3D &plarbdev->dev; =20 component_match_add_release(dev, &match, release_of, diff --git a/drivers/iommu/mtk_iommu_v1.c b/drivers/iommu/mtk_iommu_v1.c index 68bf02f87cfd..4089077256f4 100644 --- a/drivers/iommu/mtk_iommu_v1.c +++ b/drivers/iommu/mtk_iommu_v1.c @@ -606,6 +606,10 @@ static int mtk_iommu_probe(struct platform_device *pde= v) of_node_put(larbnode); return -ENODEV; } + if (!plarbdev->dev.driver) { + of_node_put(larbnode); + return -EPROBE_DEFER; + } data->larb_imu[i].dev =3D &plarbdev->dev; =20 component_match_add_release(dev, &match, release_of, --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69DC6C43219 for ; Fri, 12 Nov 2021 10:56:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 53CF160F39 for ; Fri, 12 Nov 2021 10:56:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234886AbhKLK7V (ORCPT ); Fri, 12 Nov 2021 05:59:21 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:57874 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234853AbhKLK7T (ORCPT ); Fri, 12 Nov 2021 05:59:19 -0500 X-UUID: a52f80a27a7d4a529f46799d7f944407-20211112 X-UUID: a52f80a27a7d4a529f46799d7f944407-20211112 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 4873376; Fri, 12 Nov 2021 18:56:27 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 12 Nov 2021 18:56:25 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:56:23 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , Subject: [PATCH v9 05/15] iommu/mediatek: Add device_link between the consumer and the larb devices Date: Fri, 12 Nov 2021 18:54:59 +0800 Message-ID: <20211112105509.12010-6-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MediaTek IOMMU-SMI diagram is like below. all the consumer connect with smi-larb, then connect with smi-common. M4U | smi-common | ------------- | | ... | | larb1 larb2 | | vdec venc When the consumer works, it should enable the smi-larb's power which also need enable the smi-common's power firstly. Thus, First of all, use the device link connect the consumer and the smi-larbs. then add device link between the smi-larb and smi-common. This patch adds device_link between the consumer and the larbs. When device_link_add, I add the flag DL_FLAG_STATELESS to avoid calling pm_runtime_xx to keep the original status of clocks. It can avoid two issues: 1) Display HW show fastlogo abnormally reported in [1]. At the beggining, all the clocks are enabled before entering kernel, but the clocks for display HW(always in larb0) will be gated after clk_enable and clk_disable called from device_link_add(->pm_runtime_resume) and rpm_idle. The clock operation happened before display driver probe. At that time, the display HW will be abnormal. 2) A deadlock issue reported in [2]. Use DL_FLAG_STATELESS to skip pm_runtime_xx to avoid the deadlock. Corresponding, DL_FLAG_AUTOREMOVE_CONSUMER can't be added, then device_link_removed should be added explicitly. Meanwhile, Currently we don't have a device connect with 2 larbs at the same time. Disallow this case, print the error log. [1] https://lore.kernel.org/linux-mediatek/1564213888.22908.4.camel@mhfsdca= p03/ [2] https://lore.kernel.org/patchwork/patch/1086569/ Suggested-by: Tomasz Figa Signed-off-by: Yong Wu Tested-by: Frank Wunderlich # BPI-R2/MT7623 --- drivers/iommu/mtk_iommu.c | 30 ++++++++++++++++++++++++++++++ drivers/iommu/mtk_iommu_v1.c | 29 ++++++++++++++++++++++++++++- 2 files changed, 58 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 0033c0634e5e..5fed0b64ddd0 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -560,22 +560,52 @@ static struct iommu_device *mtk_iommu_probe_device(st= ruct device *dev) { struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); struct mtk_iommu_data *data; + struct device_link *link; + struct device *larbdev; + unsigned int larbid, larbidx, i; =20 if (!fwspec || fwspec->ops !=3D &mtk_iommu_ops) return ERR_PTR(-ENODEV); /* Not a iommu client device */ =20 data =3D dev_iommu_priv_get(dev); =20 + /* + * Link the consumer device with the smi-larb device(supplier). + * The device that connects with each a larb is a independent HW. + * All the ports in each a device should be in the same larbs. + */ + larbid =3D MTK_M4U_TO_LARB(fwspec->ids[0]); + for (i =3D 1; i < fwspec->num_ids; i++) { + larbidx =3D MTK_M4U_TO_LARB(fwspec->ids[i]); + if (larbid !=3D larbidx) { + dev_err(dev, "Can only use one larb. Fail@larb%d-%d.\n", + larbid, larbidx); + return ERR_PTR(-EINVAL); + } + } + larbdev =3D data->larb_imu[larbid].dev; + link =3D device_link_add(dev, larbdev, + DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS); + if (!link) + dev_err(dev, "Unable to link %s\n", dev_name(larbdev)); return &data->iommu; } =20 static void mtk_iommu_release_device(struct device *dev) { struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); + struct mtk_iommu_data *data; + struct device *larbdev; + unsigned int larbid; =20 if (!fwspec || fwspec->ops !=3D &mtk_iommu_ops) return; =20 + data =3D dev_iommu_priv_get(dev); + larbid =3D MTK_M4U_TO_LARB(fwspec->ids[0]); + larbdev =3D data->larb_imu[larbid].dev; + device_link_remove(dev, larbdev); + iommu_fwspec_free(dev); } =20 diff --git a/drivers/iommu/mtk_iommu_v1.c b/drivers/iommu/mtk_iommu_v1.c index 4089077256f4..4052aad75a81 100644 --- a/drivers/iommu/mtk_iommu_v1.c +++ b/drivers/iommu/mtk_iommu_v1.c @@ -423,7 +423,9 @@ static struct iommu_device *mtk_iommu_probe_device(stru= ct device *dev) struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); struct of_phandle_args iommu_spec; struct mtk_iommu_data *data; - int err, idx =3D 0; + int err, idx =3D 0, larbid, larbidx; + struct device_link *link; + struct device *larbdev; =20 /* * In the deferred case, free the existed fwspec. @@ -453,6 +455,23 @@ static struct iommu_device *mtk_iommu_probe_device(str= uct device *dev) =20 data =3D dev_iommu_priv_get(dev); =20 + /* Link the consumer device with the smi-larb device(supplier) */ + larbid =3D mt2701_m4u_to_larb(fwspec->ids[0]); + for (idx =3D 1; idx < fwspec->num_ids; idx++) { + larbidx =3D mt2701_m4u_to_larb(fwspec->ids[idx]); + if (larbid !=3D larbidx) { + dev_err(dev, "Can only use one larb. Fail@larb%d-%d.\n", + larbid, larbidx); + return ERR_PTR(-EINVAL); + } + } + + larbdev =3D data->larb_imu[larbid].dev; + link =3D device_link_add(dev, larbdev, + DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS); + if (!link) + dev_err(dev, "Unable to link %s\n", dev_name(larbdev)); + return &data->iommu; } =20 @@ -473,10 +492,18 @@ static void mtk_iommu_probe_finalize(struct device *d= ev) static void mtk_iommu_release_device(struct device *dev) { struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); + struct mtk_iommu_data *data; + struct device *larbdev; + unsigned int larbid; =20 if (!fwspec || fwspec->ops !=3D &mtk_iommu_ops) return; =20 + data =3D dev_iommu_priv_get(dev); + larbid =3D mt2701_m4u_to_larb(fwspec->ids[0]); + larbdev =3D data->larb_imu[larbid].dev; + device_link_remove(dev, larbdev); + iommu_fwspec_free(dev); } =20 --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C260C4332F for ; Fri, 12 Nov 2021 10:56:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EB18860F8F for ; Fri, 12 Nov 2021 10:56:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234909AbhKLK7o (ORCPT ); Fri, 12 Nov 2021 05:59:44 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:41682 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234863AbhKLK7e (ORCPT ); Fri, 12 Nov 2021 05:59:34 -0500 X-UUID: 3b6be930e026403e851d82e02babea79-20211112 X-UUID: 3b6be930e026403e851d82e02babea79-20211112 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 484631138; Fri, 12 Nov 2021 18:56:40 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 12 Nov 2021 18:56:38 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:56:36 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , , Rick Chang , Xia Jiang Subject: [PATCH v9 06/15] media: mtk-jpeg: Get rid of mtk_smi_larb_get/put Date: Fri, 12 Nov 2021 18:55:00 +0800 Message-ID: <20211112105509.12010-7-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MediaTek IOMMU has already added device_link between the consumer and smi-larb device. If the jpg device call the pm_runtime_get_sync, the smi-larb's pm_runtime_get_sync also be called automatically. After removing the larb_get operations, then mtk_jpeg_clk_init is also unnecessary. Remove it too. CC: Rick Chang CC: Xia Jiang Signed-off-by: Yong Wu Reviewed-by: Evan Green Acked-by: Rick Chang Reviewed-by: Dafna Hirschfeld Tested-by: Frank Wunderlich # BPI-R2/MT7623 --- .../media/platform/mtk-jpeg/mtk_jpeg_core.c | 45 +------------------ .../media/platform/mtk-jpeg/mtk_jpeg_core.h | 2 - 2 files changed, 2 insertions(+), 45 deletions(-) diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c b/drivers/medi= a/platform/mtk-jpeg/mtk_jpeg_core.c index a89c7b206eef..4fea2c512434 100644 --- a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.c @@ -22,7 +22,6 @@ #include #include #include -#include =20 #include "mtk_jpeg_enc_hw.h" #include "mtk_jpeg_dec_hw.h" @@ -1055,10 +1054,6 @@ static void mtk_jpeg_clk_on(struct mtk_jpeg_dev *jpe= g) { int ret; =20 - ret =3D mtk_smi_larb_get(jpeg->larb); - if (ret) - dev_err(jpeg->dev, "mtk_smi_larb_get larbvdec fail %d\n", ret); - ret =3D clk_bulk_prepare_enable(jpeg->variant->num_clks, jpeg->variant->clks); if (ret) @@ -1069,7 +1064,6 @@ static void mtk_jpeg_clk_off(struct mtk_jpeg_dev *jpe= g) { clk_bulk_disable_unprepare(jpeg->variant->num_clks, jpeg->variant->clks); - mtk_smi_larb_put(jpeg->larb); } =20 static irqreturn_t mtk_jpeg_enc_done(struct mtk_jpeg_dev *jpeg) @@ -1284,35 +1278,6 @@ static struct clk_bulk_data mtk_jpeg_clocks[] =3D { { .id =3D "jpgenc" }, }; =20 -static int mtk_jpeg_clk_init(struct mtk_jpeg_dev *jpeg) -{ - struct device_node *node; - struct platform_device *pdev; - int ret; - - node =3D of_parse_phandle(jpeg->dev->of_node, "mediatek,larb", 0); - if (!node) - return -EINVAL; - pdev =3D of_find_device_by_node(node); - if (WARN_ON(!pdev)) { - of_node_put(node); - return -EINVAL; - } - of_node_put(node); - - jpeg->larb =3D &pdev->dev; - - ret =3D devm_clk_bulk_get(jpeg->dev, jpeg->variant->num_clks, - jpeg->variant->clks); - if (ret) { - dev_err(&pdev->dev, "failed to get jpeg clock:%d\n", ret); - put_device(&pdev->dev); - return ret; - } - - return 0; -} - static void mtk_jpeg_job_timeout_work(struct work_struct *work) { struct mtk_jpeg_dev *jpeg =3D container_of(work, struct mtk_jpeg_dev, @@ -1333,11 +1298,6 @@ static void mtk_jpeg_job_timeout_work(struct work_st= ruct *work) v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx); } =20 -static inline void mtk_jpeg_clk_release(struct mtk_jpeg_dev *jpeg) -{ - put_device(jpeg->larb); -} - static int mtk_jpeg_probe(struct platform_device *pdev) { struct mtk_jpeg_dev *jpeg; @@ -1376,7 +1336,8 @@ static int mtk_jpeg_probe(struct platform_device *pde= v) goto err_req_irq; } =20 - ret =3D mtk_jpeg_clk_init(jpeg); + ret =3D devm_clk_bulk_get(jpeg->dev, jpeg->variant->num_clks, + jpeg->variant->clks); if (ret) { dev_err(&pdev->dev, "Failed to init clk, err %d\n", ret); goto err_clk_init; @@ -1442,7 +1403,6 @@ static int mtk_jpeg_probe(struct platform_device *pde= v) v4l2_device_unregister(&jpeg->v4l2_dev); =20 err_dev_register: - mtk_jpeg_clk_release(jpeg); =20 err_clk_init: =20 @@ -1460,7 +1420,6 @@ static int mtk_jpeg_remove(struct platform_device *pd= ev) video_device_release(jpeg->vdev); v4l2_m2m_release(jpeg->m2m_dev); v4l2_device_unregister(&jpeg->v4l2_dev); - mtk_jpeg_clk_release(jpeg); =20 return 0; } diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h b/drivers/medi= a/platform/mtk-jpeg/mtk_jpeg_core.h index 595f7f10c9fd..3e4811a41ba2 100644 --- a/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_core.h @@ -85,7 +85,6 @@ struct mtk_jpeg_variant { * @alloc_ctx: videobuf2 memory allocator's context * @vdev: video device node for jpeg mem2mem mode * @reg_base: JPEG registers mapping - * @larb: SMI device * @job_timeout_work: IRQ timeout structure * @variant: driver variant to be used */ @@ -99,7 +98,6 @@ struct mtk_jpeg_dev { void *alloc_ctx; struct video_device *vdev; void __iomem *reg_base; - struct device *larb; struct delayed_work job_timeout_work; const struct mtk_jpeg_variant *variant; }; --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 579B5C433EF for ; Fri, 12 Nov 2021 10:56:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3F77360F90 for ; Fri, 12 Nov 2021 10:56:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234577AbhKLK7q (ORCPT ); Fri, 12 Nov 2021 05:59:46 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:58462 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234891AbhKLK7l (ORCPT ); Fri, 12 Nov 2021 05:59:41 -0500 X-UUID: f477af8524534b959ea043e212102649-20211112 X-UUID: f477af8524534b959ea043e212102649-20211112 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 556920711; Fri, 12 Nov 2021 18:56:48 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 12 Nov 2021 18:56:47 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:56:45 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , , Minghsiu Tsai , Houlong Wei Subject: [PATCH v9 07/15] media: mtk-mdp: Get rid of mtk_smi_larb_get/put Date: Fri, 12 Nov 2021 18:55:01 +0800 Message-ID: <20211112105509.12010-8-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MediaTek IOMMU has already added the device_link between the consumer and smi-larb device. If the mdp device call the pm_runtime_get_sync, the smi-larb's pm_runtime_get_sync also be called automatically. CC: Minghsiu Tsai CC: Houlong Wei Signed-off-by: Yong Wu Reviewed-by: Evan Green Reviewed-by: Houlong Wei Reviewed-by: Dafna Hirschfeld --- drivers/media/platform/mtk-mdp/mtk_mdp_comp.c | 40 ------------------- drivers/media/platform/mtk-mdp/mtk_mdp_comp.h | 2 - drivers/media/platform/mtk-mdp/mtk_mdp_core.c | 1 - 3 files changed, 43 deletions(-) diff --git a/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c b/drivers/media/= platform/mtk-mdp/mtk_mdp_comp.c index b3426a551bea..1e3833f1c9ae 100644 --- a/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c +++ b/drivers/media/platform/mtk-mdp/mtk_mdp_comp.c @@ -9,7 +9,6 @@ #include #include #include -#include =20 #include "mtk_mdp_comp.h" =20 @@ -18,14 +17,6 @@ void mtk_mdp_comp_clock_on(struct device *dev, struct mt= k_mdp_comp *comp) { int i, err; =20 - if (comp->larb_dev) { - err =3D mtk_smi_larb_get(comp->larb_dev); - if (err) - dev_err(dev, - "failed to get larb, err %d. type:%d\n", - err, comp->type); - } - for (i =3D 0; i < ARRAY_SIZE(comp->clk); i++) { if (IS_ERR(comp->clk[i])) continue; @@ -46,17 +37,12 @@ void mtk_mdp_comp_clock_off(struct device *dev, struct = mtk_mdp_comp *comp) continue; clk_disable_unprepare(comp->clk[i]); } - - if (comp->larb_dev) - mtk_smi_larb_put(comp->larb_dev); } =20 int mtk_mdp_comp_init(struct device *dev, struct device_node *node, struct mtk_mdp_comp *comp, enum mtk_mdp_comp_type comp_type) { - struct device_node *larb_node; - struct platform_device *larb_pdev; int ret; int i; =20 @@ -77,32 +63,6 @@ int mtk_mdp_comp_init(struct device *dev, struct device_= node *node, break; } =20 - /* Only DMA capable components need the LARB property */ - comp->larb_dev =3D NULL; - if (comp->type !=3D MTK_MDP_RDMA && - comp->type !=3D MTK_MDP_WDMA && - comp->type !=3D MTK_MDP_WROT) - return 0; - - larb_node =3D of_parse_phandle(node, "mediatek,larb", 0); - if (!larb_node) { - dev_err(dev, - "Missing mediadek,larb phandle in %pOF node\n", node); - ret =3D -EINVAL; - goto put_dev; - } - - larb_pdev =3D of_find_device_by_node(larb_node); - if (!larb_pdev) { - dev_warn(dev, "Waiting for larb device %pOF\n", larb_node); - of_node_put(larb_node); - ret =3D -EPROBE_DEFER; - goto put_dev; - } - of_node_put(larb_node); - - comp->larb_dev =3D &larb_pdev->dev; - return 0; =20 put_dev: diff --git a/drivers/media/platform/mtk-mdp/mtk_mdp_comp.h b/drivers/media/= platform/mtk-mdp/mtk_mdp_comp.h index 7897766c96bb..ae41dd3cd72a 100644 --- a/drivers/media/platform/mtk-mdp/mtk_mdp_comp.h +++ b/drivers/media/platform/mtk-mdp/mtk_mdp_comp.h @@ -26,14 +26,12 @@ enum mtk_mdp_comp_type { * @node: list node to track sibing MDP components * @dev_node: component device node * @clk: clocks required for component - * @larb_dev: SMI device required for component * @type: component type */ struct mtk_mdp_comp { struct list_head node; struct device_node *dev_node; struct clk *clk[2]; - struct device *larb_dev; enum mtk_mdp_comp_type type; }; =20 diff --git a/drivers/media/platform/mtk-mdp/mtk_mdp_core.c b/drivers/media/= platform/mtk-mdp/mtk_mdp_core.c index 976aa1f4829b..70a8eab16863 100644 --- a/drivers/media/platform/mtk-mdp/mtk_mdp_core.c +++ b/drivers/media/platform/mtk-mdp/mtk_mdp_core.c @@ -17,7 +17,6 @@ #include #include #include -#include =20 #include "mtk_mdp_core.h" #include "mtk_mdp_m2m.h" --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D4E4C4332F for ; Fri, 12 Nov 2021 10:57:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2830E60F39 for ; Fri, 12 Nov 2021 10:57:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234960AbhKLK75 (ORCPT ); Fri, 12 Nov 2021 05:59:57 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:42250 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234948AbhKLK7w (ORCPT ); Fri, 12 Nov 2021 05:59:52 -0500 X-UUID: 6a4aab7e9f6f46ff9c7fa6a55942109c-20211112 X-UUID: 6a4aab7e9f6f46ff9c7fa6a55942109c-20211112 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 816629391; Fri, 12 Nov 2021 18:56:57 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 12 Nov 2021 18:56:56 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:56:54 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , , Yongqiang Niu , CK Hu Subject: [PATCH v9 08/15] drm/mediatek: Add pm runtime support for ovl and rdma Date: Fri, 12 Nov 2021 18:55:02 +0800 Message-ID: <20211112105509.12010-9-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Yongqiang Niu Prepare for smi cleaning up "mediatek,larb". Display use the dispsys device to call pm_rumtime_get_sync before. This patch add pm_runtime_xx with ovl and rdma device whose nodes has "iommus" property, then display could help pm_runtime_get for smi via ovl or rdma device. CC: CK Hu Signed-off-by: Yongqiang Niu Signed-off-by: Yong Wu (Yong: Use pm_runtime_resume_and_get instead of pm_runtime_get_sync) Acked-by: Chun-Kuang Hu Tested-by: Frank Wunderlich # BPI-R2/MT7623 --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 8 +++++++- drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 9 ++++++++- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 13 ++++++++++++- 3 files changed, 27 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/medi= atek/mtk_disp_ovl.c index 5326989d5206..716eac6831f2 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -11,6 +11,7 @@ #include #include #include +#include #include =20 #include "mtk_disp_drv.h" @@ -414,9 +415,13 @@ static int mtk_disp_ovl_probe(struct platform_device *= pdev) return ret; } =20 + pm_runtime_enable(dev); + ret =3D component_add(dev, &mtk_disp_ovl_component_ops); - if (ret) + if (ret) { + pm_runtime_disable(dev); dev_err(dev, "Failed to add component: %d\n", ret); + } =20 return ret; } @@ -424,6 +429,7 @@ static int mtk_disp_ovl_probe(struct platform_device *p= dev) static int mtk_disp_ovl_remove(struct platform_device *pdev) { component_del(&pdev->dev, &mtk_disp_ovl_component_ops); + pm_runtime_disable(&pdev->dev); =20 return 0; } diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/med= iatek/mtk_disp_rdma.c index 75d7f45579e2..251f034acb09 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c @@ -9,6 +9,7 @@ #include #include #include +#include #include =20 #include "mtk_disp_drv.h" @@ -327,9 +328,13 @@ static int mtk_disp_rdma_probe(struct platform_device = *pdev) =20 platform_set_drvdata(pdev, priv); =20 + pm_runtime_enable(dev); + ret =3D component_add(dev, &mtk_disp_rdma_component_ops); - if (ret) + if (ret) { + pm_runtime_disable(dev); dev_err(dev, "Failed to add component: %d\n", ret); + } =20 return ret; } @@ -338,6 +343,8 @@ static int mtk_disp_rdma_remove(struct platform_device = *pdev) { component_del(&pdev->dev, &mtk_disp_rdma_component_ops); =20 + pm_runtime_disable(&pdev->dev); + return 0; } =20 diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/medi= atek/mtk_drm_crtc.c index 5f81489fc60c..455ea23c6130 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -649,9 +649,17 @@ static void mtk_drm_crtc_atomic_enable(struct drm_crtc= *crtc, return; } =20 + ret =3D pm_runtime_resume_and_get(comp->dev); + if (ret < 0) { + mtk_smi_larb_put(comp->larb_dev); + DRM_DEV_ERROR(comp->dev, "Failed to enable power domain: %d\n", ret); + return; + } + ret =3D mtk_crtc_ddp_hw_init(mtk_crtc); if (ret) { mtk_smi_larb_put(comp->larb_dev); + pm_runtime_put(comp->dev); return; } =20 @@ -664,7 +672,7 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc= *crtc, { struct mtk_drm_crtc *mtk_crtc =3D to_mtk_crtc(crtc); struct mtk_ddp_comp *comp =3D mtk_crtc->ddp_comp[0]; - int i; + int i, ret; =20 DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id); if (!mtk_crtc->enabled) @@ -688,6 +696,9 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc= *crtc, drm_crtc_vblank_off(crtc); mtk_crtc_ddp_hw_fini(mtk_crtc); mtk_smi_larb_put(comp->larb_dev); + ret =3D pm_runtime_put(comp->dev); + if (ret < 0) + DRM_DEV_ERROR(comp->dev, "Failed to disable power domain: %d\n", ret); =20 mtk_crtc->enabled =3D false; } --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD262C43219 for ; Fri, 12 Nov 2021 10:57:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B1FFC60F55 for ; Fri, 12 Nov 2021 10:57:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234864AbhKLLAF (ORCPT ); Fri, 12 Nov 2021 06:00:05 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:42660 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234948AbhKLLAA (ORCPT ); Fri, 12 Nov 2021 06:00:00 -0500 X-UUID: f70d71e633aa4868b28a9cd01e3b2f33-20211112 X-UUID: f70d71e633aa4868b28a9cd01e3b2f33-20211112 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1253357728; Fri, 12 Nov 2021 18:57:08 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 12 Nov 2021 18:57:07 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:57:05 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , , CK Hu Subject: [PATCH v9 09/15] drm/mediatek: Get rid of mtk_smi_larb_get/put Date: Fri, 12 Nov 2021 18:55:03 +0800 Message-ID: <20211112105509.12010-10-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MediaTek IOMMU has already added the device_link between the consumer and smi-larb device. If the drm device call the pm_runtime_get_sync, the smi-larb's pm_runtime_get_sync also be called automatically. CC: CK Hu CC: Philipp Zabel Signed-off-by: Yong Wu Reviewed-by: Evan Green Acked-by: Chun-Kuang Hu Reviewed-by: Dafna Hirschfeld Tested-by: Frank Wunderlich # BPI-R2/MT7623 --- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 10 ------ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 36 ++------------------- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 - drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 +-- 4 files changed, 3 insertions(+), 49 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/medi= atek/mtk_drm_crtc.c index 455ea23c6130..445c30cc823f 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -12,7 +12,6 @@ #include =20 #include -#include =20 #include #include @@ -643,22 +642,14 @@ static void mtk_drm_crtc_atomic_enable(struct drm_crt= c *crtc, =20 DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id); =20 - ret =3D mtk_smi_larb_get(comp->larb_dev); - if (ret) { - DRM_ERROR("Failed to get larb: %d\n", ret); - return; - } - ret =3D pm_runtime_resume_and_get(comp->dev); if (ret < 0) { - mtk_smi_larb_put(comp->larb_dev); DRM_DEV_ERROR(comp->dev, "Failed to enable power domain: %d\n", ret); return; } =20 ret =3D mtk_crtc_ddp_hw_init(mtk_crtc); if (ret) { - mtk_smi_larb_put(comp->larb_dev); pm_runtime_put(comp->dev); return; } @@ -695,7 +686,6 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc= *crtc, =20 drm_crtc_vblank_off(crtc); mtk_crtc_ddp_hw_fini(mtk_crtc); - mtk_smi_larb_put(comp->larb_dev); ret =3D pm_runtime_put(comp->dev); if (ret < 0) DRM_DEV_ERROR(comp->dev, "Failed to disable power domain: %d\n", ret); diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/= mediatek/mtk_drm_ddp_comp.c index 99cbf44463e4..48642e814370 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -414,37 +414,15 @@ unsigned int mtk_drm_find_possible_crtc_by_comp(struc= t drm_device *drm, return ret; } =20 -static int mtk_ddp_get_larb_dev(struct device_node *node, struct mtk_ddp_c= omp *comp, - struct device *dev) -{ - struct device_node *larb_node; - struct platform_device *larb_pdev; - - larb_node =3D of_parse_phandle(node, "mediatek,larb", 0); - if (!larb_node) { - dev_err(dev, "Missing mediadek,larb phandle in %pOF node\n", node); - return -EINVAL; - } - - larb_pdev =3D of_find_device_by_node(larb_node); - if (!larb_pdev) { - dev_warn(dev, "Waiting for larb device %pOF\n", larb_node); - of_node_put(larb_node); - return -EPROBE_DEFER; - } - of_node_put(larb_node); - comp->larb_dev =3D &larb_pdev->dev; - - return 0; -} - int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id) { struct platform_device *comp_pdev; enum mtk_ddp_comp_type type; struct mtk_ddp_comp_dev *priv; +#if IS_REACHABLE(CONFIG_MTK_CMDQ) int ret; +#endif =20 if (comp_id < 0 || comp_id >=3D DDP_COMPONENT_ID_MAX) return -EINVAL; @@ -460,16 +438,6 @@ int mtk_ddp_comp_init(struct device_node *node, struct= mtk_ddp_comp *comp, } comp->dev =3D &comp_pdev->dev; =20 - /* Only DMA capable components need the LARB property */ - if (type =3D=3D MTK_DISP_OVL || - type =3D=3D MTK_DISP_OVL_2L || - type =3D=3D MTK_DISP_RDMA || - type =3D=3D MTK_DISP_WDMA) { - ret =3D mtk_ddp_get_larb_dev(node, comp, comp->dev); - if (ret) - return ret; - } - if (type =3D=3D MTK_DISP_AAL || type =3D=3D MTK_DISP_BLS || type =3D=3D MTK_DISP_CCORR || diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/= mediatek/mtk_drm_ddp_comp.h index bb914d976cf5..1b582262b682 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h @@ -70,7 +70,6 @@ struct mtk_ddp_comp_funcs { struct mtk_ddp_comp { struct device *dev; int irq; - struct device *larb_dev; enum mtk_ddp_comp_id id; const struct mtk_ddp_comp_funcs *funcs; }; diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/media= tek/mtk_drm_drv.c index aec39724ebeb..c234293fc2c3 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -603,11 +603,8 @@ static int mtk_drm_probe(struct platform_device *pdev) pm_runtime_disable(dev); err_node: of_node_put(private->mutex_node); - for (i =3D 0; i < DDP_COMPONENT_ID_MAX; i++) { + for (i =3D 0; i < DDP_COMPONENT_ID_MAX; i++) of_node_put(private->comp_node[i]); - if (private->ddp_comp[i].larb_dev) - put_device(private->ddp_comp[i].larb_dev); - } return ret; } =20 --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58AB2C4332F for ; Fri, 12 Nov 2021 10:57:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 42F9660F46 for ; Fri, 12 Nov 2021 10:57:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234953AbhKLLAM (ORCPT ); Fri, 12 Nov 2021 06:00:12 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:42952 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234836AbhKLLAK (ORCPT ); Fri, 12 Nov 2021 06:00:10 -0500 X-UUID: 930e4e966ea941a0b31bd60d92b3df10-20211112 X-UUID: 930e4e966ea941a0b31bd60d92b3df10-20211112 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1290764418; Fri, 12 Nov 2021 18:57:17 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 12 Nov 2021 18:57:15 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:57:13 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , , Irui Wang Subject: [PATCH v9 10/15] media: mtk-vcodec: Get rid of mtk_smi_larb_get/put Date: Fri, 12 Nov 2021 18:55:04 +0800 Message-ID: <20211112105509.12010-11-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MediaTek IOMMU has already added the device_link between the consumer and smi-larb device. If the vcodec device call the pm_runtime_get_sync, the smi-larb's pm_runtime_get_sync also be called automatically. CC: Tiffany Lin CC: Irui Wang Signed-off-by: Yong Wu Reviewed-by: Evan Green Acked-by: Tiffany Lin Reviewed-by: Dafna Hirschfeld --- .../platform/mtk-vcodec/mtk_vcodec_dec_pm.c | 37 +++------------- .../platform/mtk-vcodec/mtk_vcodec_drv.h | 3 -- .../platform/mtk-vcodec/mtk_vcodec_enc.c | 1 - .../platform/mtk-vcodec/mtk_vcodec_enc_pm.c | 44 +++---------------- 4 files changed, 10 insertions(+), 75 deletions(-) diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c b/driver= s/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c index 6038db96f71c..d0bf9aa3b29d 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c @@ -8,14 +8,12 @@ #include #include #include -#include =20 #include "mtk_vcodec_dec_pm.h" #include "mtk_vcodec_util.h" =20 int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkdev) { - struct device_node *node; struct platform_device *pdev; struct mtk_vcodec_pm *pm; struct mtk_vcodec_clk *dec_clk; @@ -26,18 +24,7 @@ int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkdev) pm =3D &mtkdev->pm; pm->mtkdev =3D mtkdev; dec_clk =3D &pm->vdec_clk; - node =3D of_parse_phandle(pdev->dev.of_node, "mediatek,larb", 0); - if (!node) { - mtk_v4l2_err("of_parse_phandle mediatek,larb fail!"); - return -1; - } =20 - pdev =3D of_find_device_by_node(node); - of_node_put(node); - if (WARN_ON(!pdev)) { - return -1; - } - pm->larbvdec =3D &pdev->dev; pdev =3D mtkdev->plat_dev; pm->dev =3D &pdev->dev; =20 @@ -47,14 +34,11 @@ int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkde= v) dec_clk->clk_info =3D devm_kcalloc(&pdev->dev, dec_clk->clk_num, sizeof(*clk_info), GFP_KERNEL); - if (!dec_clk->clk_info) { - ret =3D -ENOMEM; - goto put_device; - } + if (!dec_clk->clk_info) + return -ENOMEM; } else { mtk_v4l2_err("Failed to get vdec clock count"); - ret =3D -EINVAL; - goto put_device; + return -EINVAL; } =20 for (i =3D 0; i < dec_clk->clk_num; i++) { @@ -63,29 +47,24 @@ int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkde= v) "clock-names", i, &clk_info->clk_name); if (ret) { mtk_v4l2_err("Failed to get clock name id =3D %d", i); - goto put_device; + return ret; } clk_info->vcodec_clk =3D devm_clk_get(&pdev->dev, clk_info->clk_name); if (IS_ERR(clk_info->vcodec_clk)) { mtk_v4l2_err("devm_clk_get (%d)%s fail", i, clk_info->clk_name); - ret =3D PTR_ERR(clk_info->vcodec_clk); - goto put_device; + return PTR_ERR(clk_info->vcodec_clk); } } =20 pm_runtime_enable(&pdev->dev); return 0; -put_device: - put_device(pm->larbvdec); - return ret; } =20 void mtk_vcodec_release_dec_pm(struct mtk_vcodec_dev *dev) { pm_runtime_disable(dev->pm.dev); - put_device(dev->pm.larbvdec); } =20 int mtk_vcodec_dec_pw_on(struct mtk_vcodec_pm *pm) @@ -122,11 +101,6 @@ void mtk_vcodec_dec_clock_on(struct mtk_vcodec_pm *pm) } } =20 - ret =3D mtk_smi_larb_get(pm->larbvdec); - if (ret) { - mtk_v4l2_err("mtk_smi_larb_get larbvdec fail %d", ret); - goto error; - } return; =20 error: @@ -139,7 +113,6 @@ void mtk_vcodec_dec_clock_off(struct mtk_vcodec_pm *pm) struct mtk_vcodec_clk *dec_clk =3D &pm->vdec_clk; int i =3D 0; =20 - mtk_smi_larb_put(pm->larbvdec); for (i =3D dec_clk->clk_num - 1; i >=3D 0; i--) clk_disable_unprepare(dec_clk->clk_info[i].vcodec_clk); } diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h b/drivers/m= edia/platform/mtk-vcodec/mtk_vcodec_drv.h index c6c7672fecfb..64b73dd880ce 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h @@ -189,10 +189,7 @@ struct mtk_vcodec_clk { */ struct mtk_vcodec_pm { struct mtk_vcodec_clk vdec_clk; - struct device *larbvdec; - struct mtk_vcodec_clk venc_clk; - struct device *larbvenc; struct device *dev; struct mtk_vcodec_dev *mtkdev; }; diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c b/drivers/m= edia/platform/mtk-vcodec/mtk_vcodec_enc.c index 416f356af363..9a1515cf862d 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c @@ -8,7 +8,6 @@ #include #include #include -#include #include =20 #include "mtk_vcodec_drv.h" diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c b/driver= s/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c index 1b2e4930ed27..dffb190267ed 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c @@ -8,58 +8,36 @@ #include #include #include -#include =20 #include "mtk_vcodec_enc_pm.h" #include "mtk_vcodec_util.h" =20 int mtk_vcodec_init_enc_pm(struct mtk_vcodec_dev *mtkdev) { - struct device_node *node; struct platform_device *pdev; struct mtk_vcodec_pm *pm; struct mtk_vcodec_clk *enc_clk; struct mtk_vcodec_clk_info *clk_info; int ret =3D 0, i =3D 0; - struct device *dev; =20 pdev =3D mtkdev->plat_dev; pm =3D &mtkdev->pm; memset(pm, 0, sizeof(struct mtk_vcodec_pm)); pm->mtkdev =3D mtkdev; pm->dev =3D &pdev->dev; - dev =3D &pdev->dev; enc_clk =3D &pm->venc_clk; =20 - node =3D of_parse_phandle(dev->of_node, "mediatek,larb", 0); - if (!node) { - mtk_v4l2_err("no mediatek,larb found"); - return -ENODEV; - } - pdev =3D of_find_device_by_node(node); - of_node_put(node); - if (!pdev) { - mtk_v4l2_err("no mediatek,larb device found"); - return -ENODEV; - } - pm->larbvenc =3D &pdev->dev; - pdev =3D mtkdev->plat_dev; - pm->dev =3D &pdev->dev; - enc_clk->clk_num =3D of_property_count_strings(pdev->dev.of_node, "clock-names"); if (enc_clk->clk_num > 0) { enc_clk->clk_info =3D devm_kcalloc(&pdev->dev, enc_clk->clk_num, sizeof(*clk_info), GFP_KERNEL); - if (!enc_clk->clk_info) { - ret =3D -ENOMEM; - goto put_larbvenc; - } + if (!enc_clk->clk_info) + return -ENOMEM; } else { mtk_v4l2_err("Failed to get venc clock count"); - ret =3D -EINVAL; - goto put_larbvenc; + return -EINVAL; } =20 for (i =3D 0; i < enc_clk->clk_num; i++) { @@ -68,29 +46,23 @@ int mtk_vcodec_init_enc_pm(struct mtk_vcodec_dev *mtkde= v) "clock-names", i, &clk_info->clk_name); if (ret) { mtk_v4l2_err("venc failed to get clk name %d", i); - goto put_larbvenc; + return ret; } clk_info->vcodec_clk =3D devm_clk_get(&pdev->dev, clk_info->clk_name); if (IS_ERR(clk_info->vcodec_clk)) { mtk_v4l2_err("venc devm_clk_get (%d)%s fail", i, clk_info->clk_name); - ret =3D PTR_ERR(clk_info->vcodec_clk); - goto put_larbvenc; + return PTR_ERR(clk_info->vcodec_clk); } } =20 return 0; - -put_larbvenc: - put_device(pm->larbvenc); - return ret; } =20 void mtk_vcodec_release_enc_pm(struct mtk_vcodec_dev *mtkdev) { pm_runtime_disable(mtkdev->pm.dev); - put_device(mtkdev->pm.larbvenc); } =20 =20 @@ -108,11 +80,6 @@ void mtk_vcodec_enc_clock_on(struct mtk_vcodec_pm *pm) } } =20 - ret =3D mtk_smi_larb_get(pm->larbvenc); - if (ret) { - mtk_v4l2_err("mtk_smi_larb_get larb3 fail %d", ret); - goto clkerr; - } return; =20 clkerr: @@ -125,7 +92,6 @@ void mtk_vcodec_enc_clock_off(struct mtk_vcodec_pm *pm) struct mtk_vcodec_clk *enc_clk =3D &pm->venc_clk; int i =3D 0; =20 - mtk_smi_larb_put(pm->larbvenc); for (i =3D enc_clk->clk_num - 1; i >=3D 0; i--) clk_disable_unprepare(enc_clk->clk_info[i].vcodec_clk); } --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27383C4332F for ; Fri, 12 Nov 2021 10:57:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0B08161029 for ; Fri, 12 Nov 2021 10:57:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234696AbhKLLA3 (ORCPT ); Fri, 12 Nov 2021 06:00:29 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:59574 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234972AbhKLLAX (ORCPT ); Fri, 12 Nov 2021 06:00:23 -0500 X-UUID: 81ea7ac7c26c486699333047154d9a80-20211112 X-UUID: 81ea7ac7c26c486699333047154d9a80-20211112 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 220019247; Fri, 12 Nov 2021 18:57:29 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 12 Nov 2021 18:57:27 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:57:25 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , , Yunfei Dong Subject: [PATCH v9 11/15] media: mtk-vcodec: dec: Remove mtk_vcodec_release_dec_pm Date: Fri, 12 Nov 2021 18:55:05 +0800 Message-ID: <20211112105509.12010-12-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After this patchset, mtk_vcodec_release_dec_pm has only one line. then remove that function. Use pm_runtime_disable directly instead. For symmetry, move the pm_runtime_enable out from mtk_vcodec_init_dec_pm, then mtk_vcodec_init_dec_pm only operate for the clocks, rename it from the _pm to _clk. No functional change. CC: Tiffany Lin CC: Yunfei Dong Signed-off-by: Yong Wu --- drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 8 +++++--- drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c | 9 +-------- drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.h | 3 +-- 3 files changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c b/drive= rs/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c index f87dc47d9e63..830c400b9830 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -240,12 +241,13 @@ static int mtk_vcodec_probe(struct platform_device *p= dev) if (IS_ERR(dev->fw_handler)) return PTR_ERR(dev->fw_handler); =20 - ret =3D mtk_vcodec_init_dec_pm(dev); + ret =3D mtk_vcodec_init_dec_clk(dev); if (ret < 0) { dev_err(&pdev->dev, "Failed to get mt vcodec clock source"); goto err_dec_pm; } =20 + pm_runtime_enable(&pdev->dev); for (i =3D 0; i < NUM_MAX_VDEC_REG_BASE; i++) { dev->reg_base[i] =3D devm_platform_ioremap_resource(pdev, i); if (IS_ERR((__force void *)dev->reg_base[i])) { @@ -345,7 +347,7 @@ static int mtk_vcodec_probe(struct platform_device *pde= v) err_dec_alloc: v4l2_device_unregister(&dev->v4l2_dev); err_res: - mtk_vcodec_release_dec_pm(dev); + pm_runtime_disable(&pdev->dev); err_dec_pm: mtk_vcodec_fw_release(dev->fw_handler); return ret; @@ -371,7 +373,7 @@ static int mtk_vcodec_dec_remove(struct platform_device= *pdev) video_unregister_device(dev->vfd_dec); =20 v4l2_device_unregister(&dev->v4l2_dev); - mtk_vcodec_release_dec_pm(dev); + pm_runtime_disable(&pdev->dev); mtk_vcodec_fw_release(dev->fw_handler); return 0; } diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c b/driver= s/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c index d0bf9aa3b29d..3df87944e9a2 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.c @@ -12,7 +12,7 @@ #include "mtk_vcodec_dec_pm.h" #include "mtk_vcodec_util.h" =20 -int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkdev) +int mtk_vcodec_init_dec_clk(struct mtk_vcodec_dev *mtkdev) { struct platform_device *pdev; struct mtk_vcodec_pm *pm; @@ -57,16 +57,9 @@ int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *mtkdev) return PTR_ERR(clk_info->vcodec_clk); } } - - pm_runtime_enable(&pdev->dev); return 0; } =20 -void mtk_vcodec_release_dec_pm(struct mtk_vcodec_dev *dev) -{ - pm_runtime_disable(dev->pm.dev); -} - int mtk_vcodec_dec_pw_on(struct mtk_vcodec_pm *pm) { int ret; diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.h b/driver= s/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.h index 280aeaefdb65..dace91401e23 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.h +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_pm.h @@ -9,8 +9,7 @@ =20 #include "mtk_vcodec_drv.h" =20 -int mtk_vcodec_init_dec_pm(struct mtk_vcodec_dev *dev); -void mtk_vcodec_release_dec_pm(struct mtk_vcodec_dev *dev); +int mtk_vcodec_init_dec_clk(struct mtk_vcodec_dev *dev); =20 int mtk_vcodec_dec_pw_on(struct mtk_vcodec_pm *pm); void mtk_vcodec_dec_pw_off(struct mtk_vcodec_pm *pm); --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21852C433F5 for ; Fri, 12 Nov 2021 10:57:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0358E60EE9 for ; Fri, 12 Nov 2021 10:57:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234967AbhKLLAc (ORCPT ); Fri, 12 Nov 2021 06:00:32 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:43434 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234976AbhKLLA2 (ORCPT ); Fri, 12 Nov 2021 06:00:28 -0500 X-UUID: b434ee8e66254c37ab2b8453f850eb7e-20211112 X-UUID: b434ee8e66254c37ab2b8453f850eb7e-20211112 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1789283529; Fri, 12 Nov 2021 18:57:36 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 12 Nov 2021 18:57:34 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:57:32 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , , Irui Wang Subject: [PATCH v9 12/15] media: mtk-vcodec: enc: Remove mtk_vcodec_release_enc_pm Date: Fri, 12 Nov 2021 18:55:06 +0800 Message-ID: <20211112105509.12010-13-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After this patchset, mtk_vcodec_release_enc_pm has only one line. then remove that function, use pm_runtime_disable instead. meanwhile, mtk_vcodec_init_enc_pm only operate for the clocks, rename it from the _pm to _clk. No functional change. CC: Tiffany Lin CC: Irui Wang Signed-off-by: Yong Wu --- drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c | 6 +++--- drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c | 8 +------- drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.h | 3 +-- 3 files changed, 5 insertions(+), 12 deletions(-) diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c b/drive= rs/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c index 45d1870c83dd..136798051f21 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c @@ -272,7 +272,7 @@ static int mtk_vcodec_probe(struct platform_device *pde= v) return PTR_ERR(dev->fw_handler); =20 dev->venc_pdata =3D of_device_get_match_data(&pdev->dev); - ret =3D mtk_vcodec_init_enc_pm(dev); + ret =3D mtk_vcodec_init_enc_clk(dev); if (ret < 0) { dev_err(&pdev->dev, "Failed to get mtk vcodec clock source!"); goto err_enc_pm; @@ -384,7 +384,7 @@ static int mtk_vcodec_probe(struct platform_device *pde= v) err_enc_alloc: v4l2_device_unregister(&dev->v4l2_dev); err_res: - mtk_vcodec_release_enc_pm(dev); + pm_runtime_disable(&pdev->dev); err_enc_pm: mtk_vcodec_fw_release(dev->fw_handler); return ret; @@ -463,7 +463,7 @@ static int mtk_vcodec_enc_remove(struct platform_device= *pdev) video_unregister_device(dev->vfd_enc); =20 v4l2_device_unregister(&dev->v4l2_dev); - mtk_vcodec_release_enc_pm(dev); + pm_runtime_disable(&pdev->dev); mtk_vcodec_fw_release(dev->fw_handler); return 0; } diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c b/driver= s/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c index dffb190267ed..12637908e5f6 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c @@ -12,7 +12,7 @@ #include "mtk_vcodec_enc_pm.h" #include "mtk_vcodec_util.h" =20 -int mtk_vcodec_init_enc_pm(struct mtk_vcodec_dev *mtkdev) +int mtk_vcodec_init_enc_clk(struct mtk_vcodec_dev *mtkdev) { struct platform_device *pdev; struct mtk_vcodec_pm *pm; @@ -60,12 +60,6 @@ int mtk_vcodec_init_enc_pm(struct mtk_vcodec_dev *mtkdev) return 0; } =20 -void mtk_vcodec_release_enc_pm(struct mtk_vcodec_dev *mtkdev) -{ - pm_runtime_disable(mtkdev->pm.dev); -} - - void mtk_vcodec_enc_clock_on(struct mtk_vcodec_pm *pm) { struct mtk_vcodec_clk *enc_clk =3D &pm->venc_clk; diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.h b/driver= s/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.h index b7ecdfd74823..bc455cefc0cd 100644 --- a/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.h +++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.h @@ -9,8 +9,7 @@ =20 #include "mtk_vcodec_drv.h" =20 -int mtk_vcodec_init_enc_pm(struct mtk_vcodec_dev *dev); -void mtk_vcodec_release_enc_pm(struct mtk_vcodec_dev *dev); +int mtk_vcodec_init_enc_clk(struct mtk_vcodec_dev *dev); =20 void mtk_vcodec_enc_clock_on(struct mtk_vcodec_pm *pm); void mtk_vcodec_enc_clock_off(struct mtk_vcodec_pm *pm); --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B30FC4332F for ; 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Fri, 12 Nov 2021 18:57:40 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:57:38 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , Subject: [PATCH v9 13/15] memory: mtk-smi: Get rid of mtk_smi_larb_get/put Date: Fri, 12 Nov 2021 18:55:07 +0800 Message-ID: <20211112105509.12010-14-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After adding device_link between the iommu consumer and smi-larb, the pm_runtime_get(_sync) of smi-larb and smi-common will be called automatically. we can get rid of mtk_smi_larb_get/put. CC: Matthias Brugger Signed-off-by: Yong Wu Reviewed-by: Evan Green Acked-by: Krzysztof Kozlowski Acked-by: Matthias Brugger Reviewed-by: Dafna Hirschfeld Tested-by: Frank Wunderlich # BPI-R2/MT7623 --- drivers/memory/mtk-smi.c | 14 -------------- include/soc/mediatek/smi.h | 20 -------------------- 2 files changed, 34 deletions(-) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index c5fb51f73b34..7c61c924e220 100644 --- a/drivers/memory/mtk-smi.c +++ b/drivers/memory/mtk-smi.c @@ -134,20 +134,6 @@ static void mtk_smi_clk_disable(const struct mtk_smi *= smi) clk_disable_unprepare(smi->clk_apb); } =20 -int mtk_smi_larb_get(struct device *larbdev) -{ - int ret =3D pm_runtime_resume_and_get(larbdev); - - return (ret < 0) ? ret : 0; -} -EXPORT_SYMBOL_GPL(mtk_smi_larb_get); - -void mtk_smi_larb_put(struct device *larbdev) -{ - pm_runtime_put_sync(larbdev); -} -EXPORT_SYMBOL_GPL(mtk_smi_larb_put); - static int mtk_smi_larb_bind(struct device *dev, struct device *master, void *data) { diff --git a/include/soc/mediatek/smi.h b/include/soc/mediatek/smi.h index 15e3397cec58..11f7d6b59642 100644 --- a/include/soc/mediatek/smi.h +++ b/include/soc/mediatek/smi.h @@ -19,26 +19,6 @@ struct mtk_smi_larb_iommu { unsigned char bank[32]; }; =20 -/* - * mtk_smi_larb_get: Enable the power domain and clocks for this local arb= iter. - * It also initialize some basic setting(like iommu). - * mtk_smi_larb_put: Disable the power domain and clocks for this local ar= biter. - * Both should be called in non-atomic context. - * - * Returns 0 if successful, negative on failure. - */ -int mtk_smi_larb_get(struct device *larbdev); -void mtk_smi_larb_put(struct device *larbdev); - -#else - -static inline int mtk_smi_larb_get(struct device *larbdev) -{ - return 0; -} - -static inline void mtk_smi_larb_put(struct device *larbdev) { } - #endif =20 #endif --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CA41C433EF for ; Fri, 12 Nov 2021 10:57:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 38F7460EE9 for ; Fri, 12 Nov 2021 10:57:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234995AbhKLLAn (ORCPT ); Fri, 12 Nov 2021 06:00:43 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:43698 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234999AbhKLLAk (ORCPT ); Fri, 12 Nov 2021 06:00:40 -0500 X-UUID: ef0d2afa41874969bde11ddf457a4fb9-20211112 X-UUID: ef0d2afa41874969bde11ddf457a4fb9-20211112 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1658034167; Fri, 12 Nov 2021 18:57:47 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 12 Nov 2021 18:57:46 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:57:44 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , Subject: [PATCH v9 14/15] arm: dts: mediatek: Get rid of mediatek,larb for MM nodes Date: Fri, 12 Nov 2021 18:55:08 +0800 Message-ID: <20211112105509.12010-15-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After adding device_link between the IOMMU consumer and smi, the mediatek,larb is unnecessary now. CC: Matthias Brugger Signed-off-by: Yong Wu Reviewed-by: Evan Green Tested-by: Frank Wunderlich # BPI-R2/MT7623 --- arch/arm/boot/dts/mt2701.dtsi | 2 -- arch/arm/boot/dts/mt7623n.dtsi | 5 ----- 2 files changed, 7 deletions(-) diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 4776f85d6d5b..ef583cfd3baf 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -564,7 +564,6 @@ clock-names =3D "jpgdec-smi", "jpgdec"; power-domains =3D <&scpsys MT2701_POWER_DOMAIN_ISP>; - mediatek,larb =3D <&larb2>; iommus =3D <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; }; @@ -577,7 +576,6 @@ clocks =3D <&imgsys CLK_IMG_VENC>; clock-names =3D "jpgenc"; power-domains =3D <&scpsys MT2701_POWER_DOMAIN_ISP>; - mediatek,larb =3D <&larb2>; iommus =3D <&iommu MT2701_M4U_PORT_JPGENC_RDMA>, <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>; }; diff --git a/arch/arm/boot/dts/mt7623n.dtsi b/arch/arm/boot/dts/mt7623n.dtsi index bcb0846e29fd..3adab5cd1fef 100644 --- a/arch/arm/boot/dts/mt7623n.dtsi +++ b/arch/arm/boot/dts/mt7623n.dtsi @@ -121,7 +121,6 @@ clock-names =3D "jpgdec-smi", "jpgdec"; power-domains =3D <&scpsys MT2701_POWER_DOMAIN_ISP>; - mediatek,larb =3D <&larb2>; iommus =3D <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>, <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>; }; @@ -144,7 +143,6 @@ interrupts =3D ; clocks =3D <&mmsys CLK_MM_DISP_OVL>; iommus =3D <&iommu MT2701_M4U_PORT_DISP_OVL_0>; - mediatek,larb =3D <&larb0>; }; =20 rdma0: rdma@14008000 { @@ -154,7 +152,6 @@ interrupts =3D ; clocks =3D <&mmsys CLK_MM_DISP_RDMA>; iommus =3D <&iommu MT2701_M4U_PORT_DISP_RDMA>; - mediatek,larb =3D <&larb0>; }; =20 wdma@14009000 { @@ -164,7 +161,6 @@ interrupts =3D ; clocks =3D <&mmsys CLK_MM_DISP_WDMA>; iommus =3D <&iommu MT2701_M4U_PORT_DISP_WDMA>; - mediatek,larb =3D <&larb0>; }; =20 bls: pwm@1400a000 { @@ -215,7 +211,6 @@ interrupts =3D ; clocks =3D <&mmsys CLK_MM_DISP_RDMA1>; iommus =3D <&iommu MT2701_M4U_PORT_DISP_RDMA1>; - mediatek,larb =3D <&larb0>; }; =20 dpi0: dpi@14014000 { --=20 2.18.0 From nobody Sun Sep 22 13:33:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49CE4C43217 for ; Fri, 12 Nov 2021 10:58:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 39FA260F90 for ; Fri, 12 Nov 2021 10:58:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235005AbhKLLAz (ORCPT ); Fri, 12 Nov 2021 06:00:55 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:44056 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234793AbhKLLAx (ORCPT ); Fri, 12 Nov 2021 06:00:53 -0500 X-UUID: 95b039a4c3644c9fb209da98e0765dc9-20211112 X-UUID: 95b039a4c3644c9fb209da98e0765dc9-20211112 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 713121679; Fri, 12 Nov 2021 18:57:59 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 12 Nov 2021 18:57:58 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 12 Nov 2021 18:57:56 +0800 From: Yong Wu To: Matthias Brugger , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , David Airlie , "Mauro Carvalho Chehab" CC: Evan Green , Robin Murphy , Tomasz Figa , Will Deacon , , , , , , , , , Matthias Kaehlcke , , , , , , Daniel Vetter , Chun-Kuang Hu , Philipp Zabel , Tiffany Lin , "Dafna Hirschfeld" , Hsin-Yi Wang , Eizan Miyamoto , , Frank Wunderlich , , , Subject: [PATCH v9 15/15] arm64: dts: mediatek: Get rid of mediatek,larb for MM nodes Date: Fri, 12 Nov 2021 18:55:09 +0800 Message-ID: <20211112105509.12010-16-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211112105509.12010-1-yong.wu@mediatek.com> References: <20211112105509.12010-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After adding device_link between the IOMMU consumer and smi, the mediatek,larb is unnecessary now. CC: Matthias Brugger Signed-off-by: Yong Wu Reviewed-by: Evan Green --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16 ---------------- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 6 ------ 2 files changed, 22 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts= /mediatek/mt8173.dtsi index d9e005ae5bb0..205c221696a6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -1009,7 +1009,6 @@ <&mmsys CLK_MM_MUTEX_32K>; power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; iommus =3D <&iommu M4U_PORT_MDP_RDMA0>; - mediatek,larb =3D <&larb0>; mediatek,vpu =3D <&vpu>; }; =20 @@ -1020,7 +1019,6 @@ <&mmsys CLK_MM_MUTEX_32K>; power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; iommus =3D <&iommu M4U_PORT_MDP_RDMA1>; - mediatek,larb =3D <&larb4>; }; =20 mdp_rsz0: rsz@14003000 { @@ -1050,7 +1048,6 @@ clocks =3D <&mmsys CLK_MM_MDP_WDMA>; power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; iommus =3D <&iommu M4U_PORT_MDP_WDMA>; - mediatek,larb =3D <&larb0>; }; =20 mdp_wrot0: wrot@14007000 { @@ -1059,7 +1056,6 @@ clocks =3D <&mmsys CLK_MM_MDP_WROT0>; power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; iommus =3D <&iommu M4U_PORT_MDP_WROT0>; - mediatek,larb =3D <&larb0>; }; =20 mdp_wrot1: wrot@14008000 { @@ -1068,7 +1064,6 @@ clocks =3D <&mmsys CLK_MM_MDP_WROT1>; power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; iommus =3D <&iommu M4U_PORT_MDP_WROT1>; - mediatek,larb =3D <&larb4>; }; =20 ovl0: ovl@1400c000 { @@ -1078,7 +1073,6 @@ power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_OVL0>; iommus =3D <&iommu M4U_PORT_DISP_OVL0>; - mediatek,larb =3D <&larb0>; mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0xc000 0x1000>; }; =20 @@ -1089,7 +1083,6 @@ power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_OVL1>; iommus =3D <&iommu M4U_PORT_DISP_OVL1>; - mediatek,larb =3D <&larb4>; mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0xd000 0x1000>; }; =20 @@ -1100,7 +1093,6 @@ power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_RDMA0>; iommus =3D <&iommu M4U_PORT_DISP_RDMA0>; - mediatek,larb =3D <&larb0>; mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0xe000 0x1000>; }; =20 @@ -1111,7 +1103,6 @@ power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_RDMA1>; iommus =3D <&iommu M4U_PORT_DISP_RDMA1>; - mediatek,larb =3D <&larb4>; mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0xf000 0x1000>; }; =20 @@ -1122,7 +1113,6 @@ power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_RDMA2>; iommus =3D <&iommu M4U_PORT_DISP_RDMA2>; - mediatek,larb =3D <&larb4>; mediatek,gce-client-reg =3D <&gce SUBSYS_1401XXXX 0 0x1000>; }; =20 @@ -1133,7 +1123,6 @@ power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_WDMA0>; iommus =3D <&iommu M4U_PORT_DISP_WDMA0>; - mediatek,larb =3D <&larb0>; mediatek,gce-client-reg =3D <&gce SUBSYS_1401XXXX 0x1000 0x1000>; }; =20 @@ -1144,7 +1133,6 @@ power-domains =3D <&spm MT8173_POWER_DOMAIN_MM>; clocks =3D <&mmsys CLK_MM_DISP_WDMA1>; iommus =3D <&iommu M4U_PORT_DISP_WDMA1>; - mediatek,larb =3D <&larb4>; mediatek,gce-client-reg =3D <&gce SUBSYS_1401XXXX 0x2000 0x1000>; }; =20 @@ -1395,7 +1383,6 @@ <0 0x16027800 0 0x800>, /* VDEC_HWB */ <0 0x16028400 0 0x400>; /* VDEC_HWG */ interrupts =3D ; - mediatek,larb =3D <&larb1>; iommus =3D <&iommu M4U_PORT_HW_VDEC_MC_EXT>, <&iommu M4U_PORT_HW_VDEC_PP_EXT>, <&iommu M4U_PORT_HW_VDEC_AVC_MV_EXT>, @@ -1463,7 +1450,6 @@ compatible =3D "mediatek,mt8173-vcodec-enc"; reg =3D <0 0x18002000 0 0x1000>; /* VENC_SYS */ interrupts =3D ; - mediatek,larb =3D <&larb3>; iommus =3D <&iommu M4U_PORT_VENC_RCPU>, <&iommu M4U_PORT_VENC_REC>, <&iommu M4U_PORT_VENC_BSDMA>, @@ -1491,7 +1477,6 @@ clock-names =3D "jpgdec-smi", "jpgdec"; power-domains =3D <&spm MT8173_POWER_DOMAIN_VENC>; - mediatek,larb =3D <&larb3>; iommus =3D <&iommu M4U_PORT_JPGDEC_WDMA>, <&iommu M4U_PORT_JPGDEC_BSDMA>; }; @@ -1525,7 +1510,6 @@ <&iommu M4U_PORT_VENC_CUR_CHROMA_SET2>, <&iommu M4U_PORT_VENC_REF_LUMA_SET2>, <&iommu M4U_PORT_VENC_REC_CHROMA_SET2>; - mediatek,larb =3D <&larb5>; mediatek,vpu =3D <&vpu>; clocks =3D <&topckgen CLK_TOP_VENC_LT_SEL>; clock-names =3D "venc_lt_sel"; diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts= /mediatek/mt8183.dtsi index bead8e486239..d214ff0f4f59 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1239,7 +1239,6 @@ power-domains =3D <&spm MT8183_POWER_DOMAIN_DISP>; clocks =3D <&mmsys CLK_MM_DISP_OVL0>; iommus =3D <&iommu M4U_PORT_DISP_OVL0>; - mediatek,larb =3D <&larb0>; mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0x8000 0x1000>; }; =20 @@ -1250,7 +1249,6 @@ power-domains =3D <&spm MT8183_POWER_DOMAIN_DISP>; clocks =3D <&mmsys CLK_MM_DISP_OVL0_2L>; iommus =3D <&iommu M4U_PORT_DISP_2L_OVL0_LARB0>; - mediatek,larb =3D <&larb0>; mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0x9000 0x1000>; }; =20 @@ -1261,7 +1259,6 @@ power-domains =3D <&spm MT8183_POWER_DOMAIN_DISP>; clocks =3D <&mmsys CLK_MM_DISP_OVL1_2L>; iommus =3D <&iommu M4U_PORT_DISP_2L_OVL1_LARB0>; - mediatek,larb =3D <&larb0>; mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0xa000 0x1000>; }; =20 @@ -1272,7 +1269,6 @@ power-domains =3D <&spm MT8183_POWER_DOMAIN_DISP>; clocks =3D <&mmsys CLK_MM_DISP_RDMA0>; iommus =3D <&iommu M4U_PORT_DISP_RDMA0>; - mediatek,larb =3D <&larb0>; mediatek,rdma-fifo-size =3D <5120>; mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0xb000 0x1000>; }; @@ -1284,7 +1280,6 @@ power-domains =3D <&spm MT8183_POWER_DOMAIN_DISP>; clocks =3D <&mmsys CLK_MM_DISP_RDMA1>; iommus =3D <&iommu M4U_PORT_DISP_RDMA1>; - mediatek,larb =3D <&larb0>; mediatek,rdma-fifo-size =3D <2048>; mediatek,gce-client-reg =3D <&gce SUBSYS_1400XXXX 0xc000 0x1000>; }; @@ -1441,7 +1436,6 @@ compatible =3D "mediatek,mt8183-jpgenc", "mediatek,mtk-jpgenc"; reg =3D <0 0x17030000 0 0x1000>; interrupts =3D ; - mediatek,larb =3D <&larb4>; iommus =3D <&iommu M4U_PORT_JPGENC_RDMA>, <&iommu M4U_PORT_JPGENC_BSDMA>; power-domains =3D <&spm MT8183_POWER_DOMAIN_VENC>; --=20 2.18.0