From nobody Sun Apr 19 02:16:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58DC0C433EF for ; Thu, 7 Jul 2022 08:06:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235215AbiGGIGu (ORCPT ); Thu, 7 Jul 2022 04:06:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52274 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234779AbiGGIGs (ORCPT ); Thu, 7 Jul 2022 04:06:48 -0400 Received: from pegase2.c-s.fr (pegase2.c-s.fr [93.17.235.10]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0DAFB33E12 for ; Thu, 7 Jul 2022 01:06:45 -0700 (PDT) Received: from localhost (mailhub3.si.c-s.fr [172.26.127.67]) by localhost (Postfix) with ESMTP id 4LdpsH64xtz9tCS; Thu, 7 Jul 2022 10:06:43 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from pegase2.c-s.fr ([172.26.127.65]) by localhost (pegase2.c-s.fr [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5Li-Xwk3QDtB; Thu, 7 Jul 2022 10:06:43 +0200 (CEST) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase2.c-s.fr (Postfix) with ESMTP id 4LdpsH5Gkpz9tCP; Thu, 7 Jul 2022 10:06:43 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id A3CFE8B79F; Thu, 7 Jul 2022 10:06:43 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id m_jbEc0-QBnx; Thu, 7 Jul 2022 10:06:43 +0200 (CEST) Received: from PO20335.IDSI0.si.c-s.fr (po20309.idsi0.si.c-s.fr [192.168.233.123]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 5E8528B768; Thu, 7 Jul 2022 10:06:43 +0200 (CEST) Received: from PO20335.IDSI0.si.c-s.fr (localhost [127.0.0.1]) by PO20335.IDSI0.si.c-s.fr (8.17.1/8.16.1) with ESMTPS id 26786Th0478042 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Thu, 7 Jul 2022 10:06:29 +0200 Received: (from chleroy@localhost) by PO20335.IDSI0.si.c-s.fr (8.17.1/8.17.1/Submit) id 26786RM0478030; Thu, 7 Jul 2022 10:06:27 +0200 X-Authentication-Warning: PO20335.IDSI0.si.c-s.fr: chleroy set sender to christophe.leroy@csgroup.eu using -f From: Christophe Leroy To: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman Cc: Christophe Leroy , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2] powerpc/code-patching: Speed up page mapping/unmapping on PPC32 Date: Thu, 7 Jul 2022 10:06:18 +0200 Message-Id: <1feabfad5952631acc033d671fad722706c4dd59.1657181170.git.christophe.leroy@csgroup.eu> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1657181176; l=3182; s=20211009; h=from:subject:message-id; bh=qwhrSHeqOdSBuhjAZ7n0ZaDDCNODjbH+IoPBYXh8TLE=; b=Eu+muKObPx2nnetst4eRQIP8D4t+eSz6fBgEcqfF5o0mUE1vt7zXPiTNXqKOa1Z/wr6+ErHJsz1H X4OFI5j7BJVzJ1P6BhJ4/vSElRORJQwxcEh1webfYjxJFl93mA/K X-Developer-Key: i=christophe.leroy@csgroup.eu; a=ed25519; pk=HIzTzUj91asvincQGOFx6+ZF5AoUuP9GdOtQChs7Mm0= Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Since commit 591b4b268435 ("powerpc/code-patching: Pre-map patch area") the patch area is premapped so intermediate page tables are already allocated. Use __set_pte_at() directly instead of the heavy map_kernel_page(), at for unmapping just do a pte_clear() followed by a flush. __set_pte_at() can be used directly without the filters in set_pte_at() because we are mapping a normal page non executable. Make sure gcc knows text_poke_area is page aligned in order to optimise the flush. This change reduces by 66% the time needed to activate ftrace on an 8xx (588000 tb ticks instead of 1744000). Don't perform the change on PPC64 for now, as it is problematic for the time being. Signed-off-by: Christophe Leroy --- v2: Only do it on PPC32 for now, mpe reported a problem on PPC64, see https= ://lore.kernel.org/lkml/165261053687.1047019.4165741740473209888.b4-ty@elle= rman.id.au/T/#m9d91e820c43ebe56a72ad89403dac9eb270f5bb6 --- arch/powerpc/lib/code-patching.c | 37 ++++++++++++++++++++++---------- 1 file changed, 26 insertions(+), 11 deletions(-) diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patch= ing.c index 6edf0697a526..01b9f5dc79d6 100644 --- a/arch/powerpc/lib/code-patching.c +++ b/arch/powerpc/lib/code-patching.c @@ -94,17 +94,20 @@ void __init poking_init(void) static_branch_enable(&poking_init_done); } =20 +static unsigned long get_patch_pfn(void *addr) +{ + if (IS_ENABLED(CONFIG_MODULES) && is_vmalloc_or_module_addr(addr)) + return vmalloc_to_pfn(addr); + else + return __pa_symbol(addr) >> PAGE_SHIFT; +} + /* * This can be called for kernel text or a module. */ static int map_patch_area(void *addr, unsigned long text_poke_addr) { - unsigned long pfn; - - if (IS_ENABLED(CONFIG_MODULES) && is_vmalloc_or_module_addr(addr)) - pfn =3D vmalloc_to_pfn(addr); - else - pfn =3D __pa_symbol(addr) >> PAGE_SHIFT; + unsigned long pfn =3D get_patch_pfn(addr); =20 return map_kernel_page(text_poke_addr, (pfn << PAGE_SHIFT), PAGE_KERNEL); } @@ -149,17 +152,29 @@ static int __do_patch_instruction(u32 *addr, ppc_inst= _t instr) int err; u32 *patch_addr; unsigned long text_poke_addr; + pte_t *pte; + unsigned long pfn =3D get_patch_pfn(addr); =20 - text_poke_addr =3D (unsigned long)__this_cpu_read(text_poke_area)->addr; + text_poke_addr =3D (unsigned long)__this_cpu_read(text_poke_area)->addr &= PAGE_MASK; patch_addr =3D (u32 *)(text_poke_addr + offset_in_page(addr)); =20 - err =3D map_patch_area(addr, text_poke_addr); - if (err) - return err; + if (IS_ENABLED(CONFIG_PPC32)) { + pte =3D virt_to_kpte(text_poke_addr); + __set_pte_at(&init_mm, text_poke_addr, pte, pfn_pte(pfn, PAGE_KERNEL), 0= ); + } else { + err =3D map_patch_area(addr, text_poke_addr); + if (err) + return err; + } =20 err =3D __patch_instruction(addr, instr, patch_addr); =20 - unmap_patch_area(text_poke_addr); + if (IS_ENABLED(CONFIG_PPC32)) { + pte_clear(&init_mm, text_poke_addr, pte); + flush_tlb_kernel_range(text_poke_addr, text_poke_addr + PAGE_SIZE); + } else { + unmap_patch_area(text_poke_addr); + } =20 return err; } --=20 2.36.1