From nobody Sun Jun 21 10:14:44 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1A5CC433EF for ; Tue, 29 Mar 2022 13:10:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237159AbiC2NMA (ORCPT ); Tue, 29 Mar 2022 09:12:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35128 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235616AbiC2NL5 (ORCPT ); Tue, 29 Mar 2022 09:11:57 -0400 Received: from albert.telenet-ops.be (albert.telenet-ops.be [IPv6:2a02:1800:110:4::f00:1a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4E9ADF10 for ; Tue, 29 Mar 2022 06:10:13 -0700 (PDT) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed40:d553:ff0a:6830:6bde]) by albert.telenet-ops.be with bizsmtp id CDAC2700C49QC4406DACYu; Tue, 29 Mar 2022 15:10:12 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1nZBbv-007Grs-N8; Tue, 29 Mar 2022 15:10:11 +0200 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1nZBbv-00CEiP-4U; Tue, 29 Mar 2022 15:10:11 +0200 From: Geert Uytterhoeven To: Will Deacon , Mark Rutland , Bhaskara Budiredla , Bharat Bhushan Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH] perf: MARVELL_CN10K_DDR_PMU should depend on ARCH_THUNDER Date: Tue, 29 Mar 2022 15:10:10 +0200 Message-Id: <18bfd6e1bcf67db7ea656d684a8bbb68261eeb54.1648559364.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Marvell CN10K DRAM Subsystem (DSS) performance monitor is only present on Marvell CN10K SoCs. Hence add a dependency on ARCH_THUNDER, to prevent asking the user about this driver when configuring a kernel without Cavium Thunder (incl. Marvell CN10K) SoC support, Fixes: 68fa55f0e05ce371 ("perf/marvell: cn10k DDR perf event core ownership= ") Signed-off-by: Geert Uytterhoeven --- drivers/perf/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig index afdcb91601d2bbf9..1e2d69453771d4ac 100644 --- a/drivers/perf/Kconfig +++ b/drivers/perf/Kconfig @@ -187,7 +187,7 @@ source "drivers/perf/hisilicon/Kconfig" =20 config MARVELL_CN10K_DDR_PMU tristate "Enable MARVELL CN10K DRAM Subsystem(DSS) PMU Support" - depends on ARM64 || (COMPILE_TEST && 64BIT) + depends on ARCH_THUNDER || (COMPILE_TEST && 64BIT) help Enable perf support for Marvell DDR Performance monitoring event on CN10K platform. --=20 2.25.1