From nobody Sat Sep 21 07:44:32 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44A72C4332F for ; Fri, 2 Dec 2022 05:26:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232296AbiLBF0Q (ORCPT ); Fri, 2 Dec 2022 00:26:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231629AbiLBF0O (ORCPT ); Fri, 2 Dec 2022 00:26:14 -0500 Received: from mail-pg1-x531.google.com (mail-pg1-x531.google.com [IPv6:2607:f8b0:4864:20::531]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 16405D15A3 for ; Thu, 1 Dec 2022 21:26:12 -0800 (PST) Received: by mail-pg1-x531.google.com with SMTP id 62so3505019pgb.13 for ; Thu, 01 Dec 2022 21:26:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+7CLY/cg5ojs9SWtTqzajbZDLdfKBEhfLiZf2rmzvKo=; b=lXKxGX6WE0PEpSZ3htACVAs0aK8M0kYePPgSv8PdJq6TPyHlZ+z54XkOZ2nITnpHzf qptpwXUsP7AcWoSyiHhoLn4Dl4yojBl99u3WehwDcbgZrO6B/pLb4eA89ur8UU3XuP7n 9XkcBmDUiq1714lciG8O5wzArf4phIcYc0mLXI1MnX5yKfMeg2kbk5Ity/U+9Q6H03Nz ts9OK3esqBi3I0z67EqjQDb2N4HQ3xesjW3Bu0OXK5us05gOq5AogY2nmmf7meBekLZk VMhY1NMBYLtTwb0qeR4P4NWaUBRavI0G7Q7OwB2vUSIMrBq9GzzTxRFnKE3Iowy6mRfq 8vnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+7CLY/cg5ojs9SWtTqzajbZDLdfKBEhfLiZf2rmzvKo=; b=WCvfJJBeYUsTRIUPg0FZP8vHagnPKL5WrEXfh/Hr2POYMiA3w2Lo/KtWmCDK7Qwkto HOx8LTGJJKxw61pT460exUUE/3Q7kRn4dHE4m3H2l8kisJ1hSCENgIQCQXAXfWJzMHUv /IL9VOHU1WAnhjhgXEQnbj28sT1zV8sCug06RrK+kj5TZqroe1GezHUwzojOs2Dgw6OS 0odrbRys1HFZ66qKpnmpuby9LHj0XHoBBkqL7MBghdvgr5aa0XkUn1+9FnKOmi9b8Ycw rVxJTQ4nOW7tfvbqg+gv91xfJ7e4zd7FnxhORvuXGOMek/JaUihpemisXXzxC3XW88Z5 4KNQ== X-Gm-Message-State: ANoB5plq3C2fMFst7x2sIyT3B4+lhKyVXn5bWgrIcHX7+tONleYsDWR3 1jIvXqeQRHEiFCbpkbtzEHURDA== X-Google-Smtp-Source: AA0mqf4gLNzfw4IqDl++LKk9PBLXk4Rf0Xbt66bkQ6IAWTukB70GJgv1O47OinugE/tSm16nmV8uwA== X-Received: by 2002:a63:5042:0:b0:46f:e658:a8ff with SMTP id q2-20020a635042000000b0046fe658a8ffmr47515928pgl.493.1669958771316; Thu, 01 Dec 2022 21:26:11 -0800 (PST) Received: from localhost ([122.172.87.149]) by smtp.gmail.com with ESMTPSA id n9-20020a170902e54900b001898ca438fcsm4595052plf.282.2022.12.01.21.26.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Dec 2022 21:26:10 -0800 (PST) From: Viresh Kumar To: "Rafael J. Wysocki" , Viresh Kumar , Matthias Brugger Cc: linux-pm@vger.kernel.org, Vincent Guittot , regressions@leemhuis.info, daniel@makrotopia.org, thomas.huehn@hs-nordhausen.de, "v5 . 19+" , Nick , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH] Revert "cpufreq: mediatek: Refine mtk_cpufreq_voltage_tracking()" Date: Fri, 2 Dec 2022 10:56:07 +0530 Message-Id: <18947e09733a17935af9a123ccf9b6e92faeaf9b.1669958641.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: <930778a1-5e8b-6df6-3276-42dcdadaf682@systemli.org> References: <930778a1-5e8b-6df6-3276-42dcdadaf682@systemli.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This reverts commit 6a17b3876bc8303612d7ad59ecf7cbc0db418bcd. This commit caused regression on Banana Pi R64 (MT7622), revert until the problem is identified and fixed properly. Link: https://lore.kernel.org/all/930778a1-5e8b-6df6-3276-42dcdadaf682@syst= emli.org/ Cc: v5.19+ # v5.19+ Reported-by: Nick Signed-off-by: Viresh Kumar Reported-by: Nick Hainke Tested-by: Nick Hainke --- drivers/cpufreq/mediatek-cpufreq.c | 147 +++++++++++++++++++---------- 1 file changed, 96 insertions(+), 51 deletions(-) diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-= cpufreq.c index 7f2680bc9a0f..4466d0c91a6a 100644 --- a/drivers/cpufreq/mediatek-cpufreq.c +++ b/drivers/cpufreq/mediatek-cpufreq.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include @@ -16,6 +15,8 @@ #include #include =20 +#define VOLT_TOL (10000) + struct mtk_cpufreq_platform_data { int min_volt_shift; int max_volt_shift; @@ -55,7 +56,6 @@ struct mtk_cpu_dvfs_info { unsigned int opp_cpu; unsigned long current_freq; const struct mtk_cpufreq_platform_data *soc_data; - int vtrack_max; bool ccifreq_bound; }; =20 @@ -82,7 +82,6 @@ static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_dv= fs_info *info, struct regulator *proc_reg =3D info->proc_reg; struct regulator *sram_reg =3D info->sram_reg; int pre_vproc, pre_vsram, new_vsram, vsram, vproc, ret; - int retry =3D info->vtrack_max; =20 pre_vproc =3D regulator_get_voltage(proc_reg); if (pre_vproc < 0) { @@ -90,44 +89,91 @@ static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_= dvfs_info *info, "invalid Vproc value: %d\n", pre_vproc); return pre_vproc; } + /* Vsram should not exceed the maximum allowed voltage of SoC. */ + new_vsram =3D min(new_vproc + soc_data->min_volt_shift, + soc_data->sram_max_volt); + + if (pre_vproc < new_vproc) { + /* + * When scaling up voltages, Vsram and Vproc scale up step + * by step. At each step, set Vsram to (Vproc + 200mV) first, + * then set Vproc to (Vsram - 100mV). + * Keep doing it until Vsram and Vproc hit target voltages. + */ + do { + pre_vsram =3D regulator_get_voltage(sram_reg); + if (pre_vsram < 0) { + dev_err(info->cpu_dev, + "invalid Vsram value: %d\n", pre_vsram); + return pre_vsram; + } + pre_vproc =3D regulator_get_voltage(proc_reg); + if (pre_vproc < 0) { + dev_err(info->cpu_dev, + "invalid Vproc value: %d\n", pre_vproc); + return pre_vproc; + } =20 - pre_vsram =3D regulator_get_voltage(sram_reg); - if (pre_vsram < 0) { - dev_err(info->cpu_dev, "invalid Vsram value: %d\n", pre_vsram); - return pre_vsram; - } + vsram =3D min(new_vsram, + pre_vproc + soc_data->min_volt_shift); =20 - new_vsram =3D clamp(new_vproc + soc_data->min_volt_shift, - soc_data->sram_min_volt, soc_data->sram_max_volt); + if (vsram + VOLT_TOL >=3D soc_data->sram_max_volt) { + vsram =3D soc_data->sram_max_volt; =20 - do { - if (pre_vproc <=3D new_vproc) { - vsram =3D clamp(pre_vproc + soc_data->max_volt_shift, - soc_data->sram_min_volt, new_vsram); - ret =3D regulator_set_voltage(sram_reg, vsram, - soc_data->sram_max_volt); + /* + * If the target Vsram hits the maximum voltage, + * try to set the exact voltage value first. + */ + ret =3D regulator_set_voltage(sram_reg, vsram, + vsram); + if (ret) + ret =3D regulator_set_voltage(sram_reg, + vsram - VOLT_TOL, + vsram); =20 - if (ret) - return ret; - - if (vsram =3D=3D soc_data->sram_max_volt || - new_vsram =3D=3D soc_data->sram_min_volt) vproc =3D new_vproc; - else + } else { + ret =3D regulator_set_voltage(sram_reg, vsram, + vsram + VOLT_TOL); + vproc =3D vsram - soc_data->min_volt_shift; + } + if (ret) + return ret; =20 ret =3D regulator_set_voltage(proc_reg, vproc, - soc_data->proc_max_volt); + vproc + VOLT_TOL); if (ret) { regulator_set_voltage(sram_reg, pre_vsram, - soc_data->sram_max_volt); + pre_vsram); return ret; } - } else if (pre_vproc > new_vproc) { + } while (vproc < new_vproc || vsram < new_vsram); + } else if (pre_vproc > new_vproc) { + /* + * When scaling down voltages, Vsram and Vproc scale down step + * by step. At each step, set Vproc to (Vsram - 200mV) first, + * then set Vproc to (Vproc + 100mV). + * Keep doing it until Vsram and Vproc hit target voltages. + */ + do { + pre_vproc =3D regulator_get_voltage(proc_reg); + if (pre_vproc < 0) { + dev_err(info->cpu_dev, + "invalid Vproc value: %d\n", pre_vproc); + return pre_vproc; + } + pre_vsram =3D regulator_get_voltage(sram_reg); + if (pre_vsram < 0) { + dev_err(info->cpu_dev, + "invalid Vsram value: %d\n", pre_vsram); + return pre_vsram; + } + vproc =3D max(new_vproc, pre_vsram - soc_data->max_volt_shift); ret =3D regulator_set_voltage(proc_reg, vproc, - soc_data->proc_max_volt); + vproc + VOLT_TOL); if (ret) return ret; =20 @@ -137,24 +183,32 @@ static int mtk_cpufreq_voltage_tracking(struct mtk_cp= u_dvfs_info *info, vsram =3D max(new_vsram, vproc + soc_data->min_volt_shift); =20 - ret =3D regulator_set_voltage(sram_reg, vsram, - soc_data->sram_max_volt); + if (vsram + VOLT_TOL >=3D soc_data->sram_max_volt) { + vsram =3D soc_data->sram_max_volt; + + /* + * If the target Vsram hits the maximum voltage, + * try to set the exact voltage value first. + */ + ret =3D regulator_set_voltage(sram_reg, vsram, + vsram); + if (ret) + ret =3D regulator_set_voltage(sram_reg, + vsram - VOLT_TOL, + vsram); + } else { + ret =3D regulator_set_voltage(sram_reg, vsram, + vsram + VOLT_TOL); + } + if (ret) { regulator_set_voltage(proc_reg, pre_vproc, - soc_data->proc_max_volt); + pre_vproc); return ret; } - } - - pre_vproc =3D vproc; - pre_vsram =3D vsram; - - if (--retry < 0) { - dev_err(info->cpu_dev, - "over loop count, failed to set voltage\n"); - return -EINVAL; - } - } while (vproc !=3D new_vproc || vsram !=3D new_vsram); + } while (vproc > new_vproc + VOLT_TOL || + vsram > new_vsram + VOLT_TOL); + } =20 return 0; } @@ -250,8 +304,8 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy= *policy, * If the new voltage or the intermediate voltage is higher than the * current voltage, scale up voltage first. */ - target_vproc =3D max(inter_vproc, vproc); - if (pre_vproc <=3D target_vproc) { + target_vproc =3D (inter_vproc > vproc) ? inter_vproc : vproc; + if (pre_vproc < target_vproc) { ret =3D mtk_cpufreq_set_voltage(info, target_vproc); if (ret) { dev_err(cpu_dev, @@ -513,15 +567,6 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_= info *info, int cpu) */ info->need_voltage_tracking =3D (info->sram_reg !=3D NULL); =20 - /* - * We assume min voltage is 0 and tracking target voltage using - * min_volt_shift for each iteration. - * The vtrack_max is 3 times of expeted iteration count. - */ - info->vtrack_max =3D 3 * DIV_ROUND_UP(max(info->soc_data->sram_max_volt, - info->soc_data->proc_max_volt), - info->soc_data->min_volt_shift); - return 0; =20 out_disable_inter_clock: --=20 2.31.1.272.g89b43f80a514