From nobody Sun Feb 8 12:14:31 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2EFE2255E38; Tue, 8 Apr 2025 21:48:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744148884; cv=none; b=gG9iIb480abHj+RIm1fPbAwV3/qIuZ5sL8qsU6sseGCYmEr6xjUzZBZDGngUyuXFBPCPCl1VvgEEbKufXpYaCTb8TrMkeC608UaNL8Nw0o2jXizQh5jHIQ/KhKry59Zo+q4dd2mXeGU7RnDCmV9jGJxNzPs2H8XRaqhWW3j/kuE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744148884; c=relaxed/simple; bh=onU3+ECl+OTDa1KAxjJzsuEBWFm7MzPnUVp8eNwUSvk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=BBIwhQ/SRyHQ4yxzReAHZQqpPQHsMaj0IymLHmlpMEGZI45vEq95BZpgxZmOFyG30sKlgN25j+x+Sc6/HPZDpYFPGA0X/mJ9be/RsOiFqmkZKY/2KBGMHudcdZL1T5DM3MdJAAYhLnC0CWPRdeqEvU11LMX57LquSnSZ0X/j8nE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VPkXl8P2; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VPkXl8P2" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BB83EC4CEEF; Tue, 8 Apr 2025 21:48:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1744148883; bh=onU3+ECl+OTDa1KAxjJzsuEBWFm7MzPnUVp8eNwUSvk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VPkXl8P2dBfNOLAb+hcnyOiRDwVkaDoCb0KWaDSOKYUZWRwUUwt89ookLdGneY+3q acUAn9cKlMDMSccEKpzaaSFen8T9fZ8wOdu91YBsHcl2DRH8cH9S99bQOCNLxcDHnD OImLbZOYHt3/OrSDib/k9IShd1kP9FjKyybpX+nwqdvax126CTisztVCiOrOe9DkHa M3ZM+j1BDGKlMehKcikEIdAFOyafDLkwStirGzSbMOFCgU82fOtM+K2Zqy/vAxB2Tk ghaQl9kvZ9aZLQOfCgzeMgbcie53391Z/00LgX1i97SC9/NJXesYyWRQGt0v7T9NNy Kzv9RuVenjJqA== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, amit@kernel.org, kvm@vger.kernel.org, amit.shah@amd.com, thomas.lendacky@amd.com, bp@alien8.de, tglx@linutronix.de, peterz@infradead.org, pawan.kumar.gupta@linux.intel.com, corbet@lwn.net, mingo@redhat.com, dave.hansen@linux.intel.com, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, daniel.sneddon@linux.intel.com, kai.huang@intel.com, sandipan.das@amd.com, boris.ostrovsky@oracle.com, Babu.Moger@amd.com, david.kaplan@amd.com, dwmw@amazon.co.uk, andrew.cooper3@citrix.comm, nik.borisov@suse.com Subject: [PATCH v4 2/6] x86/bugs: Use SBPB in write_ibpb() if applicable Date: Tue, 8 Apr 2025 14:47:31 -0700 Message-ID: <17c5dcd14b29199b75199d67ff7758de9d9a4928.1744148254.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" write_ibpb() does IBPB, which (among other things) flushes branch type predictions on AMD. If the CPU has SRSO_NO, or if the SRSO mitigation has been disabled, branch type flushing isn't needed, in which case the lighter-weight SBPB can be used. The 'x86_pred_cmd' variable already keeps track of whether IBPB or SBPB should be used. Use that instead of hardcoding IBPB. Signed-off-by: Josh Poimboeuf --- arch/x86/entry/entry.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/entry/entry.S b/arch/x86/entry/entry.S index cabe65ac8379..175958b02f2b 100644 --- a/arch/x86/entry/entry.S +++ b/arch/x86/entry/entry.S @@ -21,7 +21,7 @@ SYM_FUNC_START(write_ibpb) ANNOTATE_NOENDBR movl $MSR_IA32_PRED_CMD, %ecx - movl $PRED_CMD_IBPB, %eax + movl _ASM_RIP(x86_pred_cmd), %eax xorl %edx, %edx wrmsr =20 --=20 2.49.0