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smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ivFazsCL; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ivFazsCL" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 440021F000E9; Mon, 17 Aug 2026 11:23:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1786965840; bh=1194kP56Sg9/NyLnT9AjjCtQK2S0+p5KTSq8PLUHGUA=; h=Date:From:To:Cc:Subject:References; b=ivFazsCLQiZuGiqf+NGcXjqeYbsPO7aQRqSKWwoxSaSVDQMl0Dz8dVOLFa5CYL8ev 8j2y/M1TF5aHKmhuFwS0e43sgB9aT0sHbdi0pDLXVJ2wMjD3ythnz3mVPRc8JDXM/l +BB5+Y7gY2rBqiiYs5nJvFT1pQZpSz+z1iauFq5YUDsyL00ArwJ29spiBKJAx2EdZZ DIijHx+itYLPrXmsWMA6Y2SPC9HSyre6GmfWJOn/e40shtvvAv3krFo2iG1HHyc+SH nZYcwjKkcBqHr05vbSkqXQWYjoh5d+/KE5IllcHl0sCrVjuUyr6AbfCy9lQRhz3lq3 B0pKwcIHaoXqQ== Date: Mon, 17 Aug 2026 13:23:57 +0200 From: Thomas Gleixner To: Linus Torvalds Cc: linux-kernel@vger.kernel.org, x86@kernel.org Subject: [GIT pull] timers/clocksource for v7.3-rc1 References: <178696575118.1270771.17154447195623102039.tglx@fw13> Message-ID: <178696575969.1270771.16925646009811714915.tglx@fw13> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Linus, please pull the latest timers/clocksource branch from: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers-clockso= urce-2026-08-17 up to: 0eaed89c18ae: Merge tag 'timers-v7.3-rc1' of git://git.kernel.org/p= ub/scm/linux/kernel/git/daniel.lezcano/linux into timers/clocksource Clocksource/event driver updates: - Remove redundant dev_err() and dev_err_probe() invocations in various drivers. - Handle SWAP_IO_SPACE correctly in the rtl-otto driver - Make the Samsumg PWM timer driver PREEMPT_RT compatible - Ensure that the SUN4I timer is programmed with a delta larger than zero as a zero delta causes the the timer to be disabled. - The usual fixes and improvements all over the place Thanks, tglx ------------------> Felix Yan (1): clocksource/drivers/timer-sun4i: Advertise a real minimum delta Guangshuo Li (1): clocksource/drivers/clps711x: Do not unmap clocksource MMIO Marek Szyprowski (1): clocksource/drivers/samsung_pwm: Switch to raw_spinlock_t type Pan Chuang (1): clocksource: Remove redundant dev_err()/dev_err_probe() Rustam Adilov (1): clocksource/drivers/rtl-otto: Change driver to use __raw reads and wr= ites Uwe Kleine-K=C3=B6nig (The Capable Hub) (2): clocksource/drivers/sh_mtu2: Drop unused assignment of platform_devic= e_id clocksource/drivers/sh_cmt: Use named initializers for platform_devic= e_id arrays WenTao Liang (1): clocksource/drivers/nxp-pit: Fix IRQ leak on cpuhp_setup_state error = path Yuho Choi (1): clocksource/drivers/armada: Unwind timer clock on init failure drivers/clocksource/arm_arch_timer_mmio.c | 4 +--- drivers/clocksource/clps711x-timer.c | 2 +- drivers/clocksource/em_sti.c | 4 +--- drivers/clocksource/samsung_pwm_timer.c | 22 +++++++++++----------- drivers/clocksource/sh_cmt.c | 4 ++-- drivers/clocksource/sh_mtu2.c | 4 ++-- drivers/clocksource/sh_tmu.c | 4 ++-- drivers/clocksource/timer-armada-370-xp.c | 18 +++++++++++++++--- drivers/clocksource/timer-nxp-pit.c | 4 +++- drivers/clocksource/timer-nxp-stm.c | 2 +- drivers/clocksource/timer-rtl-otto.c | 14 +++++++------- drivers/clocksource/timer-sun4i.c | 2 +- drivers/clocksource/timer-sun5i.c | 4 +--- drivers/clocksource/timer-tegra186.c | 4 +--- drivers/clocksource/timer-ti-dm.c | 4 +--- drivers/pwm/pwm-samsung.c | 22 +++++++++++----------- include/clocksource/samsung_pwm.h | 2 +- 17 files changed, 62 insertions(+), 58 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer_mmio.c b/drivers/clocksourc= e/arm_arch_timer_mmio.c index d10362692fdd..d678f764d3bb 100644 --- a/drivers/clocksource/arm_arch_timer_mmio.c +++ b/drivers/clocksource/arm_arch_timer_mmio.c @@ -313,10 +313,8 @@ static int arch_timer_mmio_frame_register(struct platf= orm_device *pdev, ret =3D devm_request_irq(&pdev->dev, irq, arch_timer_mmio_handler, IRQF_TIMER | IRQF_NO_AUTOEN, "arch_mem_timer", &at->evt); - if (ret) { - dev_err(&pdev->dev, "Failed to request mem timer irq\n"); + if (ret) return ret; - } =20 /* Afer this point, we're not allowed to fail anymore */ arch_timer_mmio_setup(at, irq); diff --git a/drivers/clocksource/clps711x-timer.c b/drivers/clocksource/clp= s711x-timer.c index bb0a44adaf28..63ae3a691b14 100644 --- a/drivers/clocksource/clps711x-timer.c +++ b/drivers/clocksource/clps711x-timer.c @@ -94,7 +94,7 @@ static int __init clps711x_timer_init(struct device_node = *np) switch (of_alias_get_id(np, "timer")) { case CLPS711X_CLKSRC_CLOCKSOURCE: clps711x_clksrc_init(clock, base); - break; + return 0; case CLPS711X_CLKSRC_CLOCKEVENT: ret =3D _clps711x_clkevt_init(clock, base, irq); break; diff --git a/drivers/clocksource/em_sti.c b/drivers/clocksource/em_sti.c index ca8d29ab70da..73a3357d173d 100644 --- a/drivers/clocksource/em_sti.c +++ b/drivers/clocksource/em_sti.c @@ -300,10 +300,8 @@ static int em_sti_probe(struct platform_device *pdev) ret =3D devm_request_irq(&pdev->dev, irq, em_sti_interrupt, IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING, dev_name(&pdev->dev), p); - if (ret) { - dev_err(&pdev->dev, "failed to request low IRQ\n"); + if (ret) return ret; - } =20 /* get hold of clock */ p->clk =3D devm_clk_get(&pdev->dev, "sclk"); diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/= samsung_pwm_timer.c index b9561e3f196c..0544124cf5ce 100644 --- a/drivers/clocksource/samsung_pwm_timer.c +++ b/drivers/clocksource/samsung_pwm_timer.c @@ -56,7 +56,7 @@ #define TCON_AUTORELOAD(chan) \ ((chan < 5) ? _TCON_AUTORELOAD(chan) : _TCON_AUTORELOAD4(chan)) =20 -DEFINE_SPINLOCK(samsung_pwm_lock); +DEFINE_RAW_SPINLOCK(samsung_pwm_lock); EXPORT_SYMBOL(samsung_pwm_lock); =20 struct samsung_pwm_clocksource { @@ -87,14 +87,14 @@ static void samsung_timer_set_prescale(unsigned int cha= nnel, u16 prescale) if (channel >=3D 2) shift =3D TCFG0_PRESCALER1_SHIFT; =20 - spin_lock_irqsave(&samsung_pwm_lock, flags); + raw_spin_lock_irqsave(&samsung_pwm_lock, flags); =20 reg =3D readl(pwm.base + REG_TCFG0); reg &=3D ~(TCFG0_PRESCALER_MASK << shift); reg |=3D (prescale - 1) << shift; writel(reg, pwm.base + REG_TCFG0); =20 - spin_unlock_irqrestore(&samsung_pwm_lock, flags); + raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags); } =20 static void samsung_timer_set_divisor(unsigned int channel, u8 divisor) @@ -106,14 +106,14 @@ static void samsung_timer_set_divisor(unsigned int ch= annel, u8 divisor) =20 bits =3D (fls(divisor) - 1) - pwm.variant.div_base; =20 - spin_lock_irqsave(&samsung_pwm_lock, flags); + raw_spin_lock_irqsave(&samsung_pwm_lock, flags); =20 reg =3D readl(pwm.base + REG_TCFG1); reg &=3D ~(TCFG1_MUX_MASK << shift); reg |=3D bits << shift; writel(reg, pwm.base + REG_TCFG1); =20 - spin_unlock_irqrestore(&samsung_pwm_lock, flags); + raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags); } =20 static void samsung_time_stop(unsigned int channel) @@ -124,13 +124,13 @@ static void samsung_time_stop(unsigned int channel) if (channel > 0) ++channel; =20 - spin_lock_irqsave(&samsung_pwm_lock, flags); + raw_spin_lock_irqsave(&samsung_pwm_lock, flags); =20 tcon =3D readl_relaxed(pwm.base + REG_TCON); tcon &=3D ~TCON_START(channel); writel_relaxed(tcon, pwm.base + REG_TCON); =20 - spin_unlock_irqrestore(&samsung_pwm_lock, flags); + raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags); } =20 static void samsung_time_setup(unsigned int channel, unsigned long tcnt) @@ -142,7 +142,7 @@ static void samsung_time_setup(unsigned int channel, un= signed long tcnt) if (tcon_chan > 0) ++tcon_chan; =20 - spin_lock_irqsave(&samsung_pwm_lock, flags); + raw_spin_lock_irqsave(&samsung_pwm_lock, flags); =20 tcon =3D readl_relaxed(pwm.base + REG_TCON); =20 @@ -153,7 +153,7 @@ static void samsung_time_setup(unsigned int channel, un= signed long tcnt) writel_relaxed(tcnt, pwm.base + REG_TCMPB(channel)); writel_relaxed(tcon, pwm.base + REG_TCON); =20 - spin_unlock_irqrestore(&samsung_pwm_lock, flags); + raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags); } =20 static void samsung_time_start(unsigned int channel, bool periodic) @@ -164,7 +164,7 @@ static void samsung_time_start(unsigned int channel, bo= ol periodic) if (channel > 0) ++channel; =20 - spin_lock_irqsave(&samsung_pwm_lock, flags); + raw_spin_lock_irqsave(&samsung_pwm_lock, flags); =20 tcon =3D readl_relaxed(pwm.base + REG_TCON); =20 @@ -178,7 +178,7 @@ static void samsung_time_start(unsigned int channel, bo= ol periodic) =20 writel_relaxed(tcon, pwm.base + REG_TCON); =20 - spin_unlock_irqrestore(&samsung_pwm_lock, flags); + raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags); } =20 static int samsung_set_next_event(unsigned long cycles, diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index cf057f531a58..7977507f6ce3 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -974,8 +974,8 @@ static int sh_cmt_map_memory(struct sh_cmt_device *cmt) } =20 static const struct platform_device_id sh_cmt_id_table[] =3D { - { "sh-cmt-16", (kernel_ulong_t)&sh_cmt_info[SH_CMT_16BIT] }, - { "sh-cmt-32", (kernel_ulong_t)&sh_cmt_info[SH_CMT_32BIT] }, + { .name =3D "sh-cmt-16", .driver_data =3D (kernel_ulong_t)&sh_cmt_info[SH= _CMT_16BIT] }, + { .name =3D "sh-cmt-32", .driver_data =3D (kernel_ulong_t)&sh_cmt_info[SH= _CMT_32BIT] }, { } }; MODULE_DEVICE_TABLE(platform, sh_cmt_id_table); diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c index 1997639b113e..3aca86d6a2d4 100644 --- a/drivers/clocksource/sh_mtu2.c +++ b/drivers/clocksource/sh_mtu2.c @@ -484,8 +484,8 @@ static int sh_mtu2_probe(struct platform_device *pdev) } =20 static const struct platform_device_id sh_mtu2_id_table[] =3D { - { "sh-mtu2", 0 }, - { }, + { .name =3D "sh-mtu2" }, + { } }; MODULE_DEVICE_TABLE(platform, sh_mtu2_id_table); =20 diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c index 8d6a9e279f73..8b3cfa6727bd 100644 --- a/drivers/clocksource/sh_tmu.c +++ b/drivers/clocksource/sh_tmu.c @@ -614,8 +614,8 @@ static int sh_tmu_probe(struct platform_device *pdev) } =20 static const struct platform_device_id sh_tmu_id_table[] =3D { - { "sh-tmu", SH_TMU }, - { "sh-tmu-sh3", SH_TMU_SH3 }, + { .name =3D "sh-tmu", .driver_data =3D SH_TMU }, + { .name =3D "sh-tmu-sh3", .driver_data =3D SH_TMU_SH3 }, { } }; MODULE_DEVICE_TABLE(platform, sh_tmu_id_table); diff --git a/drivers/clocksource/timer-armada-370-xp.c b/drivers/clocksourc= e/timer-armada-370-xp.c index a405a084cf72..b5a984aa1cbb 100644 --- a/drivers/clocksource/timer-armada-370-xp.c +++ b/drivers/clocksource/timer-armada-370-xp.c @@ -349,7 +349,11 @@ static int __init armada_xp_timer_init(struct device_n= ode *np) =20 timer_clk =3D clk_get_rate(clk); =20 - return armada_370_xp_timer_common_init(np); + ret =3D armada_370_xp_timer_common_init(np); + if (ret) + clk_disable_unprepare(clk); + + return ret; } TIMER_OF_DECLARE(armada_xp, "marvell,armada-xp-timer", armada_xp_timer_init); @@ -387,7 +391,11 @@ static int __init armada_375_timer_init(struct device_= node *np) timer25Mhz =3D false; } =20 - return armada_370_xp_timer_common_init(np); + ret =3D armada_370_xp_timer_common_init(np); + if (ret) + clk_disable_unprepare(clk); + + return ret; } TIMER_OF_DECLARE(armada_375, "marvell,armada-375-timer", armada_375_timer_init); @@ -410,7 +418,11 @@ static int __init armada_370_timer_init(struct device_= node *np) timer_clk =3D clk_get_rate(clk) / TIMER_DIVIDER; timer25Mhz =3D false; =20 - return armada_370_xp_timer_common_init(np); + ret =3D armada_370_xp_timer_common_init(np); + if (ret) + clk_disable_unprepare(clk); + + return ret; } TIMER_OF_DECLARE(armada_370, "marvell,armada-370-timer", armada_370_timer_init); diff --git a/drivers/clocksource/timer-nxp-pit.c b/drivers/clocksource/time= r-nxp-pit.c index bc5157e2ba57..2f70d1d5e21b 100644 --- a/drivers/clocksource/timer-nxp-pit.c +++ b/drivers/clocksource/timer-nxp-pit.c @@ -328,8 +328,10 @@ static int pit_timer_init(struct device_node *np) if (pit_instances =3D=3D max_pit_instances) { ret =3D cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "PIT timer:starting", pit_clockevent_starting_cpu, NULL); - if (ret < 0) + if (ret < 0) { + pit_clockevent_per_cpu_exit(pit, pit_instances); goto out_pit_clocksource_unregister; + } } =20 return 0; diff --git a/drivers/clocksource/timer-nxp-stm.c b/drivers/clocksource/time= r-nxp-stm.c index 1ab907233f48..6fe098a4a33f 100644 --- a/drivers/clocksource/timer-nxp-stm.c +++ b/drivers/clocksource/timer-nxp-stm.c @@ -441,7 +441,7 @@ static int nxp_stm_timer_probe(struct platform_device *= pdev) ret =3D devm_request_irq(dev, irq, nxp_stm_module_interrupt, IRQF_TIMER | IRQF_NOBALANCING, name, stm_timer); if (ret) - return dev_err_probe(dev, ret, "Unable to allocate interrupt line\n"); + return ret; =20 ret =3D nxp_stm_clocksource_init(dev, stm_timer, name, base, clk); if (ret) diff --git a/drivers/clocksource/timer-rtl-otto.c b/drivers/clocksource/tim= er-rtl-otto.c index dd236a7babee..0d1b9a01a94c 100644 --- a/drivers/clocksource/timer-rtl-otto.c +++ b/drivers/clocksource/timer-rtl-otto.c @@ -56,37 +56,37 @@ struct rttm_cs { /* Simple internal register functions */ static inline unsigned int rttm_get_counter(void __iomem *base) { - return ioread32(base + RTTM_CNT); + return __raw_readl(base + RTTM_CNT); } =20 static inline void rttm_set_period(void __iomem *base, unsigned int period) { - iowrite32(period, base + RTTM_DATA); + __raw_writel(period, base + RTTM_DATA); } =20 static inline void rttm_disable_timer(void __iomem *base) { - iowrite32(0, base + RTTM_CTRL); + __raw_writel(0, base + RTTM_CTRL); } =20 static inline void rttm_enable_timer(void __iomem *base, u32 mode, u32 div= isor) { - iowrite32(RTTM_CTRL_ENABLE | mode | divisor, base + RTTM_CTRL); + __raw_writel(RTTM_CTRL_ENABLE | mode | divisor, base + RTTM_CTRL); } =20 static inline void rttm_ack_irq(void __iomem *base) { - iowrite32(ioread32(base + RTTM_INT) | RTTM_INT_PENDING, base + RTTM_INT); + __raw_writel(__raw_readl(base + RTTM_INT) | RTTM_INT_PENDING, base + RTTM= _INT); } =20 static inline void rttm_enable_irq(void __iomem *base) { - iowrite32(RTTM_INT_ENABLE, base + RTTM_INT); + __raw_writel(RTTM_INT_ENABLE, base + RTTM_INT); } =20 static inline void rttm_disable_irq(void __iomem *base) { - iowrite32(0, base + RTTM_INT); + __raw_writel(0, base + RTTM_INT); } =20 /* Aggregated control functions for kernel clock framework */ diff --git a/drivers/clocksource/timer-sun4i.c b/drivers/clocksource/timer-= sun4i.c index 7bdcc60ad43c..c2d04ab7cf2d 100644 --- a/drivers/clocksource/timer-sun4i.c +++ b/drivers/clocksource/timer-sun4i.c @@ -208,7 +208,7 @@ static int __init sun4i_timer_init(struct device_node *= node) sun4i_timer_clear_interrupt(timer_of_base(&to)); =20 clockevents_config_and_register(&to.clkevt, timer_of_rate(&to), - TIMER_SYNC_TICKS, 0xffffffff); + TIMER_SYNC_TICKS + 1, 0xffffffff); =20 /* Enable timer0 interrupt */ val =3D readl(timer_of_base(&to) + TIMER_IRQ_EN_REG); diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-= sun5i.c index 6ab300d22621..bcf155fb9cac 100644 --- a/drivers/clocksource/timer-sun5i.c +++ b/drivers/clocksource/timer-sun5i.c @@ -247,10 +247,8 @@ static int sun5i_setup_clockevent(struct platform_devi= ce *pdev, ret =3D devm_request_irq(dev, irq, sun5i_timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL, "sun5i_timer0", ce); - if (ret) { - dev_err(dev, "Unable to register interrupt\n"); + if (ret) return ret; - } =20 return 0; } diff --git a/drivers/clocksource/timer-tegra186.c b/drivers/clocksource/tim= er-tegra186.c index 78600ddeb1c6..0f626ecf61b0 100644 --- a/drivers/clocksource/timer-tegra186.c +++ b/drivers/clocksource/timer-tegra186.c @@ -532,10 +532,8 @@ static int tegra186_timer_probe(struct platform_device= *pdev) if (kernel_wdt) { err =3D devm_request_irq(dev, irq, tegra186_wdt_irq, 0, dev_name(dev), kernel_wdt); - if (err < 0) { - dev_err(dev, "failed to request kernel WDT IRQ: %d\n", err); + if (err < 0) goto unregister_usec; - } =20 tegra186_wdt_set_timeout(&kernel_wdt->base, TEGRA186_KERNEL_WDT_TIMEOUT); tegra186_wdt_enable(kernel_wdt); diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-= ti-dm.c index bd06afb7d522..6787acac9a43 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -1375,10 +1375,8 @@ static int omap_dm_timer_setup_clockevent(struct dmt= imer *timer) =20 ret =3D devm_request_irq(dev, timer->irq, omap_dm_timer_evt_interrupt, IRQF_TIMER, "omap_dm_timer_clockevent", clkevt); - if (ret) { - dev_err(dev, "Failed to request interrupt: %d\n", ret); + if (ret) return ret; - } =20 __omap_dm_timer_int_enable(timer, OMAP_TIMER_INT_OVERFLOW); =20 diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c index 951b38ff5f8e..14fb460a4565 100644 --- a/drivers/pwm/pwm-samsung.c +++ b/drivers/pwm/pwm-samsung.c @@ -102,7 +102,7 @@ struct samsung_pwm_chip { * IP. Should this change, both drivers will need to be modified to * properly synchronize accesses to particular instances. */ -static DEFINE_SPINLOCK(samsung_pwm_lock); +static DEFINE_RAW_SPINLOCK(samsung_pwm_lock); #endif =20 static inline @@ -141,14 +141,14 @@ static void pwm_samsung_set_divisor(struct samsung_pw= m_chip *our_chip, =20 bits =3D (fls(divisor) - 1) - our_chip->variant.div_base; =20 - spin_lock_irqsave(&samsung_pwm_lock, flags); + raw_spin_lock_irqsave(&samsung_pwm_lock, flags); =20 reg =3D readl(our_chip->base + REG_TCFG1); reg &=3D ~(TCFG1_MUX_MASK << shift); reg |=3D bits << shift; writel(reg, our_chip->base + REG_TCFG1); =20 - spin_unlock_irqrestore(&samsung_pwm_lock, flags); + raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags); } =20 static int pwm_samsung_is_tdiv(struct samsung_pwm_chip *our_chip, unsigned= int chan) @@ -249,7 +249,7 @@ static int pwm_samsung_enable(struct pwm_chip *chip, st= ruct pwm_device *pwm) unsigned long flags; u32 tcon; =20 - spin_lock_irqsave(&samsung_pwm_lock, flags); + raw_spin_lock_irqsave(&samsung_pwm_lock, flags); =20 tcon =3D readl(our_chip->base + REG_TCON); =20 @@ -263,7 +263,7 @@ static int pwm_samsung_enable(struct pwm_chip *chip, st= ruct pwm_device *pwm) =20 our_chip->disabled_mask &=3D ~BIT(pwm->hwpwm); =20 - spin_unlock_irqrestore(&samsung_pwm_lock, flags); + raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags); =20 return 0; } @@ -275,7 +275,7 @@ static void pwm_samsung_disable(struct pwm_chip *chip, = struct pwm_device *pwm) unsigned long flags; u32 tcon; =20 - spin_lock_irqsave(&samsung_pwm_lock, flags); + raw_spin_lock_irqsave(&samsung_pwm_lock, flags); =20 tcon =3D readl(our_chip->base + REG_TCON); tcon &=3D ~TCON_AUTORELOAD(tcon_chan); @@ -290,7 +290,7 @@ static void pwm_samsung_disable(struct pwm_chip *chip, = struct pwm_device *pwm) =20 our_chip->disabled_mask |=3D BIT(pwm->hwpwm); =20 - spin_unlock_irqrestore(&samsung_pwm_lock, flags); + raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags); } =20 static void pwm_samsung_manual_update(struct samsung_pwm_chip *our_chip, @@ -298,11 +298,11 @@ static void pwm_samsung_manual_update(struct samsung_= pwm_chip *our_chip, { unsigned long flags; =20 - spin_lock_irqsave(&samsung_pwm_lock, flags); + raw_spin_lock_irqsave(&samsung_pwm_lock, flags); =20 __pwm_samsung_manual_update(our_chip, pwm); =20 - spin_unlock_irqrestore(&samsung_pwm_lock, flags); + raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags); } =20 static int __pwm_samsung_config(struct pwm_chip *chip, struct pwm_device *= pwm, @@ -390,7 +390,7 @@ static void pwm_samsung_set_invert(struct samsung_pwm_c= hip *our_chip, unsigned long flags; u32 tcon; =20 - spin_lock_irqsave(&samsung_pwm_lock, flags); + raw_spin_lock_irqsave(&samsung_pwm_lock, flags); =20 tcon =3D readl(our_chip->base + REG_TCON); =20 @@ -404,7 +404,7 @@ static void pwm_samsung_set_invert(struct samsung_pwm_c= hip *our_chip, =20 writel(tcon, our_chip->base + REG_TCON); =20 - spin_unlock_irqrestore(&samsung_pwm_lock, flags); + raw_spin_unlock_irqrestore(&samsung_pwm_lock, flags); } =20 static int pwm_samsung_set_polarity(struct pwm_chip *chip, diff --git a/include/clocksource/samsung_pwm.h b/include/clocksource/samsun= g_pwm.h index 9b435caa95fe..36f6f246e559 100644 --- a/include/clocksource/samsung_pwm.h +++ b/include/clocksource/samsung_pwm.h @@ -15,7 +15,7 @@ * spinlock is not shared between both drivers. */ #ifdef CONFIG_CLKSRC_SAMSUNG_PWM -extern spinlock_t samsung_pwm_lock; +extern raw_spinlock_t samsung_pwm_lock; #endif =20 struct samsung_pwm_variant {