From nobody Mon Sep 28 21:54:59 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 468AC5477E; Mon, 17 Aug 2026 08:37:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786955872; cv=none; b=cNufmNdMcJK9CdXp7jHSyIWNrSbLhj2Z8obXILXCLFzEbgiHN+FNjktjFFJZB7wQt8pSvoSbP1sQWECEdELFYHftOWzG1HMCYkY8Z26E+oY7kg+FKMaVh6Xi8+fuNz5qGriAYrFRcxc+Bd0ZcRxtsDU2X3GwHyHjX544YBU88uY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786955872; c=relaxed/simple; bh=2UIbDqZp8ISOKTdlQt/GIXMmTEZDoggaaE7ScDGLkjw=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=aLYVjHLJpR3m2gNtRHL/8m2rLptY49Dm1Pgby+fGlyj9hAbdrZStV6u/1MdCVmJwakhAH5cQ2N55kd6jt9dZGcHENs0pUrjxNHDekrsZ77/25FV1pF7xLJdhFWiMPI3teQ/oTZ+gTIa2gkdER4TJJzjCe4F/DOLHGucLTHAZr+U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=WXdkX5le; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=hy2RJ7FL; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="WXdkX5le"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="hy2RJ7FL" Date: Mon, 17 Aug 2026 08:37:48 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1786955869; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XTcj0LXf4lIPaaOLlYF0l3gWJnuayRVbbT4N5TSxC94=; b=WXdkX5lehvQPvkbE3DwyD+sc8pdp3nfUn5GZsCCCXGE7eOI3/FiMih/z5w0Ipab5lrJjuA l+mdUXzKLOchqrOmfpINRTLcXoV6WTuPum0Z7iWDeSI7+nXgNLvcRR6DK68K4aNY3pJYq6 ZXnUNNBE87d9LThpWHsdapzdIt21kSVyarvGkFt9PWiLPb9RPaY61968hoAsVRJM5HcVI/ 8R+jkcEj7hJQUSjeEpAOOl4GTQBMNDPvrMo473MoqxkGAxOlv2AWOBEaJVaikQlYpATbnk 6mFdyu2PbUJDe7tJHesQcU3JqwNDmbEOlRsBND4HuxmNKJZzt71OcJx2X7MEjA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1786955869; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XTcj0LXf4lIPaaOLlYF0l3gWJnuayRVbbT4N5TSxC94=; b=hy2RJ7FLtmmRlutWYmaO/ENTQ/SIwbl6pqrRhWbi8hrFs4z2t3aIuUjS0q43sobs2+1stY +i77Hc2JqhqXIxAQ== From: "tip-bot2 for Rustam Adilov" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: timers/clocksource] clocksource/drivers/rtl-otto: Change driver to use __raw reads and writes Cc: Rustam Adilov , Daniel Lezcano , Chris Packham , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260725175510.77240-1-adilov@disroot.org> References: <20260725175510.77240-1-adilov@disroot.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <178695586803.1542179.11897037737094734062.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the timers/clocksource branch of = tip: Commit-ID: 739007deca12d95db13762301b0745aa92938717 Gitweb: https://git.kernel.org/tip/739007deca12d95db13762301b0745aa9= 2938717 Author: Rustam Adilov AuthorDate: Sat, 25 Jul 2026 22:55:10 +05:00 Committer: Daniel Lezcano CommitterDate: Thu, 13 Aug 2026 18:13:15 +02:00 clocksource/drivers/rtl-otto: Change driver to use __raw reads and writes As it stands, the driver uses ioread32 and iowrite32 for register access and it works fine. However this stops working when the SWAP_IO_SPACE config is enabled as this drivers expects ioread32 and iowrite32 to be in native endian (that is big endian for currently supported SoCs). RTL9607C is a big endian MIPS SoC that has identical timer as the already supported chips but needs to have SWAP_IO_SPACE to have a functioning little endian USB host. Fix this by replacing all instances of ioread32 and iowrite32 with __raw_readl and __raw_writel variants. Since they essentially do the same register access, this shouldn't affect anything on other machines. Signed-off-by: Rustam Adilov Signed-off-by: Daniel Lezcano Reviewed-by: Chris Packham Link: https://patch.msgid.link/20260725175510.77240-1-adilov@disroot.org --- drivers/clocksource/timer-rtl-otto.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/clocksource/timer-rtl-otto.c b/drivers/clocksource/tim= er-rtl-otto.c index dd236a7..0d1b9a0 100644 --- a/drivers/clocksource/timer-rtl-otto.c +++ b/drivers/clocksource/timer-rtl-otto.c @@ -56,37 +56,37 @@ struct rttm_cs { /* Simple internal register functions */ static inline unsigned int rttm_get_counter(void __iomem *base) { - return ioread32(base + RTTM_CNT); + return __raw_readl(base + RTTM_CNT); } =20 static inline void rttm_set_period(void __iomem *base, unsigned int period) { - iowrite32(period, base + RTTM_DATA); + __raw_writel(period, base + RTTM_DATA); } =20 static inline void rttm_disable_timer(void __iomem *base) { - iowrite32(0, base + RTTM_CTRL); + __raw_writel(0, base + RTTM_CTRL); } =20 static inline void rttm_enable_timer(void __iomem *base, u32 mode, u32 div= isor) { - iowrite32(RTTM_CTRL_ENABLE | mode | divisor, base + RTTM_CTRL); + __raw_writel(RTTM_CTRL_ENABLE | mode | divisor, base + RTTM_CTRL); } =20 static inline void rttm_ack_irq(void __iomem *base) { - iowrite32(ioread32(base + RTTM_INT) | RTTM_INT_PENDING, base + RTTM_INT); + __raw_writel(__raw_readl(base + RTTM_INT) | RTTM_INT_PENDING, base + RTTM= _INT); } =20 static inline void rttm_enable_irq(void __iomem *base) { - iowrite32(RTTM_INT_ENABLE, base + RTTM_INT); + __raw_writel(RTTM_INT_ENABLE, base + RTTM_INT); } =20 static inline void rttm_disable_irq(void __iomem *base) { - iowrite32(0, base + RTTM_INT); + __raw_writel(0, base + RTTM_INT); } =20 /* Aggregated control functions for kernel clock framework */