From nobody Mon Sep 28 21:54:59 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 502903BB12A; Mon, 17 Aug 2026 08:37:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786955871; cv=none; b=l5A2q1pu/LjTdKFjtvI7XfiBz+palC6okWsyOWdToE7Q3MUOKswc5IwKG1SKbvXtEBpAOQrLs/qjYX4lc4QJABEXX8Q2lRA9Ukr0Lm8BO3EwLDas0xAHoScqQpqsqws08lfl6wFKJ5URKEglWY0TQl/YbijAWjWwiNwDt2Eba2Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786955871; c=relaxed/simple; bh=2Cw5MadKC92oDVXc8VzkMIdUbKQAVm+66JYaJttWaQw=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=DaDsVu+h8OMCBQn/IYzdLHcr+bNqfhjcej9f26NV2yiHgW/wecv1pTdw+F5zQaLW4+jUVAVtW9UVCc1kVmV7Z8R/zx0YArDPJvmu9pprBZtA1vCEHfXQcr1VmHflyznEceSb3uOGgwMw1wJpszScovwW8ZxF2OxHN0zL4IEO8x8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=WK2FIKJz; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=42UDcvg7; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="WK2FIKJz"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="42UDcvg7" Date: Mon, 17 Aug 2026 08:37:46 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1786955868; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=lGvWXNQjeOx53H6gjmxXFjMjvPjztny29G8y7mhMyto=; b=WK2FIKJzXxCwunlPzukxFlYA/46OZ+lbIcFEhKuNI8SwyLBSSRh3H/tu8S+n/eT9O8u6p0 OPCnxSuekkujTZbPgIfmicJ2MG19hk5xZIuO0IrVOuHgMMnxXZOq0VAqLSJga+G1fcyd0P HYd1eSW2H8lnxtuVqIJThMmtV15QFyhPgFVjX9ghQPvjdNoiGkU8DqXqPkYRZeUZg5+QBx z6RVf7WzgKr4WY+ozQgebjyYFaBjGjJUCmYIazNXlKuyMCSesTcZx/BCavU2VfGZ+JMCBb HGkIv7805ygzYD7qz5m2X4UrgVvNGBzFW7Qq9WsEX3enYUzIB6sMXY2i123B/Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1786955868; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=lGvWXNQjeOx53H6gjmxXFjMjvPjztny29G8y7mhMyto=; b=42UDcvg7TIFSGA0zDUiqKf9UxRvzvMRj3ygngHib9pX+nUhR+BSW/MLK6vNVwNIT5Bd0GE u13pHhLrbAUNqCAA== From: "tip-bot2 for Yuho Choi" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: timers/clocksource] clocksource/drivers/armada: Unwind timer clock on init failure Cc: Yuho Choi , Daniel Lezcano , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260802213545.565913-1-dbgh9129@gmail.com> References: <20260802213545.565913-1-dbgh9129@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <178695586628.1542179.17993953423139799386.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the timers/clocksource branch of = tip: Commit-ID: 8b4127f6db40381229f3564d34ac35f36311c201 Gitweb: https://git.kernel.org/tip/8b4127f6db40381229f3564d34ac35f36= 311c201 Author: Yuho Choi AuthorDate: Sun, 02 Aug 2026 17:35:45 -04:00 Committer: Daniel Lezcano CommitterDate: Thu, 13 Aug 2026 18:13:15 +02:00 clocksource/drivers/armada: Unwind timer clock on init failure The Armada timer init paths enable their clock before calling the common initialization routine. If that routine returns an error, the clock is left enabled even though the timer was not initialized successfully. Fixes: 12549e27c63c ("clocksource/drivers/time-armada-370-xp: Convert init = function to return error") Signed-off-by: Yuho Choi Signed-off-by: Daniel Lezcano Link: https://patch.msgid.link/20260802213545.565913-1-dbgh9129@gmail.com --- drivers/clocksource/timer-armada-370-xp.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/clocksource/timer-armada-370-xp.c b/drivers/clocksourc= e/timer-armada-370-xp.c index a405a08..b5a984a 100644 --- a/drivers/clocksource/timer-armada-370-xp.c +++ b/drivers/clocksource/timer-armada-370-xp.c @@ -349,7 +349,11 @@ static int __init armada_xp_timer_init(struct device_n= ode *np) =20 timer_clk =3D clk_get_rate(clk); =20 - return armada_370_xp_timer_common_init(np); + ret =3D armada_370_xp_timer_common_init(np); + if (ret) + clk_disable_unprepare(clk); + + return ret; } TIMER_OF_DECLARE(armada_xp, "marvell,armada-xp-timer", armada_xp_timer_init); @@ -387,7 +391,11 @@ static int __init armada_375_timer_init(struct device_= node *np) timer25Mhz =3D false; } =20 - return armada_370_xp_timer_common_init(np); + ret =3D armada_370_xp_timer_common_init(np); + if (ret) + clk_disable_unprepare(clk); + + return ret; } TIMER_OF_DECLARE(armada_375, "marvell,armada-375-timer", armada_375_timer_init); @@ -410,7 +418,11 @@ static int __init armada_370_timer_init(struct device_= node *np) timer_clk =3D clk_get_rate(clk) / TIMER_DIVIDER; timer25Mhz =3D false; =20 - return armada_370_xp_timer_common_init(np); + ret =3D armada_370_xp_timer_common_init(np); + if (ret) + clk_disable_unprepare(clk); + + return ret; } TIMER_OF_DECLARE(armada_370, "marvell,armada-370-timer", armada_370_timer_init);