From nobody Tue Sep 29 13:20:16 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B440D378D87; Fri, 7 Aug 2026 16:00:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786118410; cv=none; b=Wkj3Kf9UMu3YEipHEA2gKIiLhLKwX5k7hS6nLyF6ctok06QGH5eb3Ry3M+OJh5VgvwrC20y6wGsgB3qiXihL+xhalAAfR/5z7xz+e8MOtkl+aMHqpcMnFmaP7O0F+rzjRC3tPCX78bTJluOy1eqQ6ldZ899p5JcDbBL7jVXDUBM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786118410; c=relaxed/simple; bh=9F4UfaGINl98C5kCrF1sOF3SRUu6YFq25kx2ExPyXsQ=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=bRgoK1KD0WoI/w2W1HBgc/paYWqJBPG1bZCasXVYIL3EwLqjF2SxNSjvCBL82y+EPQlFEvOUegDZ8CnMflE0yy9EhClLwbJ5lnUaT9m9NviBEVSVHRtSmFEiUrIH7dHODTCoHC5Agdt6TedFDWHdiQIf4yvGHgZwDUUNrvV4WDU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=RyvCBdTU; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=0BkuYEiM; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="RyvCBdTU"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="0BkuYEiM" Date: Fri, 07 Aug 2026 16:00:04 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1786118407; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Rl8WvkK5Gy5DXoIahUAjQpJ5AL0zE/gVvgUYn4/9bU8=; b=RyvCBdTUVY6Iwp+OzMPYlix99ofRZGncB/BqlLTDYutJN+/6VQEeJZfXRfeUwZvew2EIpo 9fPhpJDvY4Nv7fkoUlGvh+O06ayez0V6u+9i9gwpNsEQ5d0Xot9qEgVqOxjkHWaF+RiyJy Ugm/03nlLeqzi3IYxITLpd2HtC0LiMSb2NXjWLn6tahhlF2hCg2A+zb5NaWbAQ8+Opl+Sq MEAggh21ETY1jZFGOrlHgxJslBUyA1ENd8MDCu9dfj7Z1w4q3zHZIRM7UFtE312tyofmD9 F107pLSklJ+LaBAC6LzZoLwxCq8F/EDBy0Om+Wejnj8p3Wv0WxiDZyGXN23YbQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1786118407; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Rl8WvkK5Gy5DXoIahUAjQpJ5AL0zE/gVvgUYn4/9bU8=; b=0BkuYEiMpr+Tm5z1i+y8/17XGdNTH1gB1fe03Th7cW4SKwMNxBfe5lmzlBEXRrzPcyp2dg gH+lbNV3AsgHWpBg== From: "tip-bot2 for Dmitry Ilvokhin" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: locking/core] locking: Factor out queued_spin_release() Cc: Dmitry Ilvokhin , "Peter Zijlstra (Intel)" , Juergen Gross , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <178611840487.708.10386686607999550696.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the locking/core branch of tip: Commit-ID: 216c6c67f7f1292474de1a3d1ae7d1cb95514264 Gitweb: https://git.kernel.org/tip/216c6c67f7f1292474de1a3d1ae7d1cb9= 5514264 Author: Dmitry Ilvokhin AuthorDate: Tue, 04 Aug 2026 07:15:42=20 Committer: Peter Zijlstra CommitterDate: Fri, 07 Aug 2026 17:58:09 +02:00 locking: Factor out queued_spin_release() The contended_release tracepoint needs to hook queued_spin_unlock(), but architectures with a custom unlock define queued_spin_unlock() directly, leaving no single generic place to add the tracing. Introduce queued_spin_release() as the arch-overridable release primitive and make queued_spin_unlock() a generic wrapper around it. An architecture that only customizes the release can then override queued_spin_release() and inherit the generic wrapper. Rename the MIPS override to queued_spin_release() accordingly. x86 paravirt overrides queued_spin_unlock() directly and is left unchanged. No functional change intended. Signed-off-by: Dmitry Ilvokhin Signed-off-by: Peter Zijlstra (Intel) Acked-by: Juergen Gross Link: https://patch.msgid.link/b8daabae6469ad72cc784a911f6cc43a6d45df3a.178= 5778551.git.d@ilvokhin.com --- arch/mips/include/asm/spinlock.h | 6 +++--- include/asm-generic/qspinlock.h | 17 ++++++++++++++--- 2 files changed, 17 insertions(+), 6 deletions(-) diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinl= ock.h index 6ce2117..c349162 100644 --- a/arch/mips/include/asm/spinlock.h +++ b/arch/mips/include/asm/spinlock.h @@ -13,12 +13,12 @@ =20 #include =20 -#define queued_spin_unlock queued_spin_unlock +#define queued_spin_release queued_spin_release /** - * queued_spin_unlock - release a queued spinlock + * queued_spin_release - release a queued spinlock * @lock : Pointer to queued spinlock structure */ -static inline void queued_spin_unlock(struct qspinlock *lock) +static inline void queued_spin_release(struct qspinlock *lock) { /* This could be optimised with ARCH_HAS_MMIOWB */ mmiowb(); diff --git a/include/asm-generic/qspinlock.h b/include/asm-generic/qspinloc= k.h index bf47cca..ae45289 100644 --- a/include/asm-generic/qspinlock.h +++ b/include/asm-generic/qspinlock.h @@ -115,12 +115,12 @@ static __always_inline void queued_spin_lock(struct q= spinlock *lock) } #endif =20 -#ifndef queued_spin_unlock +#ifndef queued_spin_release /** - * queued_spin_unlock - release a queued spinlock + * queued_spin_release - release a queued spinlock * @lock : Pointer to queued spinlock structure */ -static __always_inline void queued_spin_unlock(struct qspinlock *lock) +static __always_inline void queued_spin_release(struct qspinlock *lock) { /* * unlock() needs release semantics: @@ -129,6 +129,17 @@ static __always_inline void queued_spin_unlock(struct = qspinlock *lock) } #endif =20 +#ifndef queued_spin_unlock +/** + * queued_spin_unlock - unlock a queued spinlock + * @lock : Pointer to queued spinlock structure + */ +static __always_inline void queued_spin_unlock(struct qspinlock *lock) +{ + queued_spin_release(lock); +} +#endif + #ifndef virt_spin_lock static __always_inline bool virt_spin_lock(struct qspinlock *lock) {