From nobody Fri Oct 2 12:21:44 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1AB5B372EF7; Fri, 31 Jul 2026 22:24:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785536652; cv=none; b=nazNlFagt0nRDHgWjapIsEb0I1F4b3/AoZ8rtvUIRmXEaTboGCa77jX3UJKL7KzLhAyK7bJ4zxTMUXqRgouiRJpajP+0QdoKgb6CbKuiHWzpOK5n3mkaZRfUqbbqVTVEIhE9+tM4MtP6SBn0Vtj4WfIbwULfOZ0EMT/JVrt0cxQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785536652; c=relaxed/simple; bh=Fk4dZM502P2SrrT4ycVwS02GsUz6oWdhTaWEu531lD4=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=AttUIy58kn43mmw9E3ce07rxy9lOc2MZf1jEbApQOxnJ25GSY/UCLXIDHyPbWa5yBS26xxU5II8OlksveAYGGR3xWQUlalqe/vjsRRlpvoFiSQyuClidegO7B5RQl9Ky5Ti/U5nvHXIje9UajLsNpYNRD27+t+xEhwWfBQ3CsAE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=q3owlE2B; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=PYZVh5Sa; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="q3owlE2B"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="PYZVh5Sa" Date: Fri, 31 Jul 2026 22:24:02 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1785536643; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Sw3Cy9u2jAyqTm5S4b7aXCbvZKzKUFQxmE5OVLEiAt8=; b=q3owlE2Bk7enfptqHfBb4ZGu5Gb9E9I012CmFhjeaLu4+3+cJyvUfGOXKsSTLB0GVGT7Jv TLcmNmolW5V9JoVI1kq1UY+EvHi3tt0PH32tvXGbf5hJpuCPxM3hr2dOVmNzQCkBmA93HD FAt5N4Zn9aOBtIypSUku09R/EK4jztYdbkkyxl4xyajsh298qB7H/B3WDbGBjhq/lPVjVO 6f7dMGxN3H6lE0/wJwUKzUpmxi1mOMPkG+3QYn/ZvJkeR1KW4yVKH8TQjtBIf/jGQ+W5fP m7OgfDn68M2kWKSZfftki7SBcRi4dFNRg3kJoZG5V5/x1pPfquMSVeBNf/w/0Q== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1785536643; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Sw3Cy9u2jAyqTm5S4b7aXCbvZKzKUFQxmE5OVLEiAt8=; b=PYZVh5SaFslgTKThPEbJVq0LeEqy8fKu9FTCXgPslVS4P6+lAavY0lRCU4psjxcrb/Iupq 3HjKBho3rKockZAA== From: "tip-bot2 for Ahmed S. Darwish" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cpu] x86/lib: Add CPUID(0x1) family and model calculation Cc: "Ahmed S. Darwish" , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260528153923.403473-11-darwi@linutronix.de> References: <20260528153923.403473-11-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <178553664233.112641.14984913031826055773.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/cpu branch of tip: Commit-ID: 21834b541d933d52a3359ba368645f375f8c9ad1 Gitweb: https://git.kernel.org/tip/21834b541d933d52a3359ba368645f375= f8c9ad1 Author: Ahmed S. Darwish AuthorDate: Thu, 28 May 2026 17:37:32 +02:00 Committer: Borislav Petkov (AMD) CommitterDate: Fri, 31 Jul 2026 13:57:04 -07:00 x86/lib: Add CPUID(0x1) family and model calculation The x86 library provides x86_family() and x86_model(). They take raw CPUID register output and calculate the CPU family and model from it. In follow-up work, the x86 subsystem will use APIs which access previously-parsed CPUID leafs structure instead of doing direct CPUID queri= es. These new APIs force using the auto generated leaf data types at . Introduce x86 family and model calculation functions that take these auto-generated data types. Refactor the original code so that no logic is duplicated. [ bp: Massage commit message, unbreak too long line. ] Signed-off-by: Ahmed S. Darwish Signed-off-by: Borislav Petkov (AMD) Link: https://patch.msgid.link/20260528153923.403473-11-darwi@linutronix.de --- arch/x86/include/asm/cpu.h | 6 +++++- arch/x86/lib/cpu.c | 45 +++++++++++++++++++++++-------------- 2 files changed, 35 insertions(+), 16 deletions(-) diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index 57a0786..0131307 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -7,7 +7,9 @@ #include #include #include + #include +#include =20 #ifndef CONFIG_SMP #define cpu_physical_id(cpu) boot_cpu_physical_apicid @@ -24,6 +26,10 @@ int mwait_usable(const struct cpuinfo_x86 *); unsigned int x86_family(unsigned int sig); unsigned int x86_model(unsigned int sig); unsigned int x86_stepping(unsigned int sig); + +unsigned int cpuid_family(const struct leaf_0x1_0 *l); +unsigned int cpuid_model(const struct leaf_0x1_0 *l); + #ifdef CONFIG_X86_BUS_LOCK_DETECT extern void __init sld_setup(struct cpuinfo_x86 *c); extern bool handle_user_split_lock(struct pt_regs *regs, long error_code); diff --git a/arch/x86/lib/cpu.c b/arch/x86/lib/cpu.c index 7ad6891..d39fba7 100644 --- a/arch/x86/lib/cpu.c +++ b/arch/x86/lib/cpu.c @@ -1,33 +1,36 @@ // SPDX-License-Identifier: GPL-2.0-only #include #include + #include +#include =20 -unsigned int x86_family(unsigned int sig) +static unsigned int __x86_family(unsigned int base_fam, unsigned int ext_f= am) { - unsigned int x86; + if (base_fam =3D=3D 0xf) + base_fam +=3D ext_fam; =20 - x86 =3D (sig >> 8) & 0xf; + return base_fam; +} =20 - if (x86 =3D=3D 0xf) - x86 +=3D (sig >> 20) & 0xff; +static unsigned int __x86_model(unsigned int family, unsigned int base_mod= el, + unsigned int ext_model) +{ + if (family >=3D 0x6) + base_model |=3D ext_model << 4; =20 - return x86; + return base_model; +} + +unsigned int x86_family(unsigned int sig) +{ + return __x86_family((sig >> 8) & 0xf, (sig >> 20) & 0xff); } EXPORT_SYMBOL_GPL(x86_family); =20 unsigned int x86_model(unsigned int sig) { - unsigned int fam, model; - - fam =3D x86_family(sig); - - model =3D (sig >> 4) & 0xf; - - if (fam >=3D 0x6) - model +=3D ((sig >> 16) & 0xf) << 4; - - return model; + return __x86_model(x86_family(sig), (sig >> 4) & 0xf, (sig >> 16) & 0xf); } EXPORT_SYMBOL_GPL(x86_model); =20 @@ -36,3 +39,13 @@ unsigned int x86_stepping(unsigned int sig) return sig & 0xf; } EXPORT_SYMBOL_GPL(x86_stepping); + +unsigned int cpuid_family(const struct leaf_0x1_0 *l) +{ + return __x86_family(l->base_family_id, l->ext_family); +} + +unsigned int cpuid_model(const struct leaf_0x1_0 *l) +{ + return __x86_model(cpuid_family(l), l->base_model, l->ext_model); +}