From nobody Fri Oct 2 12:20:45 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 146DC360ED6; Fri, 31 Jul 2026 22:24:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785536652; cv=none; b=co/7akdM1CDN3TkDBQLeVnvt1THtFm9hI7P5IChYrR/1ynmyUi+GEm3kvIv/YFo6ZbhfczDXhvQKlikzq8evykixl6eyab25F2e2ocas7IQLHRpkLWLJeBCwpPGOh9A0zD+H9ultCM/qbD0zDCN7WnxSSWRq0uHygXT6sjeVlfo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785536652; c=relaxed/simple; bh=rWJyzXlnA/O/XYjAuM8I+v944zKvSvVffBBo2aK+94k=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=Walw5d9FptoZjbXCHDRaXD8MB6RmR2acNfkIDwEXMKII1CWqSLSzYDIcnUp1VkveZZfA2Ab5YKGR+u+eZHyOUXGlRnR1ndIzCWCCYvgCqsfonisPLil0FSgpltZqeN4lS2bbvOrQPzz8uhXMiDqYz96UpuiCW3pjFglhzQnqZ6s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Yfv47U4w; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=LsCL1oUX; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Yfv47U4w"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="LsCL1oUX" Date: Fri, 31 Jul 2026 22:24:00 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1785536642; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HocshZ3jKEitxv8XQEH6ayUqCx530f4ZwTmMStuXBpA=; b=Yfv47U4wlXtOPhHSWoQ9tkF2arErK5HPYVzjiHCKzgQitLd4ZEVaEFjAGJDVaX4e232kTJ 0nvrltyly2CguFZvlQUA0xO0SdZbxRABTX91socd6aNyoHb64DM658AySsgvHMO9aFgXx1 oDyGWFtQCW6viSWCQ/gtL8GaIVqO4Eraa61NHm1SlUMWmTgZfhX1Tzl+PeGE3MabXNfP1A C6vxDwfUBtZyg0xKg8cB6r0V6dqlVizcG2hJvB0FeuF6e3ncMs5LvdEhXnfAziDIdOmgy7 BNxnQ5C+Ev3bgoNECjtOIKXyfmRI2jv9FKqVbtn0NZlYGP7kmDLn4KH+1S0HAg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1785536642; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HocshZ3jKEitxv8XQEH6ayUqCx530f4ZwTmMStuXBpA=; b=LsCL1oUX4FV+P82YImmkr0Swc+ALQ49lgeqnTdkmTjqSS6vOAHC/3vpbv9OotgTFRmn1+J SMZGk19uegDUV6BQ== From: "tip-bot2 for Ahmed S. Darwish" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cpu] x86/cpu: Use parsed CPUID(0x1) Cc: "Ahmed S. Darwish" , "Borislav Petkov (AMD)" , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260528153923.403473-12-darwi@linutronix.de> References: <20260528153923.403473-12-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <178553664079.112641.17437141328970333356.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/cpu branch of tip: Commit-ID: 173dfdce3ba8b7d54d2476f76f723438dbaff391 Gitweb: https://git.kernel.org/tip/173dfdce3ba8b7d54d2476f76f723438d= baff391 Author: Ahmed S. Darwish AuthorDate: Thu, 28 May 2026 17:37:33 +02:00 Committer: Borislav Petkov (AMD) CommitterDate: Fri, 31 Jul 2026 14:52:55 -07:00 x86/cpu: Use parsed CPUID(0x1) On early boot CPU detection, use parsed CPUID(0x1) instead of a direct CPUID query. Beside the parser's centralization benefits, use the auto generated CPUID d= ata types, and their C99 bitfields, instead of doing ugly bitwise operations. [ bp: - Use a common code pattern for l1 of fetching and checking it right after that - flip the check to save an indentation level - align assignments vertically. ] Signed-off-by: Ahmed S. Darwish Signed-off-by: Borislav Petkov (AMD) Link: https://patch.msgid.link/20260528153923.403473-12-darwi@linutronix.de --- arch/x86/kernel/cpu/common.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index e658f76..695319f 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -943,6 +943,7 @@ void get_cpu_vendor(struct cpuinfo_x86 *c) void cpu_detect(struct cpuinfo_x86 *c) { const struct leaf_0x0_0 *l0 =3D cpuid_leaf(c, 0x0); + const struct leaf_0x1_0 *l1; =20 c->cpuid_level =3D l0->max_std_leaf; *(u32 *)&c->x86_vendor_id[0] =3D l0->cpu_vendorid_0; @@ -950,19 +951,18 @@ void cpu_detect(struct cpuinfo_x86 *c) *(u32 *)&c->x86_vendor_id[8] =3D l0->cpu_vendorid_2; =20 c->x86 =3D 4; - /* Intel-defined flags: level 0x00000001 */ - if (c->cpuid_level >=3D 0x00000001) { - u32 junk, tfms, cap0, misc; =20 - cpuid(0x00000001, &tfms, &misc, &junk, &cap0); - c->x86 =3D x86_family(tfms); - c->x86_model =3D x86_model(tfms); - c->x86_stepping =3D x86_stepping(tfms); + l1 =3D cpuid_leaf(c, 0x1); + if (!l1) + return; =20 - if (cap0 & (1<<19)) { - c->x86_clflush_size =3D ((misc >> 8) & 0xff) * 8; - c->x86_cache_alignment =3D c->x86_clflush_size; - } + c->x86 =3D cpuid_family(l1); + c->x86_model =3D cpuid_model(l1); + c->x86_stepping =3D l1->stepping; + + if (l1->clflush) { + c->x86_clflush_size =3D l1->clflush_size * 8; + c->x86_cache_alignment =3D c->x86_clflush_size; } } =20