From nobody Sat Jun 13 23:26:35 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C5AEE31DDBB; Sat, 13 Jun 2026 14:33:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781361194; cv=none; b=uSVDklPiBui4OKkKBDolaUR5Kixpy29ubbWKcf6mTDtozBDXWwWCZW0y85Sx+TV2d/pZOf+Co7BF1gW25vEKl9ZG+nZuZJMk+67xyHyi7ybuYp2wOCNq8qLu7A2C5fuy7zF5B1MEKsfse8F41J3eBC9NrjC7dt7AguID0leGrho= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781361194; c=relaxed/simple; bh=tBf/1EdMyUIPuZDEWbSHw6bPBwBJGH62BvAf6jPWqSU=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=Gbgk5ZsXRIC8KUP74gvwQJxQtGfvlyX+Vk9d9Kb1v1sUvxoDAzhNYqQHrehjx5clyyFmCmpNhHVzIZGAQJgPhV3abfdG9y8yIxY78//JoyBUdXDo7RZVVS4HaRh8RGPxkjrUGT4XRqI78QGcx00hl3a/FFbZvceN+ZQvck+qqes= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=Azk65xQK; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=CVKZZ1eL; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Azk65xQK"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="CVKZZ1eL" Date: Sat, 13 Jun 2026 14:33:05 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1781361187; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wb3DZaZRT9+IkC5p3D5fDaWfrU8X4sm/sBilCVhGF3Y=; b=Azk65xQKvULdpvIxu8w2kpJv8lSKKDf/Nmap8st4aNGOH5VoVGm5i6Rj2fBiSjJjCtWWQR hJK3M5maFtXgICLQb0F+BA/RMtWp3H0+3RT70fgImX85iBgEDK2q5FfnKWMwx7+I8N37pS dYZxxjcnqVd5L101xhEZ2Q39GZ7jVa3SETSEpbiOPjCAiyDQgtHmd/xEemo4X4JEbyPDfD mshxTza8MmtQf0WfVU33GVeHZL/7JpcmY+Iz93EaLisR9+iMvEat5cQOVfTAU59MEiKddX PhmxAYEz7XYUa+yJFhgsMa6M7rONWVmQpLGQeVoY+gH3GmxnoiCyj/7BPAKEfQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1781361187; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wb3DZaZRT9+IkC5p3D5fDaWfrU8X4sm/sBilCVhGF3Y=; b=CVKZZ1eLIGFfmOW2L20OOpCtFWSn/jk0krl16+8AJtAD+JMz40ogs1hmp9ezp/cH0Y9EoI 8zHOfR3sbzpaZ1Ag== From: "tip-bot2 for Markus Schneider-Pargmann (TI)" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: timers/clocksource] clocksource/drivers/timer-ti-dm: Add clocksource support Cc: "Markus Schneider-Pargmann (TI)" , Daniel Lezcano , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260508-topic-ti-dm-clkevt-v6-16-v5-2-61d546a0aff9@baylibre.com> References: <20260508-topic-ti-dm-clkevt-v6-16-v5-2-61d546a0aff9@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <178136118597.1650852.2924579907696443774.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the timers/clocksource branch of = tip: Commit-ID: b8eeeca5545659c5d67264b151784e74b18c8254 Gitweb: https://git.kernel.org/tip/b8eeeca5545659c5d67264b151784e74b= 18c8254 Author: Markus Schneider-Pargmann (TI) AuthorDate: Fri, 08 May 2026 15:39:28 +02:00 Committer: Daniel Lezcano CommitterDate: Wed, 03 Jun 2026 10:05:47 +02:00 clocksource/drivers/timer-ti-dm: Add clocksource support Add support for using the TI Dual-Mode Timer as a clocksource. The driver automatically picks the first timer that is marked as always-on on with the "ti,timer-alwon" property to be the clocksource. The timer can then be used for CPU independent time keeping. Signed-off-by: Markus Schneider-Pargmann (TI) Signed-off-by: Daniel Lezcano Link: https://patch.msgid.link/20260508-topic-ti-dm-clkevt-v6-16-v5-2-61d54= 6a0aff9@baylibre.com --- drivers/clocksource/timer-ti-dm.c | 103 +++++++++++++++++++++++++++++- 1 file changed, 103 insertions(+) diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-= ti-dm.c index 793e7cd..98cc343 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -20,6 +20,7 @@ =20 #include #include +#include #include #include #include @@ -29,6 +30,7 @@ #include #include #include +#include =20 #include #include @@ -148,6 +150,14 @@ static u32 omap_reserved_systimers; static LIST_HEAD(omap_timer_list); static DEFINE_SPINLOCK(dm_timer_lock); =20 +struct dmtimer_clocksource { + struct clocksource dev; + struct dmtimer *timer; + unsigned int loadval; +}; + +static void __iomem *omap_dm_timer_sched_clock_counter; + enum { REQUEST_ANY =3D 0, REQUEST_BY_ID, @@ -1185,6 +1195,92 @@ static const struct dev_pm_ops omap_dm_timer_pm_ops = =3D { =20 static const struct of_device_id omap_timer_match[]; =20 +static struct dmtimer_clocksource *omap_dm_timer_to_clocksource(struct clo= cksource *cs) +{ + return container_of(cs, struct dmtimer_clocksource, dev); +} + +static u64 omap_dm_timer_read_cycles(struct clocksource *cs) +{ + struct dmtimer_clocksource *clksrc =3D omap_dm_timer_to_clocksource(cs); + struct dmtimer *timer =3D clksrc->timer; + + return (u64)__omap_dm_timer_read_counter(timer); +} + +static u64 notrace omap_dm_timer_read_sched_clock(void) +{ + /* Posted mode is not active here, so we can read directly */ + return readl_relaxed(omap_dm_timer_sched_clock_counter); +} + +static void omap_dm_timer_clocksource_suspend(struct clocksource *cs) +{ + struct dmtimer_clocksource *clksrc =3D omap_dm_timer_to_clocksource(cs); + struct dmtimer *timer =3D clksrc->timer; + + clksrc->loadval =3D __omap_dm_timer_read_counter(timer); + __omap_dm_timer_stop(timer); +} + +static void omap_dm_timer_clocksource_resume(struct clocksource *cs) +{ + struct dmtimer_clocksource *clksrc =3D omap_dm_timer_to_clocksource(cs); + struct dmtimer *timer =3D clksrc->timer; + + dmtimer_write(timer, OMAP_TIMER_COUNTER_REG, clksrc->loadval); + dmtimer_write(timer, OMAP_TIMER_CTRL_REG, OMAP_TIMER_CTRL_ST | OMAP_TIMER= _CTRL_AR); +} + +static void omap_dm_timer_clocksource_unregister(void *data) +{ + struct clocksource *cs =3D data; + + clocksource_unregister(cs); +} + +static int omap_dm_timer_setup_clocksource(struct dmtimer *timer) +{ + struct device *dev =3D &timer->pdev->dev; + struct dmtimer_clocksource *clksrc; + int err; + + __omap_dm_timer_init_regs(timer); + + timer->reserved =3D 1; + + clksrc =3D devm_kzalloc(dev, sizeof(*clksrc), GFP_KERNEL); + if (!clksrc) + return -ENOMEM; + + clksrc->timer =3D timer; + + clksrc->dev.name =3D "omap_dm_timer"; + clksrc->dev.rating =3D 300; + clksrc->dev.read =3D omap_dm_timer_read_cycles; + clksrc->dev.mask =3D CLOCKSOURCE_MASK(32); + clksrc->dev.flags =3D CLOCK_SOURCE_IS_CONTINUOUS; + clksrc->dev.suspend =3D omap_dm_timer_clocksource_suspend; + clksrc->dev.resume =3D omap_dm_timer_clocksource_resume; + + dmtimer_write(timer, OMAP_TIMER_COUNTER_REG, 0); + dmtimer_write(timer, OMAP_TIMER_LOAD_REG, 0); + dmtimer_write(timer, OMAP_TIMER_CTRL_REG, OMAP_TIMER_CTRL_ST | OMAP_TIMER= _CTRL_AR); + + omap_dm_timer_sched_clock_counter =3D timer->func_base + _OMAP_TIMER_COUN= TER_OFFSET; + sched_clock_register(omap_dm_timer_read_sched_clock, 32, timer->fclk_rate= ); + + err =3D clocksource_register_hz(&clksrc->dev, timer->fclk_rate); + if (err) + return dev_err_probe(dev, err, "Could not register as clocksource\n"); + + err =3D devm_add_action_or_reset(dev, omap_dm_timer_clocksource_unregiste= r, &clksrc->dev); + if (err) + return dev_err_probe(dev, err, "Could not register clocksource_unregiste= r action\n"); + + return 0; +} + /** * omap_dm_timer_probe - probe function called for every registered device * @pdev: pointer to current timer platform device @@ -1272,6 +1368,13 @@ static int omap_dm_timer_probe(struct platform_devic= e *pdev) =20 timer->pdev =3D pdev; =20 + if (timer->capability & OMAP_TIMER_ALWON && !IS_ERR_OR_NULL(timer->fclk) = && + !omap_dm_timer_sched_clock_counter) { + ret =3D omap_dm_timer_setup_clocksource(timer); + if (ret) + return ret; + } + pm_runtime_enable(dev); =20 if (!timer->reserved) {