From nobody Sat Jun 13 23:23:42 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 913183112AB; Sat, 13 Jun 2026 14:33:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781361191; cv=none; b=n1BLIYNBzTiZk186nxoQiGn4ijDDq2YFlqhfsDdlCzFDGRFy86uOd/qV695XitNDBcuF0PY8iszY9npMdubIlV1D68xFQC1HLXtBS3q+CCCakW+2T2fZqZ7Oe7RuEmMyYlRD9nfF5efeSEgh5g2DbQkssTTuN+RYbKIoYHeTBBA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781361191; c=relaxed/simple; bh=VZ8LToTEbVNIANZngjFTu4PehyKE3M0GAgDsjBitYJc=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=HivuZNCY7AE+kz+CKHMUApudstsG0R6rg7noc4ew5H8C8o8U2FOC5hSl5HqCPyUxJZ6yiwZ+aSL89IEBMQ/kXU3XAfK6HSYUbHT/KY+/IGmePdCBQInejU49vFyvRkuoXxQe4oO0HqI3jCzhaxMHi/a1vHDN1mEUwtOfJgSXlMk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=xcrRlrCO; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=rXW75nZ3; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="xcrRlrCO"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="rXW75nZ3" Date: Sat, 13 Jun 2026 14:33:04 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1781361186; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6nnCdu+Ijxndx4n/ZVjQU84ElHy2E2L/6EsZo2rMpeU=; b=xcrRlrCOeENKM69Yt2snWBZHJKe7BbOxw+DP+eK1Y1w1RSmtXru3teDsCbGDwqG3x1usbj Cn7IjCLTDTw/36CbU1iB08Biiia4x63zoApAjYXaus12tDlvxi0bqPgBY8n80ZE8YUzyfk QqZxMRmFnM8W9oWSHAvK9oRf9dUL+Wx/gE/uRNHjHGvOhVrIPx1a2eNWpZHCAWWLhghHsr RpfAiNpQ4hWulUK/AAZFRVLtFAmOWXyYJe5KqYp7GpoyfjPCchfK+T7UiFqsxRf01nwU4i VbqeiHYpRn63qKmobDXyljJB+fFHzZjmiwlUgZnemK8D5/3topUIKwtuzqE+4A== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1781361186; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6nnCdu+Ijxndx4n/ZVjQU84ElHy2E2L/6EsZo2rMpeU=; b=rXW75nZ3l6iQ826phQlzu7hHQnu5KVqEtCg2kvDjZ4/SORQb8mFA6izWjUyUhDgFZ/Tp6W 9Zp5lfFLzm6c6LAw== From: "tip-bot2 for Markus Schneider-Pargmann (TI)" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: timers/clocksource] clocksource/drivers/timer-ti-dm: Add clockevent support Cc: "Markus Schneider-Pargmann (TI)" , Daniel Lezcano , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260508-topic-ti-dm-clkevt-v6-16-v5-3-61d546a0aff9@baylibre.com> References: <20260508-topic-ti-dm-clkevt-v6-16-v5-3-61d546a0aff9@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <178136118468.1650852.9618700563068636655.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the timers/clocksource branch of = tip: Commit-ID: e393cca0388c2fe6f67d4658b2e05f57e244285b Gitweb: https://git.kernel.org/tip/e393cca0388c2fe6f67d4658b2e05f57e= 244285b Author: Markus Schneider-Pargmann (TI) AuthorDate: Fri, 08 May 2026 15:39:29 +02:00 Committer: Daniel Lezcano CommitterDate: Wed, 03 Jun 2026 10:06:02 +02:00 clocksource/drivers/timer-ti-dm: Add clockevent support Add support for using the TI Dual-Mode Timer for clockevents. The second always on device with the "ti,timer-alwon" property is selected to be used for clockevents. The first one is used as clocksource. This allows clockevents to be setup independently of the CPU. Signed-off-by: Markus Schneider-Pargmann (TI) Signed-off-by: Daniel Lezcano Link: https://patch.msgid.link/20260508-topic-ti-dm-clkevt-v6-16-v5-3-61d54= 6a0aff9@baylibre.com --- drivers/clocksource/timer-ti-dm.c | 124 +++++++++++++++++++++++++++-- 1 file changed, 119 insertions(+), 5 deletions(-) diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-= ti-dm.c index 98cc343..bd06afb 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -21,8 +21,10 @@ #include #include #include +#include #include #include +#include #include #include #include @@ -156,6 +158,13 @@ struct dmtimer_clocksource { unsigned int loadval; }; =20 +struct omap_dm_timer_clockevent { + struct clock_event_device dev; + struct dmtimer *timer; + u32 period; +}; + +static bool omap_dm_timer_clockevent_setup; static void __iomem *omap_dm_timer_sched_clock_counter; =20 enum { @@ -1281,6 +1290,106 @@ static int omap_dm_timer_setup_clocksource(struct d= mtimer *timer) return 0; } =20 +static struct omap_dm_timer_clockevent *to_dm_timer_clockevent(struct cloc= k_event_device *evt) +{ + return container_of(evt, struct omap_dm_timer_clockevent, dev); +} + +static int omap_dm_timer_evt_set_next_event(unsigned long cycles, + struct clock_event_device *evt) +{ + struct omap_dm_timer_clockevent *clkevt =3D to_dm_timer_clockevent(evt); + struct dmtimer *timer =3D clkevt->timer; + + dmtimer_write(timer, OMAP_TIMER_COUNTER_REG, 0xffffffff - cycles); + dmtimer_write(timer, OMAP_TIMER_CTRL_REG, OMAP_TIMER_CTRL_ST); + + return 0; +} + +static int omap_dm_timer_evt_shutdown(struct clock_event_device *evt) +{ + struct omap_dm_timer_clockevent *clkevt =3D to_dm_timer_clockevent(evt); + struct dmtimer *timer =3D clkevt->timer; + + __omap_dm_timer_stop(timer); + + return 0; +} + +static int omap_dm_timer_evt_set_periodic(struct clock_event_device *evt) +{ + struct omap_dm_timer_clockevent *clkevt =3D to_dm_timer_clockevent(evt); + struct dmtimer *timer =3D clkevt->timer; + + omap_dm_timer_evt_shutdown(evt); + + omap_dm_timer_set_load(&timer->cookie, clkevt->period); + dmtimer_write(timer, OMAP_TIMER_COUNTER_REG, clkevt->period); + dmtimer_write(timer, OMAP_TIMER_CTRL_REG, + OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST); + + return 0; +} + +static irqreturn_t omap_dm_timer_evt_interrupt(int irq, void *dev_id) +{ + struct omap_dm_timer_clockevent *clkevt =3D dev_id; + struct dmtimer *timer =3D clkevt->timer; + + __omap_dm_timer_write_status(timer, OMAP_TIMER_INT_OVERFLOW); + + clkevt->dev.event_handler(&clkevt->dev); + + return IRQ_HANDLED; +} + +static int omap_dm_timer_setup_clockevent(struct dmtimer *timer) +{ + struct device *dev =3D &timer->pdev->dev; + struct omap_dm_timer_clockevent *clkevt; + int ret; + + clkevt =3D devm_kzalloc(dev, sizeof(*clkevt), GFP_KERNEL); + if (!clkevt) + return -ENOMEM; + + timer->reserved =3D 1; + clkevt->timer =3D timer; + + clkevt->dev.name =3D "omap_dm_timer"; + clkevt->dev.features =3D CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; + clkevt->dev.rating =3D 300; + clkevt->dev.set_next_event =3D omap_dm_timer_evt_set_next_event; + clkevt->dev.set_state_shutdown =3D omap_dm_timer_evt_shutdown; + clkevt->dev.set_state_periodic =3D omap_dm_timer_evt_set_periodic; + clkevt->dev.set_state_oneshot =3D omap_dm_timer_evt_shutdown; + clkevt->dev.set_state_oneshot_stopped =3D omap_dm_timer_evt_shutdown; + clkevt->dev.tick_resume =3D omap_dm_timer_evt_shutdown; + clkevt->dev.cpumask =3D cpu_possible_mask; + clkevt->period =3D 0xffffffff - DIV_ROUND_CLOSEST(timer->fclk_rate, HZ); + + __omap_dm_timer_init_regs(timer); + __omap_dm_timer_stop(timer); + __omap_dm_timer_enable_posted(timer); + + ret =3D devm_request_irq(dev, timer->irq, omap_dm_timer_evt_interrupt, + IRQF_TIMER, "omap_dm_timer_clockevent", clkevt); + if (ret) { + dev_err(dev, "Failed to request interrupt: %d\n", ret); + return ret; + } + + __omap_dm_timer_int_enable(timer, OMAP_TIMER_INT_OVERFLOW); + + clockevents_config_and_register(&clkevt->dev, timer->fclk_rate, + 3, + 0xffffffff); + + omap_dm_timer_clockevent_setup =3D true; + return 0; +} + /** * omap_dm_timer_probe - probe function called for every registered device * @pdev: pointer to current timer platform device @@ -1368,11 +1477,16 @@ static int omap_dm_timer_probe(struct platform_devi= ce *pdev) =20 timer->pdev =3D pdev; =20 - if (timer->capability & OMAP_TIMER_ALWON && !IS_ERR_OR_NULL(timer->fclk) = && - !omap_dm_timer_sched_clock_counter) { - ret =3D omap_dm_timer_setup_clocksource(timer); - if (ret) - return ret; + if (timer->capability & OMAP_TIMER_ALWON && !IS_ERR_OR_NULL(timer->fclk))= { + if (!omap_dm_timer_sched_clock_counter) { + ret =3D omap_dm_timer_setup_clocksource(timer); + if (ret) + return ret; + } else if (!omap_dm_timer_clockevent_setup) { + ret =3D omap_dm_timer_setup_clockevent(timer); + if (ret) + return ret; + } } =20 pm_runtime_enable(dev);