From nobody Mon Jun 8 09:49:34 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EFD5340315E; Wed, 3 Jun 2026 20:32:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780518753; cv=none; b=dJmr8KZwPwXiY0uxM7jTSktmZU9RVqbEwOUoMWOhCVwMAM8tDnCS8OAQxPpghXG0h2MOjDAm1yfEWKGpgOznb1NZ0aR5s5mHq+KSS1IRBaz5mEXJqrPVmSG7qMJ8eEYlLx3uDYAQ9nl+rWXDTBMDvnqEBGgjIwE56p6cFwogeW8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780518753; c=relaxed/simple; bh=+L79NeLmRzKqXXQFIGUY9J6SSIISHXDd3d85OrrFlYk=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=QSYAkUcxZkcRWtyC93/nkoxdn9tsMXwJmQSMV7Ef1oDFAH5rJVXISUtUl2jD7uHYd8FmAb018aH1I8fhgBzbIcBqQkq5EeDjhhcb5kDOAiwBqEjVUASURdip/tVe889RyuFMPu52Yx8X869EtIy99792z225CIZkugJFo/Do97g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=nLTi8l+g; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=9Y/HnRqz; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="nLTi8l+g"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="9Y/HnRqz" Date: Wed, 03 Jun 2026 20:32:29 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1780518750; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UMrCQwr8pp/McriVdSdoO77s0skfr3i/n7cnvGwXBxM=; b=nLTi8l+givzBgFyT58KzEwA1jJVnsCQ03Idu7M9JztuQYrwB+t0OhLEmkm2zMiAzXDwGph cXg/DQQ9wEZYxNtDEWXgPm1JAqiWCk4TPqtS8XF2Y6W7hTe6A/R310BrRhko9UKFQ/ptrB 3UbMiYPZ5JUF1KscMzIiXqRnhVnIuDWiIUElBxh3/Zt2NrQBVhCepDfs8LJfi/CTv3KWSi kmbmk2/VmZYkqNb2hKAYAFnY1/x7e59rxHuqOUBUtn+pLScdPN0FhsPjDU76cbktqeUtQa 6ZE3kzzrVeiCVCn7OmCO/U3ME2aeIOcBVqTyQGTnNV9dboEYJ7dHZ+HHE/l2sg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1780518750; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UMrCQwr8pp/McriVdSdoO77s0skfr3i/n7cnvGwXBxM=; b=9Y/HnRqzGMDZIH1c3mx6fy+xS8VXHOe5aW3MHnl0pNx6hfupJYMvTvQfkbsSlkdfl/KOZ+ Oz+sEBSV84tRnHBg== From: "tip-bot2 for Tianyang Zhang" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/drivers] Docs/LoongArch: Add advanced extended IRQ model Cc: Tianyang Zhang , Thomas Gleixner , Huacai Chen , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260513012839.2856463-2-zhangtianyang@loongson.cn> References: <20260513012839.2856463-2-zhangtianyang@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <178051874920.710.6070236161445226440.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/drivers branch of tip: Commit-ID: 89bb21e9b57defa9a33ff01020d44f3fd6802026 Gitweb: https://git.kernel.org/tip/89bb21e9b57defa9a33ff01020d44f3fd= 6802026 Author: Tianyang Zhang AuthorDate: Wed, 13 May 2026 09:28:32 +08:00 Committer: Thomas Gleixner CommitterDate: Wed, 03 Jun 2026 22:28:11 +02:00 Docs/LoongArch: Add advanced extended IRQ model Introduce a new advanced extended interrupt model with redirect interrupt controllers. When the redirect interrupt controller is enabled, the routing target of MSI interrupts is no longer a specific CPU and vector number, but a specific redirect entry. The actual CPU and vector number used are described by the redirect entry. Signed-off-by: Tianyang Zhang Signed-off-by: Thomas Gleixner Acked-by: Huacai Chen Link: https://patch.msgid.link/20260513012839.2856463-2-zhangtianyang@loong= son.cn --- Documentation/arch/loongarch/irq-chip-model.rst | 35 ++= +++++++++++++++++++++++++++++++++ Documentation/translations/zh_CN/arch/loongarch/irq-chip-model.rst | 34 ++= ++++++++++++++++++++++++++++++++ 2 files changed, 69 insertions(+) diff --git a/Documentation/arch/loongarch/irq-chip-model.rst b/Documentatio= n/arch/loongarch/irq-chip-model.rst index 8f5c334..774d40d 100644 --- a/Documentation/arch/loongarch/irq-chip-model.rst +++ b/Documentation/arch/loongarch/irq-chip-model.rst @@ -181,6 +181,41 @@ go to PCH-PIC/PCH-LPC and gathered by EIOINTC, and the= n go to CPUINTC directly:: | Devices | +---------+ =20 +Advanced Extended IRQ model (with redirection) +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interru= pt go +to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, PCH-MSI interrupt= s go +to REDIRECT for remapping it to AVECINTC, and then go to CPUINTC directly,= while +all other devices interrupts go to PCH-PIC/PCH-LPC and gathered by EIOINTC= , and +then go to CPUINTC directly:: + + +-----+ +-----------------------+ +-------+ + | IPI | --> | CPUINTC | <-- | Timer | + +-----+ +-----------------------+ +-------+ + ^ ^ ^ + | | | + | +----------+ | + +---------+ | AVECINTC | +---------+ +-------+ + | EIOINTC | +----------+ | LIOINTC | <-- | UARTs | + +---------+ | REDIRECT | +---------+ +-------+ + ^ +----------+ + | ^ + | | + +---------+ +---------+ + | PCH-PIC | | PCH-MSI | + +---------+ +---------+ + ^ ^ ^ + | | | + +---------+ +---------+ +---------+ + | Devices | | PCH-LPC | | Devices | + +---------+ +---------+ +---------+ + ^ + | + +---------+ + | Devices | + +---------+ + ACPI-related definitions =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 diff --git a/Documentation/translations/zh_CN/arch/loongarch/irq-chip-model= .rst b/Documentation/translations/zh_CN/arch/loongarch/irq-chip-model.rst index d4ff80d..87b58ae 100644 --- a/Documentation/translations/zh_CN/arch/loongarch/irq-chip-model.rst +++ b/Documentation/translations/zh_CN/arch/loongarch/irq-chip-model.rst @@ -174,6 +174,40 @@ CPU=E4=B8=B2=E5=8F=A3=EF=BC=88UARTs=EF=BC=89=E4=B8=AD= =E6=96=AD=E5=8F=91=E9=80=81=E5=88=B0LIOINTC=EF=BC=8CPCH-MSI=E4=B8=AD=E6=96= =AD=E5=8F=91=E9=80=81=E5=88=B0AVECINTC=EF=BC=8C | Devices | +---------+ =20 +=E9=AB=98=E7=BA=A7=E6=89=A9=E5=B1=95IRQ=E6=A8=A1=E5=9E=8B (=E5=B8=A6=E9=87= =8D=E5=AE=9A=E5=90=91) +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D + +=E5=9C=A8=E8=BF=99=E7=A7=8D=E6=A8=A1=E5=9E=8B=E9=87=8C=E9=9D=A2=EF=BC=8CIP= I=EF=BC=88Inter-Processor Interrupt=EF=BC=89=E5=92=8CCPU=E6=9C=AC=E5=9C=B0= =E6=97=B6=E9=92=9F=E4=B8=AD=E6=96=AD=E7=9B=B4=E6=8E=A5=E5=8F=91=E9=80=81=E5= =88=B0CPUINTC=EF=BC=8C +CPU=E4=B8=B2=E5=8F=A3=EF=BC=88UARTs=EF=BC=89=E4=B8=AD=E6=96=AD=E5=8F=91=E9= =80=81=E5=88=B0LIOINTC=EF=BC=8CPCH-MSI=E4=B8=AD=E6=96=AD=E9=A6=96=E5=85=88= =E5=8F=91=E9=80=81=E5=88=B0REDIRECT=E6=A8=A1=E5=9D=97,=E5=AE=8C=E6=88=90=E9= =87=8D=E5=AE=9A=E5=90=91=E5=90=8E=E5=8F=91 +=E9=80=81=E5=88=B0AVECINTC=EF=BC=8C=E8=80=8C=E5=90=8E=E9=80=9A=E8=BF=87AVE= CINTC=E7=9B=B4=E6=8E=A5=E9=80=81=E8=BE=BECPUINTC=EF=BC=8C=E8=80=8C=E5=85=B6= =E4=BB=96=E6=89=80=E6=9C=89=E8=AE=BE=E5=A4=87=E7=9A=84=E4=B8=AD=E6=96=AD=E5= =88=99=E5=88=86=E5=88=AB=E5=8F=91=E9=80=81=E5=88=B0=E6=89=80=E8=BF=9E +=E6=8E=A5=E7=9A=84PCH-PIC/PCH-LPC=EF=BC=8C=E7=84=B6=E5=90=8E=E7=94=B1EIOIN= TC=E7=BB=9F=E4=B8=80=E6=94=B6=E9=9B=86=EF=BC=8C=E5=86=8D=E7=9B=B4=E6=8E=A5= =E5=88=B0=E8=BE=BECPUINTC:: + + +-----+ +-----------------------+ +-------+ + | IPI | --> | CPUINTC | <-- | Timer | + +-----+ +-----------------------+ +-------+ + ^ ^ ^ + | | | + | +----------+ | + +---------+ | AVECINTC | +---------+ +-------+ + | EIOINTC | +----------+ | LIOINTC | <-- | UARTs | + +---------+ | REDIRECT | +---------+ +-------+ + ^ +----------+ + | ^ + | | + +---------+ +---------+ + | PCH-PIC | | PCH-MSI | + +---------+ +---------+ + ^ ^ ^ + | | | + +---------+ +---------+ +---------+ + | Devices | | PCH-LPC | | Devices | + +---------+ +---------+ +---------+ + ^ + | + +---------+ + | Devices | + +---------+ + ACPI=E7=9B=B8=E5=85=B3=E7=9A=84=E5=AE=9A=E4=B9=89 =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20