From nobody Mon Jun 8 09:49:28 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C1F193DA5AE; Wed, 3 Jun 2026 20:32:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780518752; cv=none; b=XrCORIvAJVZ6B6AdorA/1RXXoHGNsGeBSp7ph0I8MCKFM/p9GmqVJd6SiH6lvnBmJWlrbP+/mKjc2tn93fn0yqR5uhYUoywXxEYO/b+oj2y5XDAmEzbahg4VqRD8g+zgW+0TlpKGl6WyrUgBolpPjU6PsVbywe6hC3Qt741OftM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780518752; c=relaxed/simple; bh=sDlZ27RU2LoRwxUp/R3WQwwF/bgvFvCNBsEVGMmPa0Q=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=eUrdQx3HTtBY5pm9ta4OZi1iySdQ7cpi5qEZ9/XwCYmPdHVkEBE87tbZdWUHOzuxeHOY2w7/4RKt4PXEMr76Hqan0zOiLvzB0FHwGw+emuQUeBzyVzzqhSnLS7L0H3FQdZp4xDoAsJchHIeYRTGvV+8nCmowHbkMO1cCJOi1Tfs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=kJUCIVqq; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=rvfkPq8W; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="kJUCIVqq"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="rvfkPq8W" Date: Wed, 03 Jun 2026 20:32:27 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1780518749; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8DZToDA6+n5uex148jlIxFPQMBuHD+cBOgSYuhl1Fys=; b=kJUCIVqqVQFZjW2hfW0w0pt0i4EiIw3w9iQ/3slTwEr1tW4QATGLfoz1Flfiyo9ki4fiZc 2hqWK/Cmt7WNtWKamvs4Qr/qGxKn+n2FAir9UiCsVEj0+qpfhmbT6j+LNW0GjfajgjnQgs UrUGJDeue4fPvgN1rj27AYYkWJULN/G1mEL7zCIHCfvbE41GRDIMIRFSfCV4iiG7DwQyeP MNK8UfF303ksysk0QhoIcGQxTlV3+cKNiCCkxB4F7gWTNGa43KkeRl0LjzvY7cKz+yVyU6 d+Dpa+MMRLKScWARyD7s+ZCCIKPf00mk9nDaA4NBEVKB2yhql6Ibdl/3KUX2eQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1780518749; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8DZToDA6+n5uex148jlIxFPQMBuHD+cBOgSYuhl1Fys=; b=rvfkPq8Wqb89wbqv21HSpvt+bxNpJQFLOgMEdoOrEubRBAgCxPCdKzRjsCR2In/Hd9asoK ceNc7qyChWURu6DA== From: "tip-bot2 for Tianyang Zhang" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/drivers] irqchip/loongarch-avec: Prepare for interrupt redirection support Cc: Tianyang Zhang , Thomas Gleixner , Huacai Chen , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260513012839.2856463-3-zhangtianyang@loongson.cn> References: <20260513012839.2856463-3-zhangtianyang@loongson.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <178051874766.710.12046548979624633508.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/drivers branch of tip: Commit-ID: 4b522d3cf4777531023c6d18679ab5a5d3552c04 Gitweb: https://git.kernel.org/tip/4b522d3cf4777531023c6d18679ab5a5d= 3552c04 Author: Tianyang Zhang AuthorDate: Wed, 13 May 2026 09:28:33 +08:00 Committer: Thomas Gleixner CommitterDate: Wed, 03 Jun 2026 22:28:11 +02:00 irqchip/loongarch-avec: Prepare for interrupt redirection support Interrupt redirection support requires a new interrupt chip, which needs to share data structures, constants and functions with the AVECINTC code. So move them to the header file and make the required functions public. Signed-off-by: Tianyang Zhang Signed-off-by: Thomas Gleixner Acked-by: Huacai Chen Link: https://patch.msgid.link/20260513012839.2856463-3-zhangtianyang@loong= son.cn --- drivers/irqchip/irq-loongarch-avec.c | 12 +----------- drivers/irqchip/irq-loongson.h | 13 +++++++++++++ 2 files changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/irqchip/irq-loongarch-avec.c b/drivers/irqchip/irq-loo= ngarch-avec.c index 758262f..2817339 100644 --- a/drivers/irqchip/irq-loongarch-avec.c +++ b/drivers/irqchip/irq-loongarch-avec.c @@ -24,7 +24,6 @@ #define VECTORS_PER_REG 64 #define IRR_VECTOR_MASK 0xffUL #define IRR_INVALID_MASK 0x80000000UL -#define AVEC_MSG_OFFSET 0x100000 =20 #ifdef CONFIG_SMP struct pending_list { @@ -47,15 +46,6 @@ struct avecintc_chip { =20 static struct avecintc_chip loongarch_avec; =20 -struct avecintc_data { - struct list_head entry; - unsigned int cpu; - unsigned int vec; - unsigned int prev_cpu; - unsigned int prev_vec; - unsigned int moving; -}; - static inline void avecintc_enable(void) { #ifdef CONFIG_MACH_LOONGSON64 @@ -87,7 +77,7 @@ static inline void pending_list_init(int cpu) INIT_LIST_HEAD(&plist->head); } =20 -static void avecintc_sync(struct avecintc_data *adata) +void avecintc_sync(struct avecintc_data *adata) { struct pending_list *plist; =20 diff --git a/drivers/irqchip/irq-loongson.h b/drivers/irqchip/irq-loongson.h index 11fa138..f0b6767 100644 --- a/drivers/irqchip/irq-loongson.h +++ b/drivers/irqchip/irq-loongson.h @@ -6,6 +6,17 @@ #ifndef _DRIVERS_IRQCHIP_IRQ_LOONGSON_H #define _DRIVERS_IRQCHIP_IRQ_LOONGSON_H =20 +#define AVEC_MSG_OFFSET 0x100000 + +struct avecintc_data { + struct list_head entry; + unsigned int cpu; + unsigned int vec; + unsigned int prev_cpu; + unsigned int prev_vec; + unsigned int moving; +}; + int find_pch_pic(u32 gsi); =20 int liointc_acpi_init(struct irq_domain *parent, @@ -24,4 +35,6 @@ int pch_msi_acpi_init(struct irq_domain *parent, struct acpi_madt_msi_pic *acpi_pchmsi); int pch_msi_acpi_init_avec(struct irq_domain *parent); =20 +void avecintc_sync(struct avecintc_data *adata); + #endif /* _DRIVERS_IRQCHIP_IRQ_LOONGSON_H */