From nobody Mon Jun 8 20:46:18 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B95A9369208; Tue, 26 May 2026 15:33:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779809584; cv=none; b=hogIpikF7ITlTTHDRblyBBuf8SBUNU+sJdJ//829flPLEcJDfmQd97cE4gjjw24nURfWmJ+idoRXdEH4pHFHY8D6JjOmkGVUodhDvGi8fCJ9G+vu+Mg+KCxyAsNUlELwaH/9ucKyigAACTHcHpyS5kmfhC5Y6fUk2VKZCL73aAY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779809584; c=relaxed/simple; bh=zc5nBLFa9lntw009t7RTCIfmSclh3vwwhyKkArzwAZk=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=nDTfrh5UBjXMTe/VBJdTrdnBmGN93tjTIVu7toXuhBrdQXlkTwv+McgOw/IH76JVCm7T+G0O3EQ91a9vKF5nwsmWCal2tQwt1IiWtORa2N6vGN4mXoYuhjDkfP6qQqWT2ix2PHMq5NIPi3PdFycZ+lEbv6g2WQPZlMapc07ue54= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=YQoADafi; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=g0yWFKYr; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="YQoADafi"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="g0yWFKYr" Date: Tue, 26 May 2026 15:32:59 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1779809580; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jsIVd+717hVMgnR2Fp25NGE/Yvj9Hdv8ZYDYxEAuHmM=; b=YQoADafi7V0wckS5S0PAamokc/UzuRsbmHSUAUbyi/sm6+9xw47cXREsyYlLHO0i93JjWE QDFkbW8OCk+I+KzA/QiwYrFrOcvAKMWUQOHf61A4OS207+EZIT4TfXrV0bEq6w+f1P8dcx 2PQhXrspH+sqr2e8dxnTK7NI8RyRhC30AAEmyza0/42C8jaUmFhINsgRSN1UDsTe0fNsvw Wv3xAJOQN5ORFBIeCYam0XtsxYf3LQ4mjSJoMFYuufUywRRWv8oihFue/2HV/7W+gw03km bKUuKI6cYMYxyvvmEb3kUTgumz5TluNOSRNhUTSCg0xS9nuW1k6jCzRM1hryfw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1779809580; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jsIVd+717hVMgnR2Fp25NGE/Yvj9Hdv8ZYDYxEAuHmM=; b=g0yWFKYr2hVbbR4NVZn0KK3iVjWVvra5XIYNAMJii9rixwaSSwrpsUwIuQeEuXri7iD1Rw vE2fk6XoW6rasCDA== From: "tip-bot2 for Chao Gao" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/tdx] x86/virt/seamldr: Initialize the newly-installed TDX module Cc: Chao Gao , Dave Hansen , Xu Yilun , Tony Lindgren , Kai Huang , "Kiryl Shutsemau (Meta)" , Rick Edgecombe , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260520222909.466B929B@davehans-spike.ostc.intel.com> References: <20260520222909.466B929B@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177980957939.1039918.4687895475119715442.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the x86/tdx branch of tip: Commit-ID: 80ea6a2442e14d98f6bb093fa2a6e32da88f77fb Gitweb: https://git.kernel.org/tip/80ea6a2442e14d98f6bb093fa2a6e32da= 88f77fb Author: Chao Gao AuthorDate: Wed, 20 May 2026 15:29:09 -07:00 Committer: Dave Hansen CommitterDate: Tue, 26 May 2026 08:15:20 -07:00 x86/virt/seamldr: Initialize the newly-installed TDX module Continue fleshing out the update process. At this point new the new module is sitting in memory but has never been called and is not usable. It is in a similar state to the when the system first boots. Leave the P-SEAMLDR behind. Stop making calls to it. Transition to calling the new TDX module itself to set up both global and per-cpu state. Share tdx_cpu_enable() with the fresh-boot module initialization code. Export it and invoke it on all CPUs. Note: "TDX global initialization" needs to be done once before "TDX per-CPU initialization". It would be a great fit for the new runtime update "is_lead_cpu" logic. But tdx_cpu_enable() already has some logic to do the global initialization properly. Just use it directly to maximize fresh-boot and runtime update code sharing. =3D=3D Background =3D=3D The boot-time and post-update initialization flows share the same first steps: - TDX global initialization - TDX per-CPU initialization After that, they diverge: - Fresh boot: Prepare TDMRs/PAMTs Configure the TDX module Configure the global KeyID Initialize TDMRs - Runtime update: Restore TDX module state from handoff data Future changes will consume the handoff data. [ dhansen: major changelog munging ] Signed-off-by: Chao Gao Signed-off-by: Dave Hansen Reviewed-by: Xu Yilun Reviewed-by: Tony Lindgren Reviewed-by: Kai Huang Reviewed-by: Kiryl Shutsemau (Meta) Reviewed-by: Rick Edgecombe Link: https://patch.msgid.link/20260520133909.409394-20-chao.gao@intel.com Link: https://patch.msgid.link/20260520222909.466B929B@davehans-spike.ostc.= intel.com --- arch/x86/include/asm/tdx.h | 1 + arch/x86/virt/vmx/tdx/seamldr.c | 4 ++++ arch/x86/virt/vmx/tdx/tdx.c | 2 +- 3 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/tdx.h b/arch/x86/include/asm/tdx.h index 27376db..5d750fe 100644 --- a/arch/x86/include/asm/tdx.h +++ b/arch/x86/include/asm/tdx.h @@ -107,6 +107,7 @@ static inline long tdx_kvm_hypercall(unsigned int nr, u= nsigned long p1, =20 #ifdef CONFIG_INTEL_TDX_HOST void tdx_init(void); +int tdx_cpu_enable(void); const char *tdx_dump_mce_info(struct mce *m); const struct tdx_sys_info *tdx_get_sysinfo(void); =20 diff --git a/arch/x86/virt/vmx/tdx/seamldr.c b/arch/x86/virt/vmx/tdx/seamld= r.c index 54fa797..5fdb36b 100644 --- a/arch/x86/virt/vmx/tdx/seamldr.c +++ b/arch/x86/virt/vmx/tdx/seamldr.c @@ -209,6 +209,7 @@ enum module_update_state { MODULE_UPDATE_START, MODULE_UPDATE_SHUTDOWN, MODULE_UPDATE_CPU_INSTALL, + MODULE_UPDATE_CPU_INIT, MODULE_UPDATE_DONE, }; =20 @@ -287,6 +288,9 @@ static int do_seamldr_install_module(void *seamldr_para= ms) case MODULE_UPDATE_CPU_INSTALL: ret =3D seamldr_install(seamldr_params); break; + case MODULE_UPDATE_CPU_INIT: + ret =3D tdx_cpu_enable(); + break; default: break; } diff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c index 37e52cd..080a2bc 100644 --- a/arch/x86/virt/vmx/tdx/tdx.c +++ b/arch/x86/virt/vmx/tdx/tdx.c @@ -113,7 +113,7 @@ out: * (and TDX module global initialization SEAMCALL if not done) on local cp= u to * make this cpu be ready to run any other SEAMCALLs. */ -static int tdx_cpu_enable(void) +int tdx_cpu_enable(void) { struct tdx_module_args args =3D {}; int ret;