From nobody Mon Jun 8 20:42:48 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A78B53FF1B8; Tue, 26 May 2026 14:22:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779805356; cv=none; b=UIIQEZpv4kIknOPTe8kFGgz8DhAPse411LYC9Z5Pjnw8cPTGHzQ+VUPgS+WjBd+qMM8jwll8ZcxNHgzdOE3TQGmQv4LMSQZ0mm9/3a2a71mVQuw4lN1UgZlcsnwM8ye5mctV12CaA3Q7ip49u+0GHNP8NVPqVyjvZaymV6RVu7A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779805356; c=relaxed/simple; bh=8cuA2eybpnWMUysFroLb2SVbGUqM4nW4ecjXvQ8TnMY=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=dOh3LcwHMJJ7+3jSG40i5zOaHj6zpLLb2bnUOMspssFo4Ajy402ftXguCrO+UHNLRQ5V/q5PhFWRacDch4Y4lq2hAwlaWPjBPYXKFIBWN31bLdTjp3JzdypssNnT5lTNJQ3Kbc4SWnYR5Y3FwIAYQLN44HVnbTyARyETzabLZas= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=pJlT9tzC; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=cgB9+dYK; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="pJlT9tzC"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="cgB9+dYK" Date: Tue, 26 May 2026 14:22:31 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1779805353; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=u3NDfo8x9heDT0h1sMjgASKYSOszXbijpS48LUSmZ+w=; b=pJlT9tzC5oNOa6CwxFeEbNy7kyLJBlJuouHbz00aoL8d5IsNbom5z2k1LwuFFapXT3C0wR K/shmcC5juiaOlwynRUoYg/SQjuWzNpNsrLxHBbL0W+GaNvPba/wIeMSTUrl1NSJYG9ST8 16JXzux5ibOOGEttb1ANsJzIKl2Q/9152UbboOqqp9pV70TQi4/y8Ax4NSAbPK05trVuil ZCitAggk/bdToldvqttPSIP/uoNPx30w5MRVKEZzx0NQ5FXl0HBXqqgZa4MlUo0nJNuaNE iwWHEMvAk+W8l9tpaxpG4RlvqAF++YFSC6TqR9aopOp/VC/c732HmEW7VTou9A== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1779805353; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=u3NDfo8x9heDT0h1sMjgASKYSOszXbijpS48LUSmZ+w=; b=cgB9+dYKqWmQ1UVmD9Vw+R0A8tQrlKdplY7Iedp2SVRGEnY8eX1VYAWn721RMVpX1s+LaD tTxrZL1+sDKua8BA== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: irq/core] x86/irq: Move IOAPIC misrouted and PIC/APIC error counts into irq_stats Cc: Thomas Gleixner , Michael Kelley , Radu Rendec , x86@kernel.org, linux-kernel@vger.kernel.org, maz@kernel.org In-Reply-To: <20260517194931.361942103@kernel.org> References: <20260517194931.361942103@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <177980535186.1039918.6631482774790059261.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The following commit has been merged into the irq/core branch of tip: Commit-ID: d6b70b16b4e7035d230ef97ac6927f40e6aefcce Gitweb: https://git.kernel.org/tip/d6b70b16b4e7035d230ef97ac6927f40e= 6aefcce Author: Thomas Gleixner AuthorDate: Sun, 17 May 2026 22:01:59 +02:00 Committer: Thomas Gleixner CommitterDate: Tue, 26 May 2026 16:21:12 +02:00 x86/irq: Move IOAPIC misrouted and PIC/APIC error counts into irq_stats The special treatment of these counts is just adding extra code for no real value. The irq_stats mechanism allows to suppress output of counters, which should never happen by default and provides a mechanism to enable them for the rare case that they occur. Move the IOAPIC misrouted and the PIC/APIC error counts into irq_stats, mark them suppressed by default and update the sites which increment them. This changes the output format of 'ERR' and 'MIS' in case there are events to the regular per CPU display format and otherwise suppresses them completely. As a side effect this removes the arch_cpu_stat() mechanism from proc/stat which was only there to account for the error interrupts on x86 and missed to take the misrouted ones into account. Signed-off-by: Thomas Gleixner Tested-by: Michael Kelley Reviewed-by: Radu Rendec Link: https://patch.msgid.link/20260517194931.361942103@kernel.org --- arch/x86/include/asm/hardirq.h | 7 ++++--- arch/x86/include/asm/hw_irq.h | 4 ---- arch/x86/kernel/apic/apic.c | 2 +- arch/x86/kernel/apic/io_apic.c | 4 +--- arch/x86/kernel/i8259.c | 2 +- arch/x86/kernel/irq.c | 16 ++++------------ fs/proc/stat.c | 4 ---- 7 files changed, 11 insertions(+), 28 deletions(-) diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h index 6723b51..dea60d6 100644 --- a/arch/x86/include/asm/hardirq.h +++ b/arch/x86/include/asm/hardirq.h @@ -50,6 +50,10 @@ enum irq_stat_counts { #ifdef CONFIG_X86_POSTED_MSI IRQ_COUNT_POSTED_MSI_NOTIFICATION, #endif + IRQ_COUNT_PIC_APIC_ERROR, +#ifdef CONFIG_X86_IO_APIC + IRQ_COUNT_IOAPIC_MISROUTED, +#endif IRQ_COUNT_MAX, }; =20 @@ -81,9 +85,6 @@ extern void ack_bad_irq(unsigned int irq); #ifdef CONFIG_PROC_FS extern u64 arch_irq_stat_cpu(unsigned int cpu); #define arch_irq_stat_cpu arch_irq_stat_cpu - -extern u64 arch_irq_stat(void); -#define arch_irq_stat arch_irq_stat #endif =20 DECLARE_PER_CPU_CACHE_HOT(u16, __softirq_pending); diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h index cbe19e6..47727d0 100644 --- a/arch/x86/include/asm/hw_irq.h +++ b/arch/x86/include/asm/hw_irq.h @@ -110,10 +110,6 @@ static inline void lock_vector_lock(void) {} static inline void unlock_vector_lock(void) {} #endif =20 -/* Statistics */ -extern atomic_t irq_err_count; -extern atomic_t irq_mis_count; - extern void elcr_set_level_irq(unsigned int irq); =20 extern char irq_entries_start[]; diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index e27c263..3eeebc2 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -2186,7 +2186,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_error_interrupt) apic_write(APIC_ESR, 0); v =3D apic_read(APIC_ESR); apic_eoi(); - atomic_inc(&irq_err_count); + irq_stat_inc_and_enable(IRQ_COUNT_PIC_APIC_ERROR); =20 apic_pr_debug("APIC error on CPU%d: %02x", smp_processor_id(), v); =20 diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 352ed55..7d7175d 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -1575,8 +1575,6 @@ static unsigned int startup_ioapic_irq(struct irq_dat= a *data) return was_pending; } =20 -atomic_t irq_mis_count; - #ifdef CONFIG_GENERIC_PENDING_IRQ static bool io_apic_level_ack_pending(struct mp_chip_data *data) { @@ -1713,7 +1711,7 @@ static void ioapic_ack_level(struct irq_data *irq_dat= a) * at the cpu. */ if (!(v & (1 << (i & 0x1f)))) { - atomic_inc(&irq_mis_count); + irq_stat_inc_and_enable(IRQ_COUNT_IOAPIC_MISROUTED); eoi_ioapic_pin(cfg->vector, irq_data->chip_data); } =20 diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c index f67063d..f7a86b9 100644 --- a/arch/x86/kernel/i8259.c +++ b/arch/x86/kernel/i8259.c @@ -214,7 +214,7 @@ spurious_8259A_irq: "spurious 8259A interrupt: IRQ%d.\n", irq); spurious_irq_mask |=3D irqmask; } - atomic_inc(&irq_err_count); + irq_stat_inc_and_enable(IRQ_COUNT_PIC_APIC_ERROR); /* * Theoretically we do not have to handle this IRQ, * but in Linux this does not cause problems and is diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c index 2d8ca41..9d98c81 100644 --- a/arch/x86/kernel/irq.c +++ b/arch/x86/kernel/irq.c @@ -39,8 +39,6 @@ EXPORT_PER_CPU_SYMBOL(__softirq_pending); =20 DEFINE_PER_CPU_CACHE_HOT(struct irq_stack *, hardirq_stack_ptr); =20 -atomic_t irq_err_count; - /* * 'what should we do if we get a hw irq event on an illegal vector'. * each architecture has to answer this themselves. @@ -124,6 +122,10 @@ static const struct irq_stat_info irq_stat_info[IRQ_CO= UNT_MAX] =3D { #ifdef CONFIG_X86_POSTED_MSI ISS(POSTED_MSI_NOTIFICATION, "PMN", " Posted MSI notification event\n"), #endif + IDS(PIC_APIC_ERROR, "ERR", " PIC/APIC error interrupts\n"), +#ifdef CONFIG_X86_IO_APIC + IDS(IOAPIC_MISROUTED, "MIS", " Misrouted IO/APIC interrupts\n"), +#endif }; =20 static DECLARE_BITMAP(irq_stat_count_show, IRQ_COUNT_MAX) __read_mostly; @@ -183,10 +185,6 @@ int arch_show_interrupts(struct seq_file *p, int prec) irq_proc_emit_counts(p, &irq_stat.counts[i]); seq_puts(p, info->text); } - - seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count)); - if (IS_ENABLED(CONFIG_X86_IO_APIC)) - seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count)); return 0; } =20 @@ -202,12 +200,6 @@ u64 arch_irq_stat_cpu(unsigned int cpu) sum +=3D p->counts[i]; return sum; } - -u64 arch_irq_stat(void) -{ - u64 sum =3D atomic_read(&irq_err_count); - return sum; -} #endif /* CONFIG_PROC_FS */ =20 static __always_inline void handle_irq(struct irq_desc *desc, diff --git a/fs/proc/stat.c b/fs/proc/stat.c index 8b444e8..20c3df9 100644 --- a/fs/proc/stat.c +++ b/fs/proc/stat.c @@ -18,9 +18,6 @@ #ifndef arch_irq_stat_cpu #define arch_irq_stat_cpu(cpu) 0 #endif -#ifndef arch_irq_stat -#define arch_irq_stat() 0 -#endif =20 u64 get_idle_time(struct kernel_cpustat *kcs, int cpu) { @@ -122,7 +119,6 @@ static int show_stat(struct seq_file *p, void *v) sum_softirq +=3D softirq_stat; } } - sum +=3D arch_irq_stat(); =20 seq_put_decimal_ull(p, "cpu ", nsec_to_clock_t(user)); seq_put_decimal_ull(p, " ", nsec_to_clock_t(nice));